15283ecb5SPaul Mundt /* 25283ecb5SPaul Mundt * arch/sh/drivers/pci/fixups-r7780rp.c 35283ecb5SPaul Mundt * 45283ecb5SPaul Mundt * Highlander R7780RP-1 PCI fixups 55283ecb5SPaul Mundt * 65283ecb5SPaul Mundt * Copyright (C) 2003 Lineo uSolutions, Inc. 7959f85f8SPaul Mundt * Copyright (C) 2004 - 2006 Paul Mundt 85283ecb5SPaul Mundt * 95283ecb5SPaul Mundt * This file is subject to the terms and conditions of the GNU General Public 105283ecb5SPaul Mundt * License. See the file "COPYING" in the main directory of this archive 115283ecb5SPaul Mundt * for more details. 125283ecb5SPaul Mundt */ 13959f85f8SPaul Mundt #include <linux/pci.h> 14959f85f8SPaul Mundt #include "pci-sh4.h" 155283ecb5SPaul Mundt #include <asm/io.h> 165283ecb5SPaul Mundt 175283ecb5SPaul Mundt int pci_fixup_pcic(void) 185283ecb5SPaul Mundt { 19959f85f8SPaul Mundt pci_write_reg(0x000043ff, SH4_PCIINTM); 20959f85f8SPaul Mundt pci_write_reg(0x0000380f, SH4_PCIAINTM); 215283ecb5SPaul Mundt 22959f85f8SPaul Mundt pci_write_reg(0xfbb00047, SH7780_PCICMD); 23959f85f8SPaul Mundt pci_write_reg(0x00000000, SH7780_PCIIBAR); 245283ecb5SPaul Mundt 25959f85f8SPaul Mundt pci_write_reg(0x00011912, SH7780_PCISVID); 26959f85f8SPaul Mundt pci_write_reg(0x08000000, SH7780_PCICSCR0); 27959f85f8SPaul Mundt pci_write_reg(0x0000001b, SH7780_PCICSAR0); 28959f85f8SPaul Mundt pci_write_reg(0xfd000000, SH7780_PCICSCR1); 29959f85f8SPaul Mundt pci_write_reg(0x0000000f, SH7780_PCICSAR1); 305283ecb5SPaul Mundt 31959f85f8SPaul Mundt pci_write_reg(0xfd000000, SH7780_PCIMBR0); 32959f85f8SPaul Mundt pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); 33959f85f8SPaul Mundt 34959f85f8SPaul Mundt #ifdef CONFIG_32BIT 35959f85f8SPaul Mundt pci_write_reg(0xc0000000, SH7780_PCIMBR2); 36959f85f8SPaul Mundt pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); 37959f85f8SPaul Mundt #endif 385283ecb5SPaul Mundt 395283ecb5SPaul Mundt /* Set IOBR for windows containing area specified in pci.h */ 40959f85f8SPaul Mundt pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), 41959f85f8SPaul Mundt SH7780_PCIIOBR); 42959f85f8SPaul Mundt pci_write_reg(((SH7780_PCI_IO_SIZE-1) & (7<<18)), SH7780_PCIIOBMR); 435283ecb5SPaul Mundt 445283ecb5SPaul Mundt return 0; 455283ecb5SPaul Mundt } 46