1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * arch/shmedia/boot/compressed/head.S 7 * 8 * Copied from 9 * arch/shmedia/kernel/head.S 10 * which carried the copyright: 11 * Copyright (C) 2000, 2001 Paolo Alberelli 12 * 13 * Modification for compressed loader: 14 * Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com) 15 */ 16#include <linux/linkage.h> 17#include <asm/cache.h> 18#include <asm/cpu/mmu_context.h> 19#include <asm/cpu/registers.h> 20 21/* 22 * Fixed TLB entries to identity map the beginning of RAM 23 */ 24#define MMUIR_TEXT_H 0x0000000000000003 | CONFIG_MEMORY_START 25 /* Enabled, Shared, ASID 0, Eff. Add. 0xA0000000 */ 26#define MMUIR_TEXT_L 0x000000000000009a | CONFIG_MEMORY_START 27 /* 512 Mb, Cacheable (Write-back), execute, Not User, Ph. Add. */ 28 29#define MMUDR_CACHED_H 0x0000000000000003 | CONFIG_MEMORY_START 30 /* Enabled, Shared, ASID 0, Eff. Add. 0xA0000000 */ 31#define MMUDR_CACHED_L 0x000000000000015a | CONFIG_MEMORY_START 32 /* 512 Mb, Cacheable (Write-back), read/write, Not User, Ph. Add. */ 33 34#define ICCR0_INIT_VAL ICCR0_ON | ICCR0_ICI /* ICE + ICI */ 35#define ICCR1_INIT_VAL ICCR1_NOLOCK /* No locking */ 36 37#if 1 38#define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WB /* OCE + OCI + WB */ 39#else 40#define OCCR0_INIT_VAL OCCR0_OFF 41#endif 42#define OCCR1_INIT_VAL OCCR1_NOLOCK /* No locking */ 43 44 .text 45 46 .global startup 47startup: 48 /* 49 * Prevent speculative fetch on device memory due to 50 * uninitialized target registers. 51 * This must be executed before the first branch. 52 */ 53 ptabs/u r63, tr0 54 ptabs/u r63, tr1 55 ptabs/u r63, tr2 56 ptabs/u r63, tr3 57 ptabs/u r63, tr4 58 ptabs/u r63, tr5 59 ptabs/u r63, tr6 60 ptabs/u r63, tr7 61 synci 62 63 /* 64 * Set initial TLB entries for cached and uncached regions. 65 * Note: PTA/BLINK is PIC code, PTABS/BLINK isn't ! 66 */ 67 /* Clear ITLBs */ 68 pta 1f, tr1 69 movi ITLB_FIXED, r21 70 movi ITLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22 711: putcfg r21, 0, r63 /* Clear MMUIR[n].PTEH.V */ 72 addi r21, TLB_STEP, r21 73 bne r21, r22, tr1 74 75 /* Clear DTLBs */ 76 pta 1f, tr1 77 movi DTLB_FIXED, r21 78 movi DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22 791: putcfg r21, 0, r63 /* Clear MMUDR[n].PTEH.V */ 80 addi r21, TLB_STEP, r21 81 bne r21, r22, tr1 82 83 /* Map one big (512Mb) page for ITLB */ 84 movi ITLB_FIXED, r21 85 movi MMUIR_TEXT_L, r22 /* PTEL first */ 86 putcfg r21, 1, r22 /* Set MMUIR[0].PTEL */ 87 movi MMUIR_TEXT_H, r22 /* PTEH last */ 88 putcfg r21, 0, r22 /* Set MMUIR[0].PTEH */ 89 90 /* Map one big CACHED (512Mb) page for DTLB */ 91 movi DTLB_FIXED, r21 92 movi MMUDR_CACHED_L, r22 /* PTEL first */ 93 putcfg r21, 1, r22 /* Set MMUDR[0].PTEL */ 94 movi MMUDR_CACHED_H, r22 /* PTEH last */ 95 putcfg r21, 0, r22 /* Set MMUDR[0].PTEH */ 96 97 /* ICache */ 98 movi ICCR_BASE, r21 99 movi ICCR0_INIT_VAL, r22 100 movi ICCR1_INIT_VAL, r23 101 putcfg r21, ICCR_REG0, r22 102 putcfg r21, ICCR_REG1, r23 103 synci 104 105 /* OCache */ 106 movi OCCR_BASE, r21 107 movi OCCR0_INIT_VAL, r22 108 movi OCCR1_INIT_VAL, r23 109 putcfg r21, OCCR_REG0, r22 110 putcfg r21, OCCR_REG1, r23 111 synco 112 113 /* 114 * Enable the MMU. 115 * From here-on code can be non-PIC. 116 */ 117 movi SR_HARMLESS | SR_ENABLE_MMU, r22 118 putcon r22, SSR 119 movi 1f, r22 120 putcon r22, SPC 121 synco 122 rte /* And now go into the hyperspace ... */ 1231: /* ... that's the next instruction ! */ 124 125 /* Set initial stack pointer */ 126 movi datalabel stack_start, r0 127 ld.l r0, 0, r15 128 129 /* 130 * Clear bss 131 */ 132 pt 1f, tr1 133 movi datalabel __bss_start, r22 134 movi datalabel _end, r23 1351: st.l r22, 0, r63 136 addi r22, 4, r22 137 bne r22, r23, tr1 138 139 /* 140 * Decompress the kernel. 141 */ 142 pt decompress_kernel, tr0 143 blink tr0, r18 144 145 /* 146 * Disable the MMU. 147 */ 148 movi SR_HARMLESS, r22 149 putcon r22, SSR 150 movi 1f, r22 151 putcon r22, SPC 152 synco 153 rte /* And now go into the hyperspace ... */ 1541: /* ... that's the next instruction ! */ 155 156 /* Jump into the decompressed kernel */ 157 movi datalabel (CONFIG_MEMORY_START + 0x2000)+1, r19 158 ptabs r19, tr0 159 blink tr0, r18 160 161 /* Shouldn't return here, but just in case, loop forever */ 162 pt 1f, tr0 1631: blink tr0, r63 164