1 /*
2  * linux/arch/sh/boards/renesas/sh7763rdp/setup.c
3  *
4  * Renesas Solutions sh7763rdp board
5  *
6  * Copyright (C) 2008 Renesas Solutions Corp.
7  * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8  *
9  * This file is subject to the terms and conditions of the GNU General Public
10  * License.  See the file "COPYING" in the main directory of this archive
11  * for more details.
12  */
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/interrupt.h>
16 #include <linux/input.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/fb.h>
19 #include <linux/io.h>
20 #include <linux/sh_eth.h>
21 #include <linux/sh_intc.h>
22 #include <mach/sh7763rdp.h>
23 #include <asm/sh7760fb.h>
24 
25 /* NOR Flash */
26 static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
27 	{
28 		.name = "U-Boot",
29 		.offset = 0,
30 		.size = (2 * 128 * 1024),
31 		.mask_flags = MTD_WRITEABLE,	/* Read-only */
32 	}, {
33 		.name = "Linux-Kernel",
34 		.offset = MTDPART_OFS_APPEND,
35 		.size = (20 * 128 * 1024),
36 	}, {
37 		.name = "Root Filesystem",
38 		.offset = MTDPART_OFS_APPEND,
39 		.size = MTDPART_SIZ_FULL,
40 	},
41 };
42 
43 static struct physmap_flash_data sh7763rdp_nor_flash_data = {
44 	.width = 2,
45 	.parts = sh7763rdp_nor_flash_partitions,
46 	.nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
47 };
48 
49 static struct resource sh7763rdp_nor_flash_resources[] = {
50 	[0] = {
51 		.name = "NOR Flash",
52 		.start = 0,
53 		.end = (64 * 1024 * 1024),
54 		.flags = IORESOURCE_MEM,
55 	},
56 };
57 
58 static struct platform_device sh7763rdp_nor_flash_device = {
59 	.name = "physmap-flash",
60 	.resource = sh7763rdp_nor_flash_resources,
61 	.num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
62 	.dev = {
63 		.platform_data = &sh7763rdp_nor_flash_data,
64 	},
65 };
66 
67 /*
68  * SH-Ether
69  *
70  * SH Ether of SH7763 has multi IRQ handling.
71  * (0x920,0x940,0x960 -> 0x920)
72  */
73 static struct resource sh_eth_resources[] = {
74 	{
75 		.start  = 0xFEE00800,   /* use eth1 */
76 		.end    = 0xFEE00F7C - 1,
77 		.flags  = IORESOURCE_MEM,
78 	}, {
79 		.start  = 0xFEE01800,   /* TSU */
80 		.end    = 0xFEE01FFF,
81 		.flags  = IORESOURCE_MEM,
82 	}, {
83 		.start  = evt2irq(0x920),   /* irq number */
84 		.flags  = IORESOURCE_IRQ,
85 	},
86 };
87 
88 static struct sh_eth_plat_data sh7763_eth_pdata = {
89 	.phy = 1,
90 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
91 	.phy_interface = PHY_INTERFACE_MODE_MII,
92 };
93 
94 static struct platform_device sh7763rdp_eth_device = {
95 	.name       = "sh7763-gether",
96 	.resource   = sh_eth_resources,
97 	.num_resources  = ARRAY_SIZE(sh_eth_resources),
98 	.dev        = {
99 		.platform_data = &sh7763_eth_pdata,
100 	},
101 };
102 
103 /* SH7763 LCDC */
104 static struct resource sh7763rdp_fb_resources[] = {
105 	{
106 		.start  = 0xFFE80000,
107 		.end    = 0xFFE80442 - 1,
108 		.flags  = IORESOURCE_MEM,
109 	},
110 };
111 
112 static struct fb_videomode sh7763fb_videomode = {
113 	.refresh = 60,
114 	.name = "VGA Monitor",
115 	.xres = 640,
116 	.yres = 480,
117 	.pixclock = 10000,
118 	.left_margin = 80,
119 	.right_margin = 24,
120 	.upper_margin = 30,
121 	.lower_margin = 1,
122 	.hsync_len = 96,
123 	.vsync_len = 1,
124 	.sync = 0,
125 	.vmode = FB_VMODE_NONINTERLACED,
126 	.flag = FBINFO_FLAG_DEFAULT,
127 };
128 
129 static struct sh7760fb_platdata sh7763fb_def_pdata = {
130 	.def_mode = &sh7763fb_videomode,
131 	.ldmtr = (LDMTR_TFT_COLOR_16|LDMTR_MCNT),
132 	.lddfr = LDDFR_16BPP_RGB565,
133 	.ldpmmr = 0x0000,
134 	.ldpspr = 0xFFFF,
135 	.ldaclnr = 0x0001,
136 	.ldickr = 0x1102,
137 	.rotate = 0,
138 	.novsync = 0,
139 	.blank = NULL,
140 };
141 
142 static struct platform_device sh7763rdp_fb_device = {
143 	.name		= "sh7760-lcdc",
144 	.resource	= sh7763rdp_fb_resources,
145 	.num_resources = ARRAY_SIZE(sh7763rdp_fb_resources),
146 	.dev = {
147 		.platform_data = &sh7763fb_def_pdata,
148 	},
149 };
150 
151 static struct platform_device *sh7763rdp_devices[] __initdata = {
152 	&sh7763rdp_nor_flash_device,
153 	&sh7763rdp_eth_device,
154 	&sh7763rdp_fb_device,
155 };
156 
157 static int __init sh7763rdp_devices_setup(void)
158 {
159 	return platform_add_devices(sh7763rdp_devices,
160 				    ARRAY_SIZE(sh7763rdp_devices));
161 }
162 device_initcall(sh7763rdp_devices_setup);
163 
164 static void __init sh7763rdp_setup(char **cmdline_p)
165 {
166 	/* Board version check */
167 	if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
168 		printk(KERN_INFO "RTE Standard Configuration\n");
169 	else
170 		printk(KERN_INFO "RTA Standard Configuration\n");
171 
172 	/* USB pin select bits (clear bit 5-2 to 0) */
173 	__raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
174 	/* USBH setup port I controls to other (clear bits 4-9 to 0) */
175 	__raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
176 
177 	/* Select USB Host controller */
178 	__raw_writew(0x00, USB_USBHSC);
179 
180 	/* For LCD */
181 	/* set PTJ7-1, bits 15-2 of PJCR to 0 */
182 	__raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
183 	/* set PTI5, bits 11-10 of PICR to 0 */
184 	__raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
185 	__raw_writew(0, PORT_PKCR);
186 	__raw_writew(0, PORT_PLCR);
187 	/* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
188 	__raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
189 	/* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
190 	__raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
191 
192 	/* For HAC */
193 	/* bit3-0  0100:HAC & SSI1 enable */
194 	__raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
195 	/* bit14      1:SSI_HAC_CLK enable */
196 	__raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
197 
198 	/* SH-Ether */
199 	__raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
200 	__raw_writew(0x0, PORT_PFCR);
201 	__raw_writew(0x0, PORT_PFCR);
202 	__raw_writew(0x0, PORT_PFCR);
203 
204 	/* MMC */
205 	/*selects SCIF and MMC other functions */
206 	__raw_writew(0x0001, PORT_PSEL0);
207 	/* MMC clock operates */
208 	__raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
209 	__raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
210 	__raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
211 }
212 
213 static struct sh_machine_vector mv_sh7763rdp __initmv = {
214 	.mv_name = "sh7763drp",
215 	.mv_setup = sh7763rdp_setup,
216 	.mv_init_irq = init_sh7763rdp_IRQ,
217 };
218