1da2014a2SPaul Mundt /*
2da2014a2SPaul Mundt  * linux/arch/sh/boards/renesas/sh7763rdp/setup.c
3da2014a2SPaul Mundt  *
4da2014a2SPaul Mundt  * Renesas Solutions sh7763rdp board
5da2014a2SPaul Mundt  *
6da2014a2SPaul Mundt  * Copyright (C) 2008 Renesas Solutions Corp.
7da2014a2SPaul Mundt  * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8da2014a2SPaul Mundt  *
9da2014a2SPaul Mundt  * This file is subject to the terms and conditions of the GNU General Public
10da2014a2SPaul Mundt  * License.  See the file "COPYING" in the main directory of this archive
11da2014a2SPaul Mundt  * for more details.
12da2014a2SPaul Mundt  */
13da2014a2SPaul Mundt #include <linux/init.h>
14da2014a2SPaul Mundt #include <linux/platform_device.h>
15da2014a2SPaul Mundt #include <linux/interrupt.h>
16da2014a2SPaul Mundt #include <linux/input.h>
17da2014a2SPaul Mundt #include <linux/mtd/physmap.h>
18674063c5SNobuhiro Iwamatsu #include <linux/fb.h>
190a766a6bSNobuhiro Iwamatsu #include <linux/io.h>
207639a454SPaul Mundt #include <mach/sh7763rdp.h>
210a766a6bSNobuhiro Iwamatsu #include <asm/sh_eth.h>
22674063c5SNobuhiro Iwamatsu #include <asm/sh7760fb.h>
23da2014a2SPaul Mundt 
24da2014a2SPaul Mundt /* NOR Flash */
25da2014a2SPaul Mundt static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
26da2014a2SPaul Mundt 	{
27da2014a2SPaul Mundt 		.name = "U-Boot",
28da2014a2SPaul Mundt 		.offset = 0,
29da2014a2SPaul Mundt 		.size = (2 * 128 * 1024),
30da2014a2SPaul Mundt 		.mask_flags = MTD_WRITEABLE,	/* Read-only */
31da2014a2SPaul Mundt 	}, {
32da2014a2SPaul Mundt 		.name = "Linux-Kernel",
33da2014a2SPaul Mundt 		.offset = MTDPART_OFS_APPEND,
34da2014a2SPaul Mundt 		.size = (20 * 128 * 1024),
35da2014a2SPaul Mundt 	}, {
36da2014a2SPaul Mundt 		.name = "Root Filesystem",
37da2014a2SPaul Mundt 		.offset = MTDPART_OFS_APPEND,
38da2014a2SPaul Mundt 		.size = MTDPART_SIZ_FULL,
39da2014a2SPaul Mundt 	},
40da2014a2SPaul Mundt };
41da2014a2SPaul Mundt 
42da2014a2SPaul Mundt static struct physmap_flash_data sh7763rdp_nor_flash_data = {
43da2014a2SPaul Mundt 	.width = 2,
44da2014a2SPaul Mundt 	.parts = sh7763rdp_nor_flash_partitions,
45da2014a2SPaul Mundt 	.nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
46da2014a2SPaul Mundt };
47da2014a2SPaul Mundt 
48da2014a2SPaul Mundt static struct resource sh7763rdp_nor_flash_resources[] = {
49da2014a2SPaul Mundt 	[0] = {
50da2014a2SPaul Mundt 		.name = "NOR Flash",
51da2014a2SPaul Mundt 		.start = 0,
52da2014a2SPaul Mundt 		.end = (64 * 1024 * 1024),
53da2014a2SPaul Mundt 		.flags = IORESOURCE_MEM,
54da2014a2SPaul Mundt 	},
55da2014a2SPaul Mundt };
56da2014a2SPaul Mundt 
57da2014a2SPaul Mundt static struct platform_device sh7763rdp_nor_flash_device = {
58da2014a2SPaul Mundt 	.name = "physmap-flash",
59da2014a2SPaul Mundt 	.resource = sh7763rdp_nor_flash_resources,
60da2014a2SPaul Mundt 	.num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
61da2014a2SPaul Mundt 	.dev = {
62da2014a2SPaul Mundt 		.platform_data = &sh7763rdp_nor_flash_data,
63da2014a2SPaul Mundt 	},
64da2014a2SPaul Mundt };
65da2014a2SPaul Mundt 
66da788006SNobuhiro Iwamatsu /*
67da788006SNobuhiro Iwamatsu  * SH-Ether
68da788006SNobuhiro Iwamatsu  *
69da788006SNobuhiro Iwamatsu  * SH Ether of SH7763 has multi IRQ handling.
70da788006SNobuhiro Iwamatsu  * (57,58,59 -> 57)
71da788006SNobuhiro Iwamatsu  */
720a766a6bSNobuhiro Iwamatsu static struct resource sh_eth_resources[] = {
730a766a6bSNobuhiro Iwamatsu 	{
740a766a6bSNobuhiro Iwamatsu 		.start  = 0xFEE00800,   /* use eth1 */
750a766a6bSNobuhiro Iwamatsu 		.end    = 0xFEE00F7C - 1,
760a766a6bSNobuhiro Iwamatsu 		.flags  = IORESOURCE_MEM,
770a766a6bSNobuhiro Iwamatsu 	}, {
78da788006SNobuhiro Iwamatsu 		.start  = 57,   /* irq number */
790a766a6bSNobuhiro Iwamatsu 		.flags  = IORESOURCE_IRQ,
800a766a6bSNobuhiro Iwamatsu 	},
810a766a6bSNobuhiro Iwamatsu };
820a766a6bSNobuhiro Iwamatsu 
830a766a6bSNobuhiro Iwamatsu static struct sh_eth_plat_data sh7763_eth_pdata = {
840a766a6bSNobuhiro Iwamatsu 	.phy = 1,
850a766a6bSNobuhiro Iwamatsu 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
860a766a6bSNobuhiro Iwamatsu };
870a766a6bSNobuhiro Iwamatsu 
880a766a6bSNobuhiro Iwamatsu static struct platform_device sh7763rdp_eth_device = {
890a766a6bSNobuhiro Iwamatsu 	.name       = "sh-eth",
900a766a6bSNobuhiro Iwamatsu 	.resource   = sh_eth_resources,
910a766a6bSNobuhiro Iwamatsu 	.num_resources  = ARRAY_SIZE(sh_eth_resources),
920a766a6bSNobuhiro Iwamatsu 	.dev        = {
930a766a6bSNobuhiro Iwamatsu 		.platform_data = &sh7763_eth_pdata,
940a766a6bSNobuhiro Iwamatsu 	},
950a766a6bSNobuhiro Iwamatsu };
960a766a6bSNobuhiro Iwamatsu 
97674063c5SNobuhiro Iwamatsu /* SH7763 LCDC */
98674063c5SNobuhiro Iwamatsu static struct resource sh7763rdp_fb_resources[] = {
99674063c5SNobuhiro Iwamatsu 	{
100674063c5SNobuhiro Iwamatsu 		.start  = 0xFFE80000,
101674063c5SNobuhiro Iwamatsu 		.end    = 0xFFE80442 - 1,
102674063c5SNobuhiro Iwamatsu 		.flags  = IORESOURCE_MEM,
103674063c5SNobuhiro Iwamatsu 	},
104674063c5SNobuhiro Iwamatsu };
105674063c5SNobuhiro Iwamatsu 
106674063c5SNobuhiro Iwamatsu static struct fb_videomode sh7763fb_videomode = {
107674063c5SNobuhiro Iwamatsu 	.refresh = 60,
108674063c5SNobuhiro Iwamatsu 	.name = "VGA Monitor",
109674063c5SNobuhiro Iwamatsu 	.xres = 640,
110674063c5SNobuhiro Iwamatsu 	.yres = 480,
111674063c5SNobuhiro Iwamatsu 	.pixclock = 10000,
112674063c5SNobuhiro Iwamatsu 	.left_margin = 80,
113674063c5SNobuhiro Iwamatsu 	.right_margin = 24,
114674063c5SNobuhiro Iwamatsu 	.upper_margin = 30,
115674063c5SNobuhiro Iwamatsu 	.lower_margin = 1,
116674063c5SNobuhiro Iwamatsu 	.hsync_len = 96,
117674063c5SNobuhiro Iwamatsu 	.vsync_len = 1,
118674063c5SNobuhiro Iwamatsu 	.sync = 0,
119674063c5SNobuhiro Iwamatsu 	.vmode = FB_VMODE_NONINTERLACED,
120674063c5SNobuhiro Iwamatsu 	.flag = FBINFO_FLAG_DEFAULT,
121674063c5SNobuhiro Iwamatsu };
122674063c5SNobuhiro Iwamatsu 
123674063c5SNobuhiro Iwamatsu static struct sh7760fb_platdata sh7763fb_def_pdata = {
124674063c5SNobuhiro Iwamatsu 	.def_mode = &sh7763fb_videomode,
125674063c5SNobuhiro Iwamatsu 	.ldmtr = (LDMTR_TFT_COLOR_16|LDMTR_MCNT),
126674063c5SNobuhiro Iwamatsu 	.lddfr = LDDFR_16BPP_RGB565,
127674063c5SNobuhiro Iwamatsu 	.ldpmmr = 0x0000,
128674063c5SNobuhiro Iwamatsu 	.ldpspr = 0xFFFF,
129674063c5SNobuhiro Iwamatsu 	.ldaclnr = 0x0001,
130674063c5SNobuhiro Iwamatsu 	.ldickr = 0x1102,
131674063c5SNobuhiro Iwamatsu 	.rotate = 0,
132674063c5SNobuhiro Iwamatsu 	.novsync = 0,
133674063c5SNobuhiro Iwamatsu 	.blank = NULL,
134674063c5SNobuhiro Iwamatsu };
135674063c5SNobuhiro Iwamatsu 
136674063c5SNobuhiro Iwamatsu static struct platform_device sh7763rdp_fb_device = {
137674063c5SNobuhiro Iwamatsu 	.name		= "sh7760-lcdc",
138674063c5SNobuhiro Iwamatsu 	.resource	= sh7763rdp_fb_resources,
139674063c5SNobuhiro Iwamatsu 	.num_resources = ARRAY_SIZE(sh7763rdp_fb_resources),
140674063c5SNobuhiro Iwamatsu 	.dev = {
141674063c5SNobuhiro Iwamatsu 		.platform_data = &sh7763fb_def_pdata,
142674063c5SNobuhiro Iwamatsu 	},
143674063c5SNobuhiro Iwamatsu };
144674063c5SNobuhiro Iwamatsu 
145da2014a2SPaul Mundt static struct platform_device *sh7763rdp_devices[] __initdata = {
146da2014a2SPaul Mundt 	&sh7763rdp_nor_flash_device,
1470a766a6bSNobuhiro Iwamatsu 	&sh7763rdp_eth_device,
148674063c5SNobuhiro Iwamatsu 	&sh7763rdp_fb_device,
149da2014a2SPaul Mundt };
150da2014a2SPaul Mundt 
151da2014a2SPaul Mundt static int __init sh7763rdp_devices_setup(void)
152da2014a2SPaul Mundt {
153da2014a2SPaul Mundt 	return platform_add_devices(sh7763rdp_devices,
154da2014a2SPaul Mundt 				    ARRAY_SIZE(sh7763rdp_devices));
155da2014a2SPaul Mundt }
1560a766a6bSNobuhiro Iwamatsu device_initcall(sh7763rdp_devices_setup);
157da2014a2SPaul Mundt 
158da2014a2SPaul Mundt static void __init sh7763rdp_setup(char **cmdline_p)
159da2014a2SPaul Mundt {
160da2014a2SPaul Mundt 	/* Board version check */
161da2014a2SPaul Mundt 	if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
162da2014a2SPaul Mundt 		printk(KERN_INFO "RTE Standard Configuration\n");
163da2014a2SPaul Mundt 	else
164da2014a2SPaul Mundt 		printk(KERN_INFO "RTA Standard Configuration\n");
165da2014a2SPaul Mundt 
166da2014a2SPaul Mundt 	/* USB pin select bits (clear bit 5-2 to 0) */
167da2014a2SPaul Mundt 	ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
168da2014a2SPaul Mundt 	/* USBH setup port I controls to other (clear bits 4-9 to 0) */
169da2014a2SPaul Mundt 	ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR);
170da2014a2SPaul Mundt 
171da2014a2SPaul Mundt 	/* Select USB Host controller */
172da2014a2SPaul Mundt 	ctrl_outw(0x00, USB_USBHSC);
173da2014a2SPaul Mundt 
174da2014a2SPaul Mundt 	/* For LCD */
175da2014a2SPaul Mundt 	/* set PTJ7-1, bits 15-2 of PJCR to 0 */
176da2014a2SPaul Mundt 	ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR);
177da2014a2SPaul Mundt 	/* set PTI5, bits 11-10 of PICR to 0 */
178da2014a2SPaul Mundt 	ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR);
179da2014a2SPaul Mundt 	ctrl_outw(0, PORT_PKCR);
180da2014a2SPaul Mundt 	ctrl_outw(0, PORT_PLCR);
181da2014a2SPaul Mundt 	/* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
182da2014a2SPaul Mundt 	ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
183da2014a2SPaul Mundt 	/* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
184da2014a2SPaul Mundt 	ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
185da2014a2SPaul Mundt 
186da2014a2SPaul Mundt 	/* For HAC */
187da2014a2SPaul Mundt 	/* bit3-0  0100:HAC & SSI1 enable */
188da2014a2SPaul Mundt 	ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
189da2014a2SPaul Mundt 	/* bit14      1:SSI_HAC_CLK enable */
190da2014a2SPaul Mundt 	ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
191da2014a2SPaul Mundt 
192da2014a2SPaul Mundt 	/* SH-Ether */
193da2014a2SPaul Mundt 	ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
194da2014a2SPaul Mundt 	ctrl_outw(0x0, PORT_PFCR);
195da2014a2SPaul Mundt 	ctrl_outw(0x0, PORT_PFCR);
196da2014a2SPaul Mundt 	ctrl_outw(0x0, PORT_PFCR);
197da2014a2SPaul Mundt 
198da2014a2SPaul Mundt 	/* MMC */
199da2014a2SPaul Mundt 	/*selects SCIF and MMC other functions */
200da2014a2SPaul Mundt 	ctrl_outw(0x0001, PORT_PSEL0);
201da2014a2SPaul Mundt 	/* MMC clock operates */
202da2014a2SPaul Mundt 	ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1);
203da2014a2SPaul Mundt 	ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR);
204da2014a2SPaul Mundt 	ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
205da2014a2SPaul Mundt }
206da2014a2SPaul Mundt 
207da2014a2SPaul Mundt static struct sh_machine_vector mv_sh7763rdp __initmv = {
208da2014a2SPaul Mundt 	.mv_name = "sh7763drp",
209da2014a2SPaul Mundt 	.mv_setup = sh7763rdp_setup,
210da2014a2SPaul Mundt 	.mv_nr_irqs = 112,
211da2014a2SPaul Mundt 	.mv_init_irq = init_sh7763rdp_IRQ,
212da2014a2SPaul Mundt };
213