1 /* 2 * linux/arch/sh/boards/se/7724/setup.c 3 * 4 * Copyright (C) 2009 Renesas Solutions Corp. 5 * 6 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #include <linux/init.h> 14 #include <linux/device.h> 15 #include <linux/interrupt.h> 16 #include <linux/platform_device.h> 17 #include <linux/mtd/physmap.h> 18 #include <linux/delay.h> 19 #include <linux/smc91x.h> 20 #include <linux/gpio.h> 21 #include <linux/input.h> 22 #include <linux/usb/r8a66597.h> 23 #include <video/sh_mobile_lcdc.h> 24 #include <media/sh_mobile_ceu.h> 25 #include <asm/io.h> 26 #include <asm/heartbeat.h> 27 #include <asm/sh_eth.h> 28 #include <asm/clock.h> 29 #include <asm/sh_keysc.h> 30 #include <cpu/sh7724.h> 31 #include <mach-se/mach/se7724.h> 32 33 /* 34 * SWx 1234 5678 35 * ------------------------------------ 36 * SW31 : 1001 1100 : default 37 * SW32 : 0111 1111 : use on board flash 38 * 39 * SW41 : abxx xxxx -> a = 0 : Analog monitor 40 * 1 : Digital monitor 41 * b = 0 : VGA 42 * 1 : 720p 43 */ 44 45 /* 46 * about 720p 47 * 48 * When you use 1280 x 720 lcdc output, 49 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz, 50 * and change SW41 to use 720p 51 */ 52 53 /* Heartbeat */ 54 static struct heartbeat_data heartbeat_data = { 55 .regsize = 16, 56 }; 57 58 static struct resource heartbeat_resources[] = { 59 [0] = { 60 .start = PA_LED, 61 .end = PA_LED, 62 .flags = IORESOURCE_MEM, 63 }, 64 }; 65 66 static struct platform_device heartbeat_device = { 67 .name = "heartbeat", 68 .id = -1, 69 .dev = { 70 .platform_data = &heartbeat_data, 71 }, 72 .num_resources = ARRAY_SIZE(heartbeat_resources), 73 .resource = heartbeat_resources, 74 }; 75 76 /* LAN91C111 */ 77 static struct smc91x_platdata smc91x_info = { 78 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 79 }; 80 81 static struct resource smc91x_eth_resources[] = { 82 [0] = { 83 .name = "SMC91C111" , 84 .start = 0x1a300300, 85 .end = 0x1a30030f, 86 .flags = IORESOURCE_MEM, 87 }, 88 [1] = { 89 .start = IRQ0_SMC, 90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 91 }, 92 }; 93 94 static struct platform_device smc91x_eth_device = { 95 .name = "smc91x", 96 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 97 .resource = smc91x_eth_resources, 98 .dev = { 99 .platform_data = &smc91x_info, 100 }, 101 }; 102 103 /* MTD */ 104 static struct mtd_partition nor_flash_partitions[] = { 105 { 106 .name = "uboot", 107 .offset = 0, 108 .size = (1 * 1024 * 1024), 109 .mask_flags = MTD_WRITEABLE, /* Read-only */ 110 }, { 111 .name = "kernel", 112 .offset = MTDPART_OFS_APPEND, 113 .size = (2 * 1024 * 1024), 114 }, { 115 .name = "free-area", 116 .offset = MTDPART_OFS_APPEND, 117 .size = MTDPART_SIZ_FULL, 118 }, 119 }; 120 121 static struct physmap_flash_data nor_flash_data = { 122 .width = 2, 123 .parts = nor_flash_partitions, 124 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 125 }; 126 127 static struct resource nor_flash_resources[] = { 128 [0] = { 129 .name = "NOR Flash", 130 .start = 0x00000000, 131 .end = 0x01ffffff, 132 .flags = IORESOURCE_MEM, 133 } 134 }; 135 136 static struct platform_device nor_flash_device = { 137 .name = "physmap-flash", 138 .resource = nor_flash_resources, 139 .num_resources = ARRAY_SIZE(nor_flash_resources), 140 .dev = { 141 .platform_data = &nor_flash_data, 142 }, 143 }; 144 145 /* LCDC */ 146 static struct sh_mobile_lcdc_info lcdc_info = { 147 .clock_source = LCDC_CLK_EXTERNAL, 148 .ch[0] = { 149 .chan = LCDC_CHAN_MAINLCD, 150 .bpp = 16, 151 .clock_divider = 1, 152 .lcd_cfg = { 153 .name = "LB070WV1", 154 .sync = 0, /* hsync and vsync are active low */ 155 }, 156 .lcd_size_cfg = { /* 7.0 inch */ 157 .width = 152, 158 .height = 91, 159 }, 160 .board_cfg = { 161 }, 162 } 163 }; 164 165 static struct resource lcdc_resources[] = { 166 [0] = { 167 .name = "LCDC", 168 .start = 0xfe940000, 169 .end = 0xfe942fff, 170 .flags = IORESOURCE_MEM, 171 }, 172 [1] = { 173 .start = 106, 174 .flags = IORESOURCE_IRQ, 175 }, 176 }; 177 178 static struct platform_device lcdc_device = { 179 .name = "sh_mobile_lcdc_fb", 180 .num_resources = ARRAY_SIZE(lcdc_resources), 181 .resource = lcdc_resources, 182 .dev = { 183 .platform_data = &lcdc_info, 184 }, 185 .archdata = { 186 .hwblk_id = HWBLK_LCDC, 187 }, 188 }; 189 190 /* CEU0 */ 191 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 192 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 193 }; 194 195 static struct resource ceu0_resources[] = { 196 [0] = { 197 .name = "CEU0", 198 .start = 0xfe910000, 199 .end = 0xfe91009f, 200 .flags = IORESOURCE_MEM, 201 }, 202 [1] = { 203 .start = 52, 204 .flags = IORESOURCE_IRQ, 205 }, 206 [2] = { 207 /* place holder for contiguous memory */ 208 }, 209 }; 210 211 static struct platform_device ceu0_device = { 212 .name = "sh_mobile_ceu", 213 .id = 0, /* "ceu0" clock */ 214 .num_resources = ARRAY_SIZE(ceu0_resources), 215 .resource = ceu0_resources, 216 .dev = { 217 .platform_data = &sh_mobile_ceu0_info, 218 }, 219 .archdata = { 220 .hwblk_id = HWBLK_CEU0, 221 }, 222 }; 223 224 /* CEU1 */ 225 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 226 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 227 }; 228 229 static struct resource ceu1_resources[] = { 230 [0] = { 231 .name = "CEU1", 232 .start = 0xfe914000, 233 .end = 0xfe91409f, 234 .flags = IORESOURCE_MEM, 235 }, 236 [1] = { 237 .start = 63, 238 .flags = IORESOURCE_IRQ, 239 }, 240 [2] = { 241 /* place holder for contiguous memory */ 242 }, 243 }; 244 245 static struct platform_device ceu1_device = { 246 .name = "sh_mobile_ceu", 247 .id = 1, /* "ceu1" clock */ 248 .num_resources = ARRAY_SIZE(ceu1_resources), 249 .resource = ceu1_resources, 250 .dev = { 251 .platform_data = &sh_mobile_ceu1_info, 252 }, 253 .archdata = { 254 .hwblk_id = HWBLK_CEU1, 255 }, 256 }; 257 258 /* KEYSC in SoC (Needs SW33-2 set to ON) */ 259 static struct sh_keysc_info keysc_info = { 260 .mode = SH_KEYSC_MODE_1, 261 .scan_timing = 10, 262 .delay = 50, 263 .keycodes = { 264 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 265 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A, 266 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, 267 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L, 268 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q, 269 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V, 270 }, 271 }; 272 273 static struct resource keysc_resources[] = { 274 [0] = { 275 .name = "KEYSC", 276 .start = 0x044b0000, 277 .end = 0x044b000f, 278 .flags = IORESOURCE_MEM, 279 }, 280 [1] = { 281 .start = 79, 282 .flags = IORESOURCE_IRQ, 283 }, 284 }; 285 286 static struct platform_device keysc_device = { 287 .name = "sh_keysc", 288 .id = 0, /* "keysc0" clock */ 289 .num_resources = ARRAY_SIZE(keysc_resources), 290 .resource = keysc_resources, 291 .dev = { 292 .platform_data = &keysc_info, 293 }, 294 .archdata = { 295 .hwblk_id = HWBLK_KEYSC, 296 }, 297 }; 298 299 /* SH Eth */ 300 static struct resource sh_eth_resources[] = { 301 [0] = { 302 .start = SH_ETH_ADDR, 303 .end = SH_ETH_ADDR + 0x1FC, 304 .flags = IORESOURCE_MEM, 305 }, 306 [1] = { 307 .start = 91, 308 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 309 }, 310 }; 311 312 struct sh_eth_plat_data sh_eth_plat = { 313 .phy = 0x1f, /* SMSC LAN8187 */ 314 .edmac_endian = EDMAC_LITTLE_ENDIAN, 315 }; 316 317 static struct platform_device sh_eth_device = { 318 .name = "sh-eth", 319 .id = 0, 320 .dev = { 321 .platform_data = &sh_eth_plat, 322 }, 323 .num_resources = ARRAY_SIZE(sh_eth_resources), 324 .resource = sh_eth_resources, 325 .archdata = { 326 .hwblk_id = HWBLK_ETHER, 327 }, 328 }; 329 330 static struct r8a66597_platdata sh7724_usb0_host_data = { 331 .on_chip = 1, 332 }; 333 334 static struct resource sh7724_usb0_host_resources[] = { 335 [0] = { 336 .start = 0xa4d80000, 337 .end = 0xa4d80124 - 1, 338 .flags = IORESOURCE_MEM, 339 }, 340 [1] = { 341 .start = 65, 342 .end = 65, 343 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 344 }, 345 }; 346 347 static struct platform_device sh7724_usb0_host_device = { 348 .name = "r8a66597_hcd", 349 .id = 0, 350 .dev = { 351 .dma_mask = NULL, /* not use dma */ 352 .coherent_dma_mask = 0xffffffff, 353 .platform_data = &sh7724_usb0_host_data, 354 }, 355 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), 356 .resource = sh7724_usb0_host_resources, 357 .archdata = { 358 .hwblk_id = HWBLK_USB0, 359 }, 360 }; 361 362 static struct r8a66597_platdata sh7724_usb1_gadget_data = { 363 .on_chip = 1, 364 }; 365 366 static struct resource sh7724_usb1_gadget_resources[] = { 367 [0] = { 368 .start = 0xa4d90000, 369 .end = 0xa4d90123, 370 .flags = IORESOURCE_MEM, 371 }, 372 [1] = { 373 .start = 66, 374 .end = 66, 375 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 376 }, 377 }; 378 379 static struct platform_device sh7724_usb1_gadget_device = { 380 .name = "r8a66597_udc", 381 .id = 1, /* USB1 */ 382 .dev = { 383 .dma_mask = NULL, /* not use dma */ 384 .coherent_dma_mask = 0xffffffff, 385 .platform_data = &sh7724_usb1_gadget_data, 386 }, 387 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources), 388 .resource = sh7724_usb1_gadget_resources, 389 }; 390 391 static struct platform_device *ms7724se_devices[] __initdata = { 392 &heartbeat_device, 393 &smc91x_eth_device, 394 &lcdc_device, 395 &nor_flash_device, 396 &ceu0_device, 397 &ceu1_device, 398 &keysc_device, 399 &sh_eth_device, 400 &sh7724_usb0_host_device, 401 &sh7724_usb1_gadget_device, 402 }; 403 404 #define EEPROM_OP 0xBA206000 405 #define EEPROM_ADR 0xBA206004 406 #define EEPROM_DATA 0xBA20600C 407 #define EEPROM_STAT 0xBA206010 408 #define EEPROM_STRT 0xBA206014 409 static int __init sh_eth_is_eeprom_ready(void) 410 { 411 int t = 10000; 412 413 while (t--) { 414 if (!ctrl_inw(EEPROM_STAT)) 415 return 1; 416 cpu_relax(); 417 } 418 419 printk(KERN_ERR "ms7724se can not access to eeprom\n"); 420 return 0; 421 } 422 423 static void __init sh_eth_init(void) 424 { 425 int i; 426 u16 mac[3]; 427 428 /* check EEPROM status */ 429 if (!sh_eth_is_eeprom_ready()) 430 return; 431 432 /* read MAC addr from EEPROM */ 433 for (i = 0 ; i < 3 ; i++) { 434 ctrl_outw(0x0, EEPROM_OP); /* read */ 435 ctrl_outw(i*2, EEPROM_ADR); 436 ctrl_outw(0x1, EEPROM_STRT); 437 if (!sh_eth_is_eeprom_ready()) 438 return; 439 440 mac[i] = ctrl_inw(EEPROM_DATA); 441 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */ 442 } 443 444 /* reset sh-eth */ 445 ctrl_outl(0x1, SH_ETH_ADDR + 0x0); 446 447 /* set MAC addr */ 448 ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR); 449 ctrl_outl((mac[2]), SH_ETH_MALR); 450 } 451 452 #define SW4140 0xBA201000 453 #define FPGA_OUT 0xBA200400 454 #define PORT_HIZA 0xA4050158 455 #define PORT_MSELCRB 0xA4050182 456 457 #define SW41_A 0x0100 458 #define SW41_B 0x0200 459 #define SW41_C 0x0400 460 #define SW41_D 0x0800 461 #define SW41_E 0x1000 462 #define SW41_F 0x2000 463 #define SW41_G 0x4000 464 #define SW41_H 0x8000 465 466 static int __init devices_setup(void) 467 { 468 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */ 469 470 /* Reset Release */ 471 ctrl_outw(ctrl_inw(FPGA_OUT) & 472 ~((1 << 1) | /* LAN */ 473 (1 << 6) | /* VIDEO DAC */ 474 (1 << 12) | /* USB0 */ 475 (1 << 14)), /* RMII */ 476 FPGA_OUT); 477 478 /* turn on USB clocks, use external clock */ 479 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 480 481 #ifdef CONFIG_PM 482 /* Let LED9 show STATUS2 */ 483 gpio_request(GPIO_FN_STATUS2, NULL); 484 485 /* Lit LED10 show STATUS0 */ 486 gpio_request(GPIO_FN_STATUS0, NULL); 487 488 /* Lit LED11 show PDSTATUS */ 489 gpio_request(GPIO_FN_PDSTATUS, NULL); 490 #else 491 /* Lit LED9 */ 492 gpio_request(GPIO_PTJ6, NULL); 493 gpio_direction_output(GPIO_PTJ6, 1); 494 gpio_export(GPIO_PTJ6, 0); 495 496 /* Lit LED10 */ 497 gpio_request(GPIO_PTJ5, NULL); 498 gpio_direction_output(GPIO_PTJ5, 1); 499 gpio_export(GPIO_PTJ5, 0); 500 501 /* Lit LED11 */ 502 gpio_request(GPIO_PTJ7, NULL); 503 gpio_direction_output(GPIO_PTJ7, 1); 504 gpio_export(GPIO_PTJ7, 0); 505 #endif 506 507 /* enable USB0 port */ 508 ctrl_outw(0x0600, 0xa40501d4); 509 510 /* enable USB1 port */ 511 ctrl_outw(0x0600, 0xa4050192); 512 513 /* enable IRQ 0,1,2 */ 514 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 515 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 516 gpio_request(GPIO_FN_INTC_IRQ2, NULL); 517 518 /* enable SCIFA3 */ 519 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL); 520 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL); 521 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL); 522 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL); 523 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL); 524 525 /* enable LCDC */ 526 gpio_request(GPIO_FN_LCDD23, NULL); 527 gpio_request(GPIO_FN_LCDD22, NULL); 528 gpio_request(GPIO_FN_LCDD21, NULL); 529 gpio_request(GPIO_FN_LCDD20, NULL); 530 gpio_request(GPIO_FN_LCDD19, NULL); 531 gpio_request(GPIO_FN_LCDD18, NULL); 532 gpio_request(GPIO_FN_LCDD17, NULL); 533 gpio_request(GPIO_FN_LCDD16, NULL); 534 gpio_request(GPIO_FN_LCDD15, NULL); 535 gpio_request(GPIO_FN_LCDD14, NULL); 536 gpio_request(GPIO_FN_LCDD13, NULL); 537 gpio_request(GPIO_FN_LCDD12, NULL); 538 gpio_request(GPIO_FN_LCDD11, NULL); 539 gpio_request(GPIO_FN_LCDD10, NULL); 540 gpio_request(GPIO_FN_LCDD9, NULL); 541 gpio_request(GPIO_FN_LCDD8, NULL); 542 gpio_request(GPIO_FN_LCDD7, NULL); 543 gpio_request(GPIO_FN_LCDD6, NULL); 544 gpio_request(GPIO_FN_LCDD5, NULL); 545 gpio_request(GPIO_FN_LCDD4, NULL); 546 gpio_request(GPIO_FN_LCDD3, NULL); 547 gpio_request(GPIO_FN_LCDD2, NULL); 548 gpio_request(GPIO_FN_LCDD1, NULL); 549 gpio_request(GPIO_FN_LCDD0, NULL); 550 gpio_request(GPIO_FN_LCDDISP, NULL); 551 gpio_request(GPIO_FN_LCDHSYN, NULL); 552 gpio_request(GPIO_FN_LCDDCK, NULL); 553 gpio_request(GPIO_FN_LCDVSYN, NULL); 554 gpio_request(GPIO_FN_LCDDON, NULL); 555 gpio_request(GPIO_FN_LCDVEPWC, NULL); 556 gpio_request(GPIO_FN_LCDVCPWC, NULL); 557 gpio_request(GPIO_FN_LCDRD, NULL); 558 gpio_request(GPIO_FN_LCDLCLK, NULL); 559 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 560 561 /* enable CEU0 */ 562 gpio_request(GPIO_FN_VIO0_D15, NULL); 563 gpio_request(GPIO_FN_VIO0_D14, NULL); 564 gpio_request(GPIO_FN_VIO0_D13, NULL); 565 gpio_request(GPIO_FN_VIO0_D12, NULL); 566 gpio_request(GPIO_FN_VIO0_D11, NULL); 567 gpio_request(GPIO_FN_VIO0_D10, NULL); 568 gpio_request(GPIO_FN_VIO0_D9, NULL); 569 gpio_request(GPIO_FN_VIO0_D8, NULL); 570 gpio_request(GPIO_FN_VIO0_D7, NULL); 571 gpio_request(GPIO_FN_VIO0_D6, NULL); 572 gpio_request(GPIO_FN_VIO0_D5, NULL); 573 gpio_request(GPIO_FN_VIO0_D4, NULL); 574 gpio_request(GPIO_FN_VIO0_D3, NULL); 575 gpio_request(GPIO_FN_VIO0_D2, NULL); 576 gpio_request(GPIO_FN_VIO0_D1, NULL); 577 gpio_request(GPIO_FN_VIO0_D0, NULL); 578 gpio_request(GPIO_FN_VIO0_VD, NULL); 579 gpio_request(GPIO_FN_VIO0_CLK, NULL); 580 gpio_request(GPIO_FN_VIO0_FLD, NULL); 581 gpio_request(GPIO_FN_VIO0_HD, NULL); 582 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 583 584 /* enable CEU1 */ 585 gpio_request(GPIO_FN_VIO1_D7, NULL); 586 gpio_request(GPIO_FN_VIO1_D6, NULL); 587 gpio_request(GPIO_FN_VIO1_D5, NULL); 588 gpio_request(GPIO_FN_VIO1_D4, NULL); 589 gpio_request(GPIO_FN_VIO1_D3, NULL); 590 gpio_request(GPIO_FN_VIO1_D2, NULL); 591 gpio_request(GPIO_FN_VIO1_D1, NULL); 592 gpio_request(GPIO_FN_VIO1_D0, NULL); 593 gpio_request(GPIO_FN_VIO1_FLD, NULL); 594 gpio_request(GPIO_FN_VIO1_HD, NULL); 595 gpio_request(GPIO_FN_VIO1_VD, NULL); 596 gpio_request(GPIO_FN_VIO1_CLK, NULL); 597 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 598 599 /* KEYSC */ 600 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 601 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 602 gpio_request(GPIO_FN_KEYIN4, NULL); 603 gpio_request(GPIO_FN_KEYIN3, NULL); 604 gpio_request(GPIO_FN_KEYIN2, NULL); 605 gpio_request(GPIO_FN_KEYIN1, NULL); 606 gpio_request(GPIO_FN_KEYIN0, NULL); 607 gpio_request(GPIO_FN_KEYOUT3, NULL); 608 gpio_request(GPIO_FN_KEYOUT2, NULL); 609 gpio_request(GPIO_FN_KEYOUT1, NULL); 610 gpio_request(GPIO_FN_KEYOUT0, NULL); 611 612 /* 613 * enable SH-Eth 614 * 615 * please remove J33 pin from your board !! 616 * 617 * ms7724 board should not use GPIO_FN_LNKSTA pin 618 * So, This time PTX5 is set to input pin 619 */ 620 gpio_request(GPIO_FN_RMII_RXD0, NULL); 621 gpio_request(GPIO_FN_RMII_RXD1, NULL); 622 gpio_request(GPIO_FN_RMII_TXD0, NULL); 623 gpio_request(GPIO_FN_RMII_TXD1, NULL); 624 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 625 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 626 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 627 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 628 gpio_request(GPIO_FN_MDIO, NULL); 629 gpio_request(GPIO_FN_MDC, NULL); 630 gpio_request(GPIO_PTX5, NULL); 631 gpio_direction_input(GPIO_PTX5); 632 sh_eth_init(); 633 634 if (sw & SW41_B) { 635 /* 720p */ 636 lcdc_info.ch[0].lcd_cfg.xres = 1280; 637 lcdc_info.ch[0].lcd_cfg.yres = 720; 638 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 639 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 640 lcdc_info.ch[0].lcd_cfg.hsync_len = 40; 641 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 642 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 643 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 644 } else { 645 /* VGA */ 646 lcdc_info.ch[0].lcd_cfg.xres = 640; 647 lcdc_info.ch[0].lcd_cfg.yres = 480; 648 lcdc_info.ch[0].lcd_cfg.left_margin = 105; 649 lcdc_info.ch[0].lcd_cfg.right_margin = 50; 650 lcdc_info.ch[0].lcd_cfg.hsync_len = 96; 651 lcdc_info.ch[0].lcd_cfg.upper_margin = 33; 652 lcdc_info.ch[0].lcd_cfg.lower_margin = 10; 653 lcdc_info.ch[0].lcd_cfg.vsync_len = 2; 654 } 655 656 if (sw & SW41_A) { 657 /* Digital monitor */ 658 lcdc_info.ch[0].interface_type = RGB18; 659 lcdc_info.ch[0].flags = 0; 660 } else { 661 /* Analog monitor */ 662 lcdc_info.ch[0].interface_type = RGB24; 663 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; 664 } 665 666 return platform_add_devices(ms7724se_devices, 667 ARRAY_SIZE(ms7724se_devices)); 668 } 669 device_initcall(devices_setup); 670 671 static struct sh_machine_vector mv_ms7724se __initmv = { 672 .mv_name = "ms7724se", 673 .mv_init_irq = init_se7724_IRQ, 674 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR, 675 }; 676