1 /* 2 * linux/arch/sh/boards/se/7724/setup.c 3 * 4 * Copyright (C) 2009 Renesas Solutions Corp. 5 * 6 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #include <linux/init.h> 14 #include <linux/device.h> 15 #include <linux/interrupt.h> 16 #include <linux/platform_device.h> 17 #include <linux/mmc/host.h> 18 #include <linux/mmc/sh_mobile_sdhi.h> 19 #include <linux/mtd/physmap.h> 20 #include <linux/delay.h> 21 #include <linux/regulator/fixed.h> 22 #include <linux/regulator/machine.h> 23 #include <linux/smc91x.h> 24 #include <linux/gpio.h> 25 #include <linux/input.h> 26 #include <linux/input/sh_keysc.h> 27 #include <linux/usb/r8a66597.h> 28 #include <linux/sh_eth.h> 29 #include <linux/sh_intc.h> 30 #include <linux/videodev2.h> 31 #include <video/sh_mobile_lcdc.h> 32 #include <media/sh_mobile_ceu.h> 33 #include <sound/sh_fsi.h> 34 #include <sound/simple_card.h> 35 #include <asm/io.h> 36 #include <asm/heartbeat.h> 37 #include <asm/clock.h> 38 #include <asm/suspend.h> 39 #include <cpu/sh7724.h> 40 #include <mach-se/mach/se7724.h> 41 42 /* 43 * SWx 1234 5678 44 * ------------------------------------ 45 * SW31 : 1001 1100 : default 46 * SW32 : 0111 1111 : use on board flash 47 * 48 * SW41 : abxx xxxx -> a = 0 : Analog monitor 49 * 1 : Digital monitor 50 * b = 0 : VGA 51 * 1 : 720p 52 */ 53 54 /* 55 * about 720p 56 * 57 * When you use 1280 x 720 lcdc output, 58 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz, 59 * and change SW41 to use 720p 60 */ 61 62 /* 63 * about sound 64 * 65 * This setup.c supports FSI slave mode. 66 * Please change J20, J21, J22 pin to 1-2 connection. 67 */ 68 69 /* Heartbeat */ 70 static struct resource heartbeat_resource = { 71 .start = PA_LED, 72 .end = PA_LED, 73 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, 74 }; 75 76 static struct platform_device heartbeat_device = { 77 .name = "heartbeat", 78 .id = -1, 79 .num_resources = 1, 80 .resource = &heartbeat_resource, 81 }; 82 83 /* LAN91C111 */ 84 static struct smc91x_platdata smc91x_info = { 85 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 86 }; 87 88 static struct resource smc91x_eth_resources[] = { 89 [0] = { 90 .name = "SMC91C111" , 91 .start = 0x1a300300, 92 .end = 0x1a30030f, 93 .flags = IORESOURCE_MEM, 94 }, 95 [1] = { 96 .start = IRQ0_SMC, 97 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 98 }, 99 }; 100 101 static struct platform_device smc91x_eth_device = { 102 .name = "smc91x", 103 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 104 .resource = smc91x_eth_resources, 105 .dev = { 106 .platform_data = &smc91x_info, 107 }, 108 }; 109 110 /* MTD */ 111 static struct mtd_partition nor_flash_partitions[] = { 112 { 113 .name = "uboot", 114 .offset = 0, 115 .size = (1 * 1024 * 1024), 116 .mask_flags = MTD_WRITEABLE, /* Read-only */ 117 }, { 118 .name = "kernel", 119 .offset = MTDPART_OFS_APPEND, 120 .size = (2 * 1024 * 1024), 121 }, { 122 .name = "free-area", 123 .offset = MTDPART_OFS_APPEND, 124 .size = MTDPART_SIZ_FULL, 125 }, 126 }; 127 128 static struct physmap_flash_data nor_flash_data = { 129 .width = 2, 130 .parts = nor_flash_partitions, 131 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 132 }; 133 134 static struct resource nor_flash_resources[] = { 135 [0] = { 136 .name = "NOR Flash", 137 .start = 0x00000000, 138 .end = 0x01ffffff, 139 .flags = IORESOURCE_MEM, 140 } 141 }; 142 143 static struct platform_device nor_flash_device = { 144 .name = "physmap-flash", 145 .resource = nor_flash_resources, 146 .num_resources = ARRAY_SIZE(nor_flash_resources), 147 .dev = { 148 .platform_data = &nor_flash_data, 149 }, 150 }; 151 152 /* LCDC */ 153 static const struct fb_videomode lcdc_720p_modes[] = { 154 { 155 .name = "LB070WV1", 156 .sync = 0, /* hsync and vsync are active low */ 157 .xres = 1280, 158 .yres = 720, 159 .left_margin = 220, 160 .right_margin = 110, 161 .hsync_len = 40, 162 .upper_margin = 20, 163 .lower_margin = 5, 164 .vsync_len = 5, 165 }, 166 }; 167 168 static const struct fb_videomode lcdc_vga_modes[] = { 169 { 170 .name = "LB070WV1", 171 .sync = 0, /* hsync and vsync are active low */ 172 .xres = 640, 173 .yres = 480, 174 .left_margin = 105, 175 .right_margin = 50, 176 .hsync_len = 96, 177 .upper_margin = 33, 178 .lower_margin = 10, 179 .vsync_len = 2, 180 }, 181 }; 182 183 static struct sh_mobile_lcdc_info lcdc_info = { 184 .clock_source = LCDC_CLK_EXTERNAL, 185 .ch[0] = { 186 .chan = LCDC_CHAN_MAINLCD, 187 .fourcc = V4L2_PIX_FMT_RGB565, 188 .clock_divider = 1, 189 .panel_cfg = { /* 7.0 inch */ 190 .width = 152, 191 .height = 91, 192 }, 193 } 194 }; 195 196 static struct resource lcdc_resources[] = { 197 [0] = { 198 .name = "LCDC", 199 .start = 0xfe940000, 200 .end = 0xfe942fff, 201 .flags = IORESOURCE_MEM, 202 }, 203 [1] = { 204 .start = evt2irq(0xf40), 205 .flags = IORESOURCE_IRQ, 206 }, 207 }; 208 209 static struct platform_device lcdc_device = { 210 .name = "sh_mobile_lcdc_fb", 211 .num_resources = ARRAY_SIZE(lcdc_resources), 212 .resource = lcdc_resources, 213 .dev = { 214 .platform_data = &lcdc_info, 215 }, 216 }; 217 218 /* CEU0 */ 219 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 220 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 221 }; 222 223 static struct resource ceu0_resources[] = { 224 [0] = { 225 .name = "CEU0", 226 .start = 0xfe910000, 227 .end = 0xfe91009f, 228 .flags = IORESOURCE_MEM, 229 }, 230 [1] = { 231 .start = evt2irq(0x880), 232 .flags = IORESOURCE_IRQ, 233 }, 234 [2] = { 235 /* place holder for contiguous memory */ 236 }, 237 }; 238 239 static struct platform_device ceu0_device = { 240 .name = "sh_mobile_ceu", 241 .id = 0, /* "ceu0" clock */ 242 .num_resources = ARRAY_SIZE(ceu0_resources), 243 .resource = ceu0_resources, 244 .dev = { 245 .platform_data = &sh_mobile_ceu0_info, 246 }, 247 }; 248 249 /* CEU1 */ 250 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 251 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 252 }; 253 254 static struct resource ceu1_resources[] = { 255 [0] = { 256 .name = "CEU1", 257 .start = 0xfe914000, 258 .end = 0xfe91409f, 259 .flags = IORESOURCE_MEM, 260 }, 261 [1] = { 262 .start = evt2irq(0x9e0), 263 .flags = IORESOURCE_IRQ, 264 }, 265 [2] = { 266 /* place holder for contiguous memory */ 267 }, 268 }; 269 270 static struct platform_device ceu1_device = { 271 .name = "sh_mobile_ceu", 272 .id = 1, /* "ceu1" clock */ 273 .num_resources = ARRAY_SIZE(ceu1_resources), 274 .resource = ceu1_resources, 275 .dev = { 276 .platform_data = &sh_mobile_ceu1_info, 277 }, 278 }; 279 280 /* FSI */ 281 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ 282 static struct resource fsi_resources[] = { 283 [0] = { 284 .name = "FSI", 285 .start = 0xFE3C0000, 286 .end = 0xFE3C021d, 287 .flags = IORESOURCE_MEM, 288 }, 289 [1] = { 290 .start = evt2irq(0xf80), 291 .flags = IORESOURCE_IRQ, 292 }, 293 }; 294 295 static struct platform_device fsi_device = { 296 .name = "sh_fsi", 297 .id = 0, 298 .num_resources = ARRAY_SIZE(fsi_resources), 299 .resource = fsi_resources, 300 }; 301 302 static struct asoc_simple_card_info fsi_ak4642_info = { 303 .name = "AK4642", 304 .card = "FSIA-AK4642", 305 .codec = "ak4642-codec.0-0012", 306 .platform = "sh_fsi.0", 307 .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM, 308 .cpu_dai = { 309 .name = "fsia-dai", 310 }, 311 .codec_dai = { 312 .name = "ak4642-hifi", 313 .sysclk = 11289600, 314 }, 315 }; 316 317 static struct platform_device fsi_ak4642_device = { 318 .name = "asoc-simple-card", 319 .dev = { 320 .platform_data = &fsi_ak4642_info, 321 }, 322 }; 323 324 /* KEYSC in SoC (Needs SW33-2 set to ON) */ 325 static struct sh_keysc_info keysc_info = { 326 .mode = SH_KEYSC_MODE_1, 327 .scan_timing = 3, 328 .delay = 50, 329 .keycodes = { 330 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 331 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A, 332 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, 333 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L, 334 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q, 335 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V, 336 }, 337 }; 338 339 static struct resource keysc_resources[] = { 340 [0] = { 341 .name = "KEYSC", 342 .start = 0x044b0000, 343 .end = 0x044b000f, 344 .flags = IORESOURCE_MEM, 345 }, 346 [1] = { 347 .start = evt2irq(0xbe0), 348 .flags = IORESOURCE_IRQ, 349 }, 350 }; 351 352 static struct platform_device keysc_device = { 353 .name = "sh_keysc", 354 .id = 0, /* "keysc0" clock */ 355 .num_resources = ARRAY_SIZE(keysc_resources), 356 .resource = keysc_resources, 357 .dev = { 358 .platform_data = &keysc_info, 359 }, 360 }; 361 362 /* SH Eth */ 363 static struct resource sh_eth_resources[] = { 364 [0] = { 365 .start = SH_ETH_ADDR, 366 .end = SH_ETH_ADDR + 0x1FC - 1, 367 .flags = IORESOURCE_MEM, 368 }, 369 [1] = { 370 .start = evt2irq(0xd60), 371 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 372 }, 373 }; 374 375 static struct sh_eth_plat_data sh_eth_plat = { 376 .phy = 0x1f, /* SMSC LAN8187 */ 377 .edmac_endian = EDMAC_LITTLE_ENDIAN, 378 .phy_interface = PHY_INTERFACE_MODE_MII, 379 }; 380 381 static struct platform_device sh_eth_device = { 382 .name = "sh7724-ether", 383 .id = 0, 384 .dev = { 385 .platform_data = &sh_eth_plat, 386 }, 387 .num_resources = ARRAY_SIZE(sh_eth_resources), 388 .resource = sh_eth_resources, 389 }; 390 391 static struct r8a66597_platdata sh7724_usb0_host_data = { 392 .on_chip = 1, 393 }; 394 395 static struct resource sh7724_usb0_host_resources[] = { 396 [0] = { 397 .start = 0xa4d80000, 398 .end = 0xa4d80124 - 1, 399 .flags = IORESOURCE_MEM, 400 }, 401 [1] = { 402 .start = evt2irq(0xa20), 403 .end = evt2irq(0xa20), 404 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 405 }, 406 }; 407 408 static struct platform_device sh7724_usb0_host_device = { 409 .name = "r8a66597_hcd", 410 .id = 0, 411 .dev = { 412 .dma_mask = NULL, /* not use dma */ 413 .coherent_dma_mask = 0xffffffff, 414 .platform_data = &sh7724_usb0_host_data, 415 }, 416 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), 417 .resource = sh7724_usb0_host_resources, 418 }; 419 420 static struct r8a66597_platdata sh7724_usb1_gadget_data = { 421 .on_chip = 1, 422 }; 423 424 static struct resource sh7724_usb1_gadget_resources[] = { 425 [0] = { 426 .start = 0xa4d90000, 427 .end = 0xa4d90123, 428 .flags = IORESOURCE_MEM, 429 }, 430 [1] = { 431 .start = evt2irq(0xa40), 432 .end = evt2irq(0xa40), 433 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 434 }, 435 }; 436 437 static struct platform_device sh7724_usb1_gadget_device = { 438 .name = "r8a66597_udc", 439 .id = 1, /* USB1 */ 440 .dev = { 441 .dma_mask = NULL, /* not use dma */ 442 .coherent_dma_mask = 0xffffffff, 443 .platform_data = &sh7724_usb1_gadget_data, 444 }, 445 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources), 446 .resource = sh7724_usb1_gadget_resources, 447 }; 448 449 /* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */ 450 static struct regulator_consumer_supply fixed3v3_power_consumers[] = 451 { 452 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), 453 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), 454 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), 455 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), 456 }; 457 458 static struct resource sdhi0_cn7_resources[] = { 459 [0] = { 460 .name = "SDHI0", 461 .start = 0x04ce0000, 462 .end = 0x04ce00ff, 463 .flags = IORESOURCE_MEM, 464 }, 465 [1] = { 466 .start = evt2irq(0xe80), 467 .flags = IORESOURCE_IRQ, 468 }, 469 }; 470 471 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = { 472 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 473 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 474 .tmio_caps = MMC_CAP_SDIO_IRQ, 475 }; 476 477 static struct platform_device sdhi0_cn7_device = { 478 .name = "sh_mobile_sdhi", 479 .id = 0, 480 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources), 481 .resource = sdhi0_cn7_resources, 482 .dev = { 483 .platform_data = &sh7724_sdhi0_data, 484 }, 485 }; 486 487 static struct resource sdhi1_cn8_resources[] = { 488 [0] = { 489 .name = "SDHI1", 490 .start = 0x04cf0000, 491 .end = 0x04cf00ff, 492 .flags = IORESOURCE_MEM, 493 }, 494 [1] = { 495 .start = evt2irq(0x4e0), 496 .flags = IORESOURCE_IRQ, 497 }, 498 }; 499 500 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = { 501 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 502 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 503 .tmio_caps = MMC_CAP_SDIO_IRQ, 504 }; 505 506 static struct platform_device sdhi1_cn8_device = { 507 .name = "sh_mobile_sdhi", 508 .id = 1, 509 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources), 510 .resource = sdhi1_cn8_resources, 511 .dev = { 512 .platform_data = &sh7724_sdhi1_data, 513 }, 514 }; 515 516 /* IrDA */ 517 static struct resource irda_resources[] = { 518 [0] = { 519 .name = "IrDA", 520 .start = 0xA45D0000, 521 .end = 0xA45D0049, 522 .flags = IORESOURCE_MEM, 523 }, 524 [1] = { 525 .start = evt2irq(0x480), 526 .flags = IORESOURCE_IRQ, 527 }, 528 }; 529 530 static struct platform_device irda_device = { 531 .name = "sh_sir", 532 .num_resources = ARRAY_SIZE(irda_resources), 533 .resource = irda_resources, 534 }; 535 536 #include <media/ak881x.h> 537 #include <media/sh_vou.h> 538 539 static struct ak881x_pdata ak881x_pdata = { 540 .flags = AK881X_IF_MODE_SLAVE, 541 }; 542 543 static struct i2c_board_info ak8813 = { 544 /* With open J18 jumper address is 0x21 */ 545 I2C_BOARD_INFO("ak8813", 0x20), 546 .platform_data = &ak881x_pdata, 547 }; 548 549 static struct sh_vou_pdata sh_vou_pdata = { 550 .bus_fmt = SH_VOU_BUS_8BIT, 551 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, 552 .board_info = &ak8813, 553 .i2c_adap = 0, 554 }; 555 556 static struct resource sh_vou_resources[] = { 557 [0] = { 558 .start = 0xfe960000, 559 .end = 0xfe962043, 560 .flags = IORESOURCE_MEM, 561 }, 562 [1] = { 563 .start = evt2irq(0x8e0), 564 .flags = IORESOURCE_IRQ, 565 }, 566 }; 567 568 static struct platform_device vou_device = { 569 .name = "sh-vou", 570 .id = -1, 571 .num_resources = ARRAY_SIZE(sh_vou_resources), 572 .resource = sh_vou_resources, 573 .dev = { 574 .platform_data = &sh_vou_pdata, 575 }, 576 }; 577 578 static struct platform_device *ms7724se_devices[] __initdata = { 579 &heartbeat_device, 580 &smc91x_eth_device, 581 &lcdc_device, 582 &nor_flash_device, 583 &ceu0_device, 584 &ceu1_device, 585 &keysc_device, 586 &sh_eth_device, 587 &sh7724_usb0_host_device, 588 &sh7724_usb1_gadget_device, 589 &fsi_device, 590 &fsi_ak4642_device, 591 &sdhi0_cn7_device, 592 &sdhi1_cn8_device, 593 &irda_device, 594 &vou_device, 595 }; 596 597 /* I2C device */ 598 static struct i2c_board_info i2c0_devices[] = { 599 { 600 I2C_BOARD_INFO("ak4642", 0x12), 601 }, 602 }; 603 604 #define EEPROM_OP 0xBA206000 605 #define EEPROM_ADR 0xBA206004 606 #define EEPROM_DATA 0xBA20600C 607 #define EEPROM_STAT 0xBA206010 608 #define EEPROM_STRT 0xBA206014 609 610 static int __init sh_eth_is_eeprom_ready(void) 611 { 612 int t = 10000; 613 614 while (t--) { 615 if (!__raw_readw(EEPROM_STAT)) 616 return 1; 617 udelay(1); 618 } 619 620 printk(KERN_ERR "ms7724se can not access to eeprom\n"); 621 return 0; 622 } 623 624 static void __init sh_eth_init(void) 625 { 626 int i; 627 u16 mac; 628 629 /* check EEPROM status */ 630 if (!sh_eth_is_eeprom_ready()) 631 return; 632 633 /* read MAC addr from EEPROM */ 634 for (i = 0 ; i < 3 ; i++) { 635 __raw_writew(0x0, EEPROM_OP); /* read */ 636 __raw_writew(i*2, EEPROM_ADR); 637 __raw_writew(0x1, EEPROM_STRT); 638 if (!sh_eth_is_eeprom_ready()) 639 return; 640 641 mac = __raw_readw(EEPROM_DATA); 642 sh_eth_plat.mac_addr[i << 1] = mac & 0xff; 643 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8; 644 } 645 } 646 647 #define SW4140 0xBA201000 648 #define FPGA_OUT 0xBA200400 649 #define PORT_HIZA 0xA4050158 650 #define PORT_MSELCRB 0xA4050182 651 652 #define SW41_A 0x0100 653 #define SW41_B 0x0200 654 #define SW41_C 0x0400 655 #define SW41_D 0x0800 656 #define SW41_E 0x1000 657 #define SW41_F 0x2000 658 #define SW41_G 0x4000 659 #define SW41_H 0x8000 660 661 extern char ms7724se_sdram_enter_start; 662 extern char ms7724se_sdram_enter_end; 663 extern char ms7724se_sdram_leave_start; 664 extern char ms7724se_sdram_leave_end; 665 666 static int __init arch_setup(void) 667 { 668 /* enable I2C device */ 669 i2c_register_board_info(0, i2c0_devices, 670 ARRAY_SIZE(i2c0_devices)); 671 return 0; 672 } 673 arch_initcall(arch_setup); 674 675 static int __init devices_setup(void) 676 { 677 u16 sw = __raw_readw(SW4140); /* select camera, monitor */ 678 struct clk *clk; 679 u16 fpga_out; 680 681 /* register board specific self-refresh code */ 682 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | 683 SUSP_SH_RSTANDBY, 684 &ms7724se_sdram_enter_start, 685 &ms7724se_sdram_enter_end, 686 &ms7724se_sdram_leave_start, 687 &ms7724se_sdram_leave_end); 688 689 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, 690 ARRAY_SIZE(fixed3v3_power_consumers), 3300000); 691 692 /* Reset Release */ 693 fpga_out = __raw_readw(FPGA_OUT); 694 /* bit4: NTSC_PDN, bit5: NTSC_RESET */ 695 fpga_out &= ~((1 << 1) | /* LAN */ 696 (1 << 4) | /* AK8813 PDN */ 697 (1 << 5) | /* AK8813 RESET */ 698 (1 << 6) | /* VIDEO DAC */ 699 (1 << 7) | /* AK4643 */ 700 (1 << 8) | /* IrDA */ 701 (1 << 12) | /* USB0 */ 702 (1 << 14)); /* RMII */ 703 __raw_writew(fpga_out | (1 << 4), FPGA_OUT); 704 705 udelay(10); 706 707 /* AK8813 RESET */ 708 __raw_writew(fpga_out | (1 << 5), FPGA_OUT); 709 710 udelay(10); 711 712 __raw_writew(fpga_out, FPGA_OUT); 713 714 /* turn on USB clocks, use external clock */ 715 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 716 717 /* Let LED9 show STATUS2 */ 718 gpio_request(GPIO_FN_STATUS2, NULL); 719 720 /* Lit LED10 show STATUS0 */ 721 gpio_request(GPIO_FN_STATUS0, NULL); 722 723 /* Lit LED11 show PDSTATUS */ 724 gpio_request(GPIO_FN_PDSTATUS, NULL); 725 726 /* enable USB0 port */ 727 __raw_writew(0x0600, 0xa40501d4); 728 729 /* enable USB1 port */ 730 __raw_writew(0x0600, 0xa4050192); 731 732 /* enable IRQ 0,1,2 */ 733 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 734 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 735 gpio_request(GPIO_FN_INTC_IRQ2, NULL); 736 737 /* enable SCIFA3 */ 738 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL); 739 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL); 740 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL); 741 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL); 742 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL); 743 744 /* enable LCDC */ 745 gpio_request(GPIO_FN_LCDD23, NULL); 746 gpio_request(GPIO_FN_LCDD22, NULL); 747 gpio_request(GPIO_FN_LCDD21, NULL); 748 gpio_request(GPIO_FN_LCDD20, NULL); 749 gpio_request(GPIO_FN_LCDD19, NULL); 750 gpio_request(GPIO_FN_LCDD18, NULL); 751 gpio_request(GPIO_FN_LCDD17, NULL); 752 gpio_request(GPIO_FN_LCDD16, NULL); 753 gpio_request(GPIO_FN_LCDD15, NULL); 754 gpio_request(GPIO_FN_LCDD14, NULL); 755 gpio_request(GPIO_FN_LCDD13, NULL); 756 gpio_request(GPIO_FN_LCDD12, NULL); 757 gpio_request(GPIO_FN_LCDD11, NULL); 758 gpio_request(GPIO_FN_LCDD10, NULL); 759 gpio_request(GPIO_FN_LCDD9, NULL); 760 gpio_request(GPIO_FN_LCDD8, NULL); 761 gpio_request(GPIO_FN_LCDD7, NULL); 762 gpio_request(GPIO_FN_LCDD6, NULL); 763 gpio_request(GPIO_FN_LCDD5, NULL); 764 gpio_request(GPIO_FN_LCDD4, NULL); 765 gpio_request(GPIO_FN_LCDD3, NULL); 766 gpio_request(GPIO_FN_LCDD2, NULL); 767 gpio_request(GPIO_FN_LCDD1, NULL); 768 gpio_request(GPIO_FN_LCDD0, NULL); 769 gpio_request(GPIO_FN_LCDDISP, NULL); 770 gpio_request(GPIO_FN_LCDHSYN, NULL); 771 gpio_request(GPIO_FN_LCDDCK, NULL); 772 gpio_request(GPIO_FN_LCDVSYN, NULL); 773 gpio_request(GPIO_FN_LCDDON, NULL); 774 gpio_request(GPIO_FN_LCDVEPWC, NULL); 775 gpio_request(GPIO_FN_LCDVCPWC, NULL); 776 gpio_request(GPIO_FN_LCDRD, NULL); 777 gpio_request(GPIO_FN_LCDLCLK, NULL); 778 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); 779 780 /* enable CEU0 */ 781 gpio_request(GPIO_FN_VIO0_D15, NULL); 782 gpio_request(GPIO_FN_VIO0_D14, NULL); 783 gpio_request(GPIO_FN_VIO0_D13, NULL); 784 gpio_request(GPIO_FN_VIO0_D12, NULL); 785 gpio_request(GPIO_FN_VIO0_D11, NULL); 786 gpio_request(GPIO_FN_VIO0_D10, NULL); 787 gpio_request(GPIO_FN_VIO0_D9, NULL); 788 gpio_request(GPIO_FN_VIO0_D8, NULL); 789 gpio_request(GPIO_FN_VIO0_D7, NULL); 790 gpio_request(GPIO_FN_VIO0_D6, NULL); 791 gpio_request(GPIO_FN_VIO0_D5, NULL); 792 gpio_request(GPIO_FN_VIO0_D4, NULL); 793 gpio_request(GPIO_FN_VIO0_D3, NULL); 794 gpio_request(GPIO_FN_VIO0_D2, NULL); 795 gpio_request(GPIO_FN_VIO0_D1, NULL); 796 gpio_request(GPIO_FN_VIO0_D0, NULL); 797 gpio_request(GPIO_FN_VIO0_VD, NULL); 798 gpio_request(GPIO_FN_VIO0_CLK, NULL); 799 gpio_request(GPIO_FN_VIO0_FLD, NULL); 800 gpio_request(GPIO_FN_VIO0_HD, NULL); 801 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 802 803 /* enable CEU1 */ 804 gpio_request(GPIO_FN_VIO1_D7, NULL); 805 gpio_request(GPIO_FN_VIO1_D6, NULL); 806 gpio_request(GPIO_FN_VIO1_D5, NULL); 807 gpio_request(GPIO_FN_VIO1_D4, NULL); 808 gpio_request(GPIO_FN_VIO1_D3, NULL); 809 gpio_request(GPIO_FN_VIO1_D2, NULL); 810 gpio_request(GPIO_FN_VIO1_D1, NULL); 811 gpio_request(GPIO_FN_VIO1_D0, NULL); 812 gpio_request(GPIO_FN_VIO1_FLD, NULL); 813 gpio_request(GPIO_FN_VIO1_HD, NULL); 814 gpio_request(GPIO_FN_VIO1_VD, NULL); 815 gpio_request(GPIO_FN_VIO1_CLK, NULL); 816 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 817 818 /* KEYSC */ 819 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 820 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 821 gpio_request(GPIO_FN_KEYIN4, NULL); 822 gpio_request(GPIO_FN_KEYIN3, NULL); 823 gpio_request(GPIO_FN_KEYIN2, NULL); 824 gpio_request(GPIO_FN_KEYIN1, NULL); 825 gpio_request(GPIO_FN_KEYIN0, NULL); 826 gpio_request(GPIO_FN_KEYOUT3, NULL); 827 gpio_request(GPIO_FN_KEYOUT2, NULL); 828 gpio_request(GPIO_FN_KEYOUT1, NULL); 829 gpio_request(GPIO_FN_KEYOUT0, NULL); 830 831 /* enable FSI */ 832 gpio_request(GPIO_FN_FSIMCKA, NULL); 833 gpio_request(GPIO_FN_FSIIASD, NULL); 834 gpio_request(GPIO_FN_FSIOASD, NULL); 835 gpio_request(GPIO_FN_FSIIABCK, NULL); 836 gpio_request(GPIO_FN_FSIIALRCK, NULL); 837 gpio_request(GPIO_FN_FSIOABCK, NULL); 838 gpio_request(GPIO_FN_FSIOALRCK, NULL); 839 gpio_request(GPIO_FN_CLKAUDIOAO, NULL); 840 841 /* set SPU2 clock to 83.4 MHz */ 842 clk = clk_get(NULL, "spu_clk"); 843 if (!IS_ERR(clk)) { 844 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 845 clk_put(clk); 846 } 847 848 /* change parent of FSI A */ 849 clk = clk_get(NULL, "fsia_clk"); 850 if (!IS_ERR(clk)) { 851 /* 48kHz dummy clock was used to make sure 1/1 divide */ 852 clk_set_rate(&sh7724_fsimcka_clk, 48000); 853 clk_set_parent(clk, &sh7724_fsimcka_clk); 854 clk_set_rate(clk, 48000); 855 clk_put(clk); 856 } 857 858 /* SDHI0 connected to cn7 */ 859 gpio_request(GPIO_FN_SDHI0CD, NULL); 860 gpio_request(GPIO_FN_SDHI0WP, NULL); 861 gpio_request(GPIO_FN_SDHI0D3, NULL); 862 gpio_request(GPIO_FN_SDHI0D2, NULL); 863 gpio_request(GPIO_FN_SDHI0D1, NULL); 864 gpio_request(GPIO_FN_SDHI0D0, NULL); 865 gpio_request(GPIO_FN_SDHI0CMD, NULL); 866 gpio_request(GPIO_FN_SDHI0CLK, NULL); 867 868 /* SDHI1 connected to cn8 */ 869 gpio_request(GPIO_FN_SDHI1CD, NULL); 870 gpio_request(GPIO_FN_SDHI1WP, NULL); 871 gpio_request(GPIO_FN_SDHI1D3, NULL); 872 gpio_request(GPIO_FN_SDHI1D2, NULL); 873 gpio_request(GPIO_FN_SDHI1D1, NULL); 874 gpio_request(GPIO_FN_SDHI1D0, NULL); 875 gpio_request(GPIO_FN_SDHI1CMD, NULL); 876 gpio_request(GPIO_FN_SDHI1CLK, NULL); 877 878 /* enable IrDA */ 879 gpio_request(GPIO_FN_IRDA_OUT, NULL); 880 gpio_request(GPIO_FN_IRDA_IN, NULL); 881 882 /* 883 * enable SH-Eth 884 * 885 * please remove J33 pin from your board !! 886 * 887 * ms7724 board should not use GPIO_FN_LNKSTA pin 888 * So, This time PTX5 is set to input pin 889 */ 890 gpio_request(GPIO_FN_RMII_RXD0, NULL); 891 gpio_request(GPIO_FN_RMII_RXD1, NULL); 892 gpio_request(GPIO_FN_RMII_TXD0, NULL); 893 gpio_request(GPIO_FN_RMII_TXD1, NULL); 894 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 895 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 896 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 897 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 898 gpio_request(GPIO_FN_MDIO, NULL); 899 gpio_request(GPIO_FN_MDC, NULL); 900 gpio_request(GPIO_PTX5, NULL); 901 gpio_direction_input(GPIO_PTX5); 902 sh_eth_init(); 903 904 if (sw & SW41_B) { 905 /* 720p */ 906 lcdc_info.ch[0].lcd_modes = lcdc_720p_modes; 907 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes); 908 } else { 909 /* VGA */ 910 lcdc_info.ch[0].lcd_modes = lcdc_vga_modes; 911 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes); 912 } 913 914 if (sw & SW41_A) { 915 /* Digital monitor */ 916 lcdc_info.ch[0].interface_type = RGB18; 917 lcdc_info.ch[0].flags = 0; 918 } else { 919 /* Analog monitor */ 920 lcdc_info.ch[0].interface_type = RGB24; 921 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; 922 } 923 924 /* VOU */ 925 gpio_request(GPIO_FN_DV_D15, NULL); 926 gpio_request(GPIO_FN_DV_D14, NULL); 927 gpio_request(GPIO_FN_DV_D13, NULL); 928 gpio_request(GPIO_FN_DV_D12, NULL); 929 gpio_request(GPIO_FN_DV_D11, NULL); 930 gpio_request(GPIO_FN_DV_D10, NULL); 931 gpio_request(GPIO_FN_DV_D9, NULL); 932 gpio_request(GPIO_FN_DV_D8, NULL); 933 gpio_request(GPIO_FN_DV_CLKI, NULL); 934 gpio_request(GPIO_FN_DV_CLK, NULL); 935 gpio_request(GPIO_FN_DV_VSYNC, NULL); 936 gpio_request(GPIO_FN_DV_HSYNC, NULL); 937 938 return platform_add_devices(ms7724se_devices, 939 ARRAY_SIZE(ms7724se_devices)); 940 } 941 device_initcall(devices_setup); 942 943 static struct sh_machine_vector mv_ms7724se __initmv = { 944 .mv_name = "ms7724se", 945 .mv_init_irq = init_se7724_IRQ, 946 }; 947