1 /* 2 * linux/arch/sh/boards/se/7724/setup.c 3 * 4 * Copyright (C) 2009 Renesas Solutions Corp. 5 * 6 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #include <linux/init.h> 14 #include <linux/device.h> 15 #include <linux/interrupt.h> 16 #include <linux/platform_device.h> 17 #include <linux/mmc/host.h> 18 #include <linux/mmc/sh_mobile_sdhi.h> 19 #include <linux/mtd/physmap.h> 20 #include <linux/delay.h> 21 #include <linux/regulator/fixed.h> 22 #include <linux/regulator/machine.h> 23 #include <linux/smc91x.h> 24 #include <linux/gpio.h> 25 #include <linux/input.h> 26 #include <linux/input/sh_keysc.h> 27 #include <linux/usb/r8a66597.h> 28 #include <linux/sh_eth.h> 29 #include <linux/sh_intc.h> 30 #include <linux/videodev2.h> 31 #include <video/sh_mobile_lcdc.h> 32 #include <media/sh_mobile_ceu.h> 33 #include <sound/sh_fsi.h> 34 #include <sound/simple_card.h> 35 #include <asm/io.h> 36 #include <asm/heartbeat.h> 37 #include <asm/clock.h> 38 #include <asm/suspend.h> 39 #include <cpu/sh7724.h> 40 #include <mach-se/mach/se7724.h> 41 42 /* 43 * SWx 1234 5678 44 * ------------------------------------ 45 * SW31 : 1001 1100 : default 46 * SW32 : 0111 1111 : use on board flash 47 * 48 * SW41 : abxx xxxx -> a = 0 : Analog monitor 49 * 1 : Digital monitor 50 * b = 0 : VGA 51 * 1 : 720p 52 */ 53 54 /* 55 * about 720p 56 * 57 * When you use 1280 x 720 lcdc output, 58 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz, 59 * and change SW41 to use 720p 60 */ 61 62 /* 63 * about sound 64 * 65 * This setup.c supports FSI slave mode. 66 * Please change J20, J21, J22 pin to 1-2 connection. 67 */ 68 69 /* Heartbeat */ 70 static struct resource heartbeat_resource = { 71 .start = PA_LED, 72 .end = PA_LED, 73 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, 74 }; 75 76 static struct platform_device heartbeat_device = { 77 .name = "heartbeat", 78 .id = -1, 79 .num_resources = 1, 80 .resource = &heartbeat_resource, 81 }; 82 83 /* LAN91C111 */ 84 static struct smc91x_platdata smc91x_info = { 85 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 86 }; 87 88 static struct resource smc91x_eth_resources[] = { 89 [0] = { 90 .name = "SMC91C111" , 91 .start = 0x1a300300, 92 .end = 0x1a30030f, 93 .flags = IORESOURCE_MEM, 94 }, 95 [1] = { 96 .start = IRQ0_SMC, 97 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 98 }, 99 }; 100 101 static struct platform_device smc91x_eth_device = { 102 .name = "smc91x", 103 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 104 .resource = smc91x_eth_resources, 105 .dev = { 106 .platform_data = &smc91x_info, 107 }, 108 }; 109 110 /* MTD */ 111 static struct mtd_partition nor_flash_partitions[] = { 112 { 113 .name = "uboot", 114 .offset = 0, 115 .size = (1 * 1024 * 1024), 116 .mask_flags = MTD_WRITEABLE, /* Read-only */ 117 }, { 118 .name = "kernel", 119 .offset = MTDPART_OFS_APPEND, 120 .size = (2 * 1024 * 1024), 121 }, { 122 .name = "free-area", 123 .offset = MTDPART_OFS_APPEND, 124 .size = MTDPART_SIZ_FULL, 125 }, 126 }; 127 128 static struct physmap_flash_data nor_flash_data = { 129 .width = 2, 130 .parts = nor_flash_partitions, 131 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 132 }; 133 134 static struct resource nor_flash_resources[] = { 135 [0] = { 136 .name = "NOR Flash", 137 .start = 0x00000000, 138 .end = 0x01ffffff, 139 .flags = IORESOURCE_MEM, 140 } 141 }; 142 143 static struct platform_device nor_flash_device = { 144 .name = "physmap-flash", 145 .resource = nor_flash_resources, 146 .num_resources = ARRAY_SIZE(nor_flash_resources), 147 .dev = { 148 .platform_data = &nor_flash_data, 149 }, 150 }; 151 152 /* LCDC */ 153 static const struct fb_videomode lcdc_720p_modes[] = { 154 { 155 .name = "LB070WV1", 156 .sync = 0, /* hsync and vsync are active low */ 157 .xres = 1280, 158 .yres = 720, 159 .left_margin = 220, 160 .right_margin = 110, 161 .hsync_len = 40, 162 .upper_margin = 20, 163 .lower_margin = 5, 164 .vsync_len = 5, 165 }, 166 }; 167 168 static const struct fb_videomode lcdc_vga_modes[] = { 169 { 170 .name = "LB070WV1", 171 .sync = 0, /* hsync and vsync are active low */ 172 .xres = 640, 173 .yres = 480, 174 .left_margin = 105, 175 .right_margin = 50, 176 .hsync_len = 96, 177 .upper_margin = 33, 178 .lower_margin = 10, 179 .vsync_len = 2, 180 }, 181 }; 182 183 static struct sh_mobile_lcdc_info lcdc_info = { 184 .clock_source = LCDC_CLK_EXTERNAL, 185 .ch[0] = { 186 .chan = LCDC_CHAN_MAINLCD, 187 .fourcc = V4L2_PIX_FMT_RGB565, 188 .clock_divider = 1, 189 .panel_cfg = { /* 7.0 inch */ 190 .width = 152, 191 .height = 91, 192 }, 193 } 194 }; 195 196 static struct resource lcdc_resources[] = { 197 [0] = { 198 .name = "LCDC", 199 .start = 0xfe940000, 200 .end = 0xfe942fff, 201 .flags = IORESOURCE_MEM, 202 }, 203 [1] = { 204 .start = evt2irq(0xf40), 205 .flags = IORESOURCE_IRQ, 206 }, 207 }; 208 209 static struct platform_device lcdc_device = { 210 .name = "sh_mobile_lcdc_fb", 211 .num_resources = ARRAY_SIZE(lcdc_resources), 212 .resource = lcdc_resources, 213 .dev = { 214 .platform_data = &lcdc_info, 215 }, 216 }; 217 218 /* CEU0 */ 219 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 220 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 221 }; 222 223 static struct resource ceu0_resources[] = { 224 [0] = { 225 .name = "CEU0", 226 .start = 0xfe910000, 227 .end = 0xfe91009f, 228 .flags = IORESOURCE_MEM, 229 }, 230 [1] = { 231 .start = evt2irq(0x880), 232 .flags = IORESOURCE_IRQ, 233 }, 234 [2] = { 235 /* place holder for contiguous memory */ 236 }, 237 }; 238 239 static struct platform_device ceu0_device = { 240 .name = "sh_mobile_ceu", 241 .id = 0, /* "ceu0" clock */ 242 .num_resources = ARRAY_SIZE(ceu0_resources), 243 .resource = ceu0_resources, 244 .dev = { 245 .platform_data = &sh_mobile_ceu0_info, 246 }, 247 }; 248 249 /* CEU1 */ 250 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 251 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 252 }; 253 254 static struct resource ceu1_resources[] = { 255 [0] = { 256 .name = "CEU1", 257 .start = 0xfe914000, 258 .end = 0xfe91409f, 259 .flags = IORESOURCE_MEM, 260 }, 261 [1] = { 262 .start = evt2irq(0x9e0), 263 .flags = IORESOURCE_IRQ, 264 }, 265 [2] = { 266 /* place holder for contiguous memory */ 267 }, 268 }; 269 270 static struct platform_device ceu1_device = { 271 .name = "sh_mobile_ceu", 272 .id = 1, /* "ceu1" clock */ 273 .num_resources = ARRAY_SIZE(ceu1_resources), 274 .resource = ceu1_resources, 275 .dev = { 276 .platform_data = &sh_mobile_ceu1_info, 277 }, 278 }; 279 280 /* FSI */ 281 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ 282 static struct resource fsi_resources[] = { 283 [0] = { 284 .name = "FSI", 285 .start = 0xFE3C0000, 286 .end = 0xFE3C021d, 287 .flags = IORESOURCE_MEM, 288 }, 289 [1] = { 290 .start = evt2irq(0xf80), 291 .flags = IORESOURCE_IRQ, 292 }, 293 }; 294 295 static struct platform_device fsi_device = { 296 .name = "sh_fsi", 297 .id = 0, 298 .num_resources = ARRAY_SIZE(fsi_resources), 299 .resource = fsi_resources, 300 }; 301 302 static struct asoc_simple_card_info fsi_ak4642_info = { 303 .name = "AK4642", 304 .card = "FSIA-AK4642", 305 .codec = "ak4642-codec.0-0012", 306 .platform = "sh_fsi.0", 307 .daifmt = SND_SOC_DAIFMT_LEFT_J, 308 .cpu_dai = { 309 .name = "fsia-dai", 310 .fmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_IB_NF, 311 }, 312 .codec_dai = { 313 .name = "ak4642-hifi", 314 .fmt = SND_SOC_DAIFMT_CBM_CFM, 315 .sysclk = 11289600, 316 }, 317 }; 318 319 static struct platform_device fsi_ak4642_device = { 320 .name = "asoc-simple-card", 321 .dev = { 322 .platform_data = &fsi_ak4642_info, 323 }, 324 }; 325 326 /* KEYSC in SoC (Needs SW33-2 set to ON) */ 327 static struct sh_keysc_info keysc_info = { 328 .mode = SH_KEYSC_MODE_1, 329 .scan_timing = 3, 330 .delay = 50, 331 .keycodes = { 332 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 333 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A, 334 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, 335 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L, 336 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q, 337 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V, 338 }, 339 }; 340 341 static struct resource keysc_resources[] = { 342 [0] = { 343 .name = "KEYSC", 344 .start = 0x044b0000, 345 .end = 0x044b000f, 346 .flags = IORESOURCE_MEM, 347 }, 348 [1] = { 349 .start = evt2irq(0xbe0), 350 .flags = IORESOURCE_IRQ, 351 }, 352 }; 353 354 static struct platform_device keysc_device = { 355 .name = "sh_keysc", 356 .id = 0, /* "keysc0" clock */ 357 .num_resources = ARRAY_SIZE(keysc_resources), 358 .resource = keysc_resources, 359 .dev = { 360 .platform_data = &keysc_info, 361 }, 362 }; 363 364 /* SH Eth */ 365 static struct resource sh_eth_resources[] = { 366 [0] = { 367 .start = SH_ETH_ADDR, 368 .end = SH_ETH_ADDR + 0x1FC - 1, 369 .flags = IORESOURCE_MEM, 370 }, 371 [1] = { 372 .start = evt2irq(0xd60), 373 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 374 }, 375 }; 376 377 static struct sh_eth_plat_data sh_eth_plat = { 378 .phy = 0x1f, /* SMSC LAN8187 */ 379 .edmac_endian = EDMAC_LITTLE_ENDIAN, 380 .phy_interface = PHY_INTERFACE_MODE_MII, 381 }; 382 383 static struct platform_device sh_eth_device = { 384 .name = "sh7724-ether", 385 .id = 0, 386 .dev = { 387 .platform_data = &sh_eth_plat, 388 }, 389 .num_resources = ARRAY_SIZE(sh_eth_resources), 390 .resource = sh_eth_resources, 391 }; 392 393 static struct r8a66597_platdata sh7724_usb0_host_data = { 394 .on_chip = 1, 395 }; 396 397 static struct resource sh7724_usb0_host_resources[] = { 398 [0] = { 399 .start = 0xa4d80000, 400 .end = 0xa4d80124 - 1, 401 .flags = IORESOURCE_MEM, 402 }, 403 [1] = { 404 .start = evt2irq(0xa20), 405 .end = evt2irq(0xa20), 406 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 407 }, 408 }; 409 410 static struct platform_device sh7724_usb0_host_device = { 411 .name = "r8a66597_hcd", 412 .id = 0, 413 .dev = { 414 .dma_mask = NULL, /* not use dma */ 415 .coherent_dma_mask = 0xffffffff, 416 .platform_data = &sh7724_usb0_host_data, 417 }, 418 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), 419 .resource = sh7724_usb0_host_resources, 420 }; 421 422 static struct r8a66597_platdata sh7724_usb1_gadget_data = { 423 .on_chip = 1, 424 }; 425 426 static struct resource sh7724_usb1_gadget_resources[] = { 427 [0] = { 428 .start = 0xa4d90000, 429 .end = 0xa4d90123, 430 .flags = IORESOURCE_MEM, 431 }, 432 [1] = { 433 .start = evt2irq(0xa40), 434 .end = evt2irq(0xa40), 435 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 436 }, 437 }; 438 439 static struct platform_device sh7724_usb1_gadget_device = { 440 .name = "r8a66597_udc", 441 .id = 1, /* USB1 */ 442 .dev = { 443 .dma_mask = NULL, /* not use dma */ 444 .coherent_dma_mask = 0xffffffff, 445 .platform_data = &sh7724_usb1_gadget_data, 446 }, 447 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources), 448 .resource = sh7724_usb1_gadget_resources, 449 }; 450 451 /* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */ 452 static struct regulator_consumer_supply fixed3v3_power_consumers[] = 453 { 454 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), 455 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), 456 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), 457 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), 458 }; 459 460 static struct resource sdhi0_cn7_resources[] = { 461 [0] = { 462 .name = "SDHI0", 463 .start = 0x04ce0000, 464 .end = 0x04ce00ff, 465 .flags = IORESOURCE_MEM, 466 }, 467 [1] = { 468 .start = evt2irq(0xe80), 469 .flags = IORESOURCE_IRQ, 470 }, 471 }; 472 473 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = { 474 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 475 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 476 .tmio_caps = MMC_CAP_SDIO_IRQ, 477 }; 478 479 static struct platform_device sdhi0_cn7_device = { 480 .name = "sh_mobile_sdhi", 481 .id = 0, 482 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources), 483 .resource = sdhi0_cn7_resources, 484 .dev = { 485 .platform_data = &sh7724_sdhi0_data, 486 }, 487 }; 488 489 static struct resource sdhi1_cn8_resources[] = { 490 [0] = { 491 .name = "SDHI1", 492 .start = 0x04cf0000, 493 .end = 0x04cf00ff, 494 .flags = IORESOURCE_MEM, 495 }, 496 [1] = { 497 .start = evt2irq(0x4e0), 498 .flags = IORESOURCE_IRQ, 499 }, 500 }; 501 502 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = { 503 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 504 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 505 .tmio_caps = MMC_CAP_SDIO_IRQ, 506 }; 507 508 static struct platform_device sdhi1_cn8_device = { 509 .name = "sh_mobile_sdhi", 510 .id = 1, 511 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources), 512 .resource = sdhi1_cn8_resources, 513 .dev = { 514 .platform_data = &sh7724_sdhi1_data, 515 }, 516 }; 517 518 /* IrDA */ 519 static struct resource irda_resources[] = { 520 [0] = { 521 .name = "IrDA", 522 .start = 0xA45D0000, 523 .end = 0xA45D0049, 524 .flags = IORESOURCE_MEM, 525 }, 526 [1] = { 527 .start = evt2irq(0x480), 528 .flags = IORESOURCE_IRQ, 529 }, 530 }; 531 532 static struct platform_device irda_device = { 533 .name = "sh_sir", 534 .num_resources = ARRAY_SIZE(irda_resources), 535 .resource = irda_resources, 536 }; 537 538 #include <media/ak881x.h> 539 #include <media/sh_vou.h> 540 541 static struct ak881x_pdata ak881x_pdata = { 542 .flags = AK881X_IF_MODE_SLAVE, 543 }; 544 545 static struct i2c_board_info ak8813 = { 546 /* With open J18 jumper address is 0x21 */ 547 I2C_BOARD_INFO("ak8813", 0x20), 548 .platform_data = &ak881x_pdata, 549 }; 550 551 static struct sh_vou_pdata sh_vou_pdata = { 552 .bus_fmt = SH_VOU_BUS_8BIT, 553 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, 554 .board_info = &ak8813, 555 .i2c_adap = 0, 556 }; 557 558 static struct resource sh_vou_resources[] = { 559 [0] = { 560 .start = 0xfe960000, 561 .end = 0xfe962043, 562 .flags = IORESOURCE_MEM, 563 }, 564 [1] = { 565 .start = evt2irq(0x8e0), 566 .flags = IORESOURCE_IRQ, 567 }, 568 }; 569 570 static struct platform_device vou_device = { 571 .name = "sh-vou", 572 .id = -1, 573 .num_resources = ARRAY_SIZE(sh_vou_resources), 574 .resource = sh_vou_resources, 575 .dev = { 576 .platform_data = &sh_vou_pdata, 577 }, 578 }; 579 580 static struct platform_device *ms7724se_devices[] __initdata = { 581 &heartbeat_device, 582 &smc91x_eth_device, 583 &lcdc_device, 584 &nor_flash_device, 585 &ceu0_device, 586 &ceu1_device, 587 &keysc_device, 588 &sh_eth_device, 589 &sh7724_usb0_host_device, 590 &sh7724_usb1_gadget_device, 591 &fsi_device, 592 &fsi_ak4642_device, 593 &sdhi0_cn7_device, 594 &sdhi1_cn8_device, 595 &irda_device, 596 &vou_device, 597 }; 598 599 /* I2C device */ 600 static struct i2c_board_info i2c0_devices[] = { 601 { 602 I2C_BOARD_INFO("ak4642", 0x12), 603 }, 604 }; 605 606 #define EEPROM_OP 0xBA206000 607 #define EEPROM_ADR 0xBA206004 608 #define EEPROM_DATA 0xBA20600C 609 #define EEPROM_STAT 0xBA206010 610 #define EEPROM_STRT 0xBA206014 611 612 static int __init sh_eth_is_eeprom_ready(void) 613 { 614 int t = 10000; 615 616 while (t--) { 617 if (!__raw_readw(EEPROM_STAT)) 618 return 1; 619 udelay(1); 620 } 621 622 printk(KERN_ERR "ms7724se can not access to eeprom\n"); 623 return 0; 624 } 625 626 static void __init sh_eth_init(void) 627 { 628 int i; 629 u16 mac; 630 631 /* check EEPROM status */ 632 if (!sh_eth_is_eeprom_ready()) 633 return; 634 635 /* read MAC addr from EEPROM */ 636 for (i = 0 ; i < 3 ; i++) { 637 __raw_writew(0x0, EEPROM_OP); /* read */ 638 __raw_writew(i*2, EEPROM_ADR); 639 __raw_writew(0x1, EEPROM_STRT); 640 if (!sh_eth_is_eeprom_ready()) 641 return; 642 643 mac = __raw_readw(EEPROM_DATA); 644 sh_eth_plat.mac_addr[i << 1] = mac & 0xff; 645 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8; 646 } 647 } 648 649 #define SW4140 0xBA201000 650 #define FPGA_OUT 0xBA200400 651 #define PORT_HIZA 0xA4050158 652 #define PORT_MSELCRB 0xA4050182 653 654 #define SW41_A 0x0100 655 #define SW41_B 0x0200 656 #define SW41_C 0x0400 657 #define SW41_D 0x0800 658 #define SW41_E 0x1000 659 #define SW41_F 0x2000 660 #define SW41_G 0x4000 661 #define SW41_H 0x8000 662 663 extern char ms7724se_sdram_enter_start; 664 extern char ms7724se_sdram_enter_end; 665 extern char ms7724se_sdram_leave_start; 666 extern char ms7724se_sdram_leave_end; 667 668 static int __init arch_setup(void) 669 { 670 /* enable I2C device */ 671 i2c_register_board_info(0, i2c0_devices, 672 ARRAY_SIZE(i2c0_devices)); 673 return 0; 674 } 675 arch_initcall(arch_setup); 676 677 static int __init devices_setup(void) 678 { 679 u16 sw = __raw_readw(SW4140); /* select camera, monitor */ 680 struct clk *clk; 681 u16 fpga_out; 682 683 /* register board specific self-refresh code */ 684 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | 685 SUSP_SH_RSTANDBY, 686 &ms7724se_sdram_enter_start, 687 &ms7724se_sdram_enter_end, 688 &ms7724se_sdram_leave_start, 689 &ms7724se_sdram_leave_end); 690 691 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, 692 ARRAY_SIZE(fixed3v3_power_consumers), 3300000); 693 694 /* Reset Release */ 695 fpga_out = __raw_readw(FPGA_OUT); 696 /* bit4: NTSC_PDN, bit5: NTSC_RESET */ 697 fpga_out &= ~((1 << 1) | /* LAN */ 698 (1 << 4) | /* AK8813 PDN */ 699 (1 << 5) | /* AK8813 RESET */ 700 (1 << 6) | /* VIDEO DAC */ 701 (1 << 7) | /* AK4643 */ 702 (1 << 8) | /* IrDA */ 703 (1 << 12) | /* USB0 */ 704 (1 << 14)); /* RMII */ 705 __raw_writew(fpga_out | (1 << 4), FPGA_OUT); 706 707 udelay(10); 708 709 /* AK8813 RESET */ 710 __raw_writew(fpga_out | (1 << 5), FPGA_OUT); 711 712 udelay(10); 713 714 __raw_writew(fpga_out, FPGA_OUT); 715 716 /* turn on USB clocks, use external clock */ 717 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 718 719 /* Let LED9 show STATUS2 */ 720 gpio_request(GPIO_FN_STATUS2, NULL); 721 722 /* Lit LED10 show STATUS0 */ 723 gpio_request(GPIO_FN_STATUS0, NULL); 724 725 /* Lit LED11 show PDSTATUS */ 726 gpio_request(GPIO_FN_PDSTATUS, NULL); 727 728 /* enable USB0 port */ 729 __raw_writew(0x0600, 0xa40501d4); 730 731 /* enable USB1 port */ 732 __raw_writew(0x0600, 0xa4050192); 733 734 /* enable IRQ 0,1,2 */ 735 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 736 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 737 gpio_request(GPIO_FN_INTC_IRQ2, NULL); 738 739 /* enable SCIFA3 */ 740 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL); 741 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL); 742 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL); 743 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL); 744 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL); 745 746 /* enable LCDC */ 747 gpio_request(GPIO_FN_LCDD23, NULL); 748 gpio_request(GPIO_FN_LCDD22, NULL); 749 gpio_request(GPIO_FN_LCDD21, NULL); 750 gpio_request(GPIO_FN_LCDD20, NULL); 751 gpio_request(GPIO_FN_LCDD19, NULL); 752 gpio_request(GPIO_FN_LCDD18, NULL); 753 gpio_request(GPIO_FN_LCDD17, NULL); 754 gpio_request(GPIO_FN_LCDD16, NULL); 755 gpio_request(GPIO_FN_LCDD15, NULL); 756 gpio_request(GPIO_FN_LCDD14, NULL); 757 gpio_request(GPIO_FN_LCDD13, NULL); 758 gpio_request(GPIO_FN_LCDD12, NULL); 759 gpio_request(GPIO_FN_LCDD11, NULL); 760 gpio_request(GPIO_FN_LCDD10, NULL); 761 gpio_request(GPIO_FN_LCDD9, NULL); 762 gpio_request(GPIO_FN_LCDD8, NULL); 763 gpio_request(GPIO_FN_LCDD7, NULL); 764 gpio_request(GPIO_FN_LCDD6, NULL); 765 gpio_request(GPIO_FN_LCDD5, NULL); 766 gpio_request(GPIO_FN_LCDD4, NULL); 767 gpio_request(GPIO_FN_LCDD3, NULL); 768 gpio_request(GPIO_FN_LCDD2, NULL); 769 gpio_request(GPIO_FN_LCDD1, NULL); 770 gpio_request(GPIO_FN_LCDD0, NULL); 771 gpio_request(GPIO_FN_LCDDISP, NULL); 772 gpio_request(GPIO_FN_LCDHSYN, NULL); 773 gpio_request(GPIO_FN_LCDDCK, NULL); 774 gpio_request(GPIO_FN_LCDVSYN, NULL); 775 gpio_request(GPIO_FN_LCDDON, NULL); 776 gpio_request(GPIO_FN_LCDVEPWC, NULL); 777 gpio_request(GPIO_FN_LCDVCPWC, NULL); 778 gpio_request(GPIO_FN_LCDRD, NULL); 779 gpio_request(GPIO_FN_LCDLCLK, NULL); 780 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); 781 782 /* enable CEU0 */ 783 gpio_request(GPIO_FN_VIO0_D15, NULL); 784 gpio_request(GPIO_FN_VIO0_D14, NULL); 785 gpio_request(GPIO_FN_VIO0_D13, NULL); 786 gpio_request(GPIO_FN_VIO0_D12, NULL); 787 gpio_request(GPIO_FN_VIO0_D11, NULL); 788 gpio_request(GPIO_FN_VIO0_D10, NULL); 789 gpio_request(GPIO_FN_VIO0_D9, NULL); 790 gpio_request(GPIO_FN_VIO0_D8, NULL); 791 gpio_request(GPIO_FN_VIO0_D7, NULL); 792 gpio_request(GPIO_FN_VIO0_D6, NULL); 793 gpio_request(GPIO_FN_VIO0_D5, NULL); 794 gpio_request(GPIO_FN_VIO0_D4, NULL); 795 gpio_request(GPIO_FN_VIO0_D3, NULL); 796 gpio_request(GPIO_FN_VIO0_D2, NULL); 797 gpio_request(GPIO_FN_VIO0_D1, NULL); 798 gpio_request(GPIO_FN_VIO0_D0, NULL); 799 gpio_request(GPIO_FN_VIO0_VD, NULL); 800 gpio_request(GPIO_FN_VIO0_CLK, NULL); 801 gpio_request(GPIO_FN_VIO0_FLD, NULL); 802 gpio_request(GPIO_FN_VIO0_HD, NULL); 803 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 804 805 /* enable CEU1 */ 806 gpio_request(GPIO_FN_VIO1_D7, NULL); 807 gpio_request(GPIO_FN_VIO1_D6, NULL); 808 gpio_request(GPIO_FN_VIO1_D5, NULL); 809 gpio_request(GPIO_FN_VIO1_D4, NULL); 810 gpio_request(GPIO_FN_VIO1_D3, NULL); 811 gpio_request(GPIO_FN_VIO1_D2, NULL); 812 gpio_request(GPIO_FN_VIO1_D1, NULL); 813 gpio_request(GPIO_FN_VIO1_D0, NULL); 814 gpio_request(GPIO_FN_VIO1_FLD, NULL); 815 gpio_request(GPIO_FN_VIO1_HD, NULL); 816 gpio_request(GPIO_FN_VIO1_VD, NULL); 817 gpio_request(GPIO_FN_VIO1_CLK, NULL); 818 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 819 820 /* KEYSC */ 821 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 822 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 823 gpio_request(GPIO_FN_KEYIN4, NULL); 824 gpio_request(GPIO_FN_KEYIN3, NULL); 825 gpio_request(GPIO_FN_KEYIN2, NULL); 826 gpio_request(GPIO_FN_KEYIN1, NULL); 827 gpio_request(GPIO_FN_KEYIN0, NULL); 828 gpio_request(GPIO_FN_KEYOUT3, NULL); 829 gpio_request(GPIO_FN_KEYOUT2, NULL); 830 gpio_request(GPIO_FN_KEYOUT1, NULL); 831 gpio_request(GPIO_FN_KEYOUT0, NULL); 832 833 /* enable FSI */ 834 gpio_request(GPIO_FN_FSIMCKA, NULL); 835 gpio_request(GPIO_FN_FSIIASD, NULL); 836 gpio_request(GPIO_FN_FSIOASD, NULL); 837 gpio_request(GPIO_FN_FSIIABCK, NULL); 838 gpio_request(GPIO_FN_FSIIALRCK, NULL); 839 gpio_request(GPIO_FN_FSIOABCK, NULL); 840 gpio_request(GPIO_FN_FSIOALRCK, NULL); 841 gpio_request(GPIO_FN_CLKAUDIOAO, NULL); 842 843 /* set SPU2 clock to 83.4 MHz */ 844 clk = clk_get(NULL, "spu_clk"); 845 if (!IS_ERR(clk)) { 846 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 847 clk_put(clk); 848 } 849 850 /* change parent of FSI A */ 851 clk = clk_get(NULL, "fsia_clk"); 852 if (!IS_ERR(clk)) { 853 /* 48kHz dummy clock was used to make sure 1/1 divide */ 854 clk_set_rate(&sh7724_fsimcka_clk, 48000); 855 clk_set_parent(clk, &sh7724_fsimcka_clk); 856 clk_set_rate(clk, 48000); 857 clk_put(clk); 858 } 859 860 /* SDHI0 connected to cn7 */ 861 gpio_request(GPIO_FN_SDHI0CD, NULL); 862 gpio_request(GPIO_FN_SDHI0WP, NULL); 863 gpio_request(GPIO_FN_SDHI0D3, NULL); 864 gpio_request(GPIO_FN_SDHI0D2, NULL); 865 gpio_request(GPIO_FN_SDHI0D1, NULL); 866 gpio_request(GPIO_FN_SDHI0D0, NULL); 867 gpio_request(GPIO_FN_SDHI0CMD, NULL); 868 gpio_request(GPIO_FN_SDHI0CLK, NULL); 869 870 /* SDHI1 connected to cn8 */ 871 gpio_request(GPIO_FN_SDHI1CD, NULL); 872 gpio_request(GPIO_FN_SDHI1WP, NULL); 873 gpio_request(GPIO_FN_SDHI1D3, NULL); 874 gpio_request(GPIO_FN_SDHI1D2, NULL); 875 gpio_request(GPIO_FN_SDHI1D1, NULL); 876 gpio_request(GPIO_FN_SDHI1D0, NULL); 877 gpio_request(GPIO_FN_SDHI1CMD, NULL); 878 gpio_request(GPIO_FN_SDHI1CLK, NULL); 879 880 /* enable IrDA */ 881 gpio_request(GPIO_FN_IRDA_OUT, NULL); 882 gpio_request(GPIO_FN_IRDA_IN, NULL); 883 884 /* 885 * enable SH-Eth 886 * 887 * please remove J33 pin from your board !! 888 * 889 * ms7724 board should not use GPIO_FN_LNKSTA pin 890 * So, This time PTX5 is set to input pin 891 */ 892 gpio_request(GPIO_FN_RMII_RXD0, NULL); 893 gpio_request(GPIO_FN_RMII_RXD1, NULL); 894 gpio_request(GPIO_FN_RMII_TXD0, NULL); 895 gpio_request(GPIO_FN_RMII_TXD1, NULL); 896 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 897 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 898 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 899 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 900 gpio_request(GPIO_FN_MDIO, NULL); 901 gpio_request(GPIO_FN_MDC, NULL); 902 gpio_request(GPIO_PTX5, NULL); 903 gpio_direction_input(GPIO_PTX5); 904 sh_eth_init(); 905 906 if (sw & SW41_B) { 907 /* 720p */ 908 lcdc_info.ch[0].lcd_modes = lcdc_720p_modes; 909 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes); 910 } else { 911 /* VGA */ 912 lcdc_info.ch[0].lcd_modes = lcdc_vga_modes; 913 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes); 914 } 915 916 if (sw & SW41_A) { 917 /* Digital monitor */ 918 lcdc_info.ch[0].interface_type = RGB18; 919 lcdc_info.ch[0].flags = 0; 920 } else { 921 /* Analog monitor */ 922 lcdc_info.ch[0].interface_type = RGB24; 923 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; 924 } 925 926 /* VOU */ 927 gpio_request(GPIO_FN_DV_D15, NULL); 928 gpio_request(GPIO_FN_DV_D14, NULL); 929 gpio_request(GPIO_FN_DV_D13, NULL); 930 gpio_request(GPIO_FN_DV_D12, NULL); 931 gpio_request(GPIO_FN_DV_D11, NULL); 932 gpio_request(GPIO_FN_DV_D10, NULL); 933 gpio_request(GPIO_FN_DV_D9, NULL); 934 gpio_request(GPIO_FN_DV_D8, NULL); 935 gpio_request(GPIO_FN_DV_CLKI, NULL); 936 gpio_request(GPIO_FN_DV_CLK, NULL); 937 gpio_request(GPIO_FN_DV_VSYNC, NULL); 938 gpio_request(GPIO_FN_DV_HSYNC, NULL); 939 940 return platform_add_devices(ms7724se_devices, 941 ARRAY_SIZE(ms7724se_devices)); 942 } 943 device_initcall(devices_setup); 944 945 static struct sh_machine_vector mv_ms7724se __initmv = { 946 .mv_name = "ms7724se", 947 .mv_init_irq = init_se7724_IRQ, 948 }; 949