1 /* 2 * linux/arch/sh/boards/se/7724/setup.c 3 * 4 * Copyright (C) 2009 Renesas Solutions Corp. 5 * 6 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #include <linux/init.h> 14 #include <linux/device.h> 15 #include <linux/interrupt.h> 16 #include <linux/platform_device.h> 17 #include <linux/mmc/host.h> 18 #include <linux/mmc/sh_mobile_sdhi.h> 19 #include <linux/mtd/physmap.h> 20 #include <linux/delay.h> 21 #include <linux/smc91x.h> 22 #include <linux/gpio.h> 23 #include <linux/input.h> 24 #include <linux/input/sh_keysc.h> 25 #include <linux/usb/r8a66597.h> 26 #include <linux/sh_eth.h> 27 #include <linux/sh_intc.h> 28 #include <linux/videodev2.h> 29 #include <video/sh_mobile_lcdc.h> 30 #include <media/sh_mobile_ceu.h> 31 #include <sound/sh_fsi.h> 32 #include <asm/io.h> 33 #include <asm/heartbeat.h> 34 #include <asm/clock.h> 35 #include <asm/suspend.h> 36 #include <cpu/sh7724.h> 37 #include <mach-se/mach/se7724.h> 38 39 /* 40 * SWx 1234 5678 41 * ------------------------------------ 42 * SW31 : 1001 1100 : default 43 * SW32 : 0111 1111 : use on board flash 44 * 45 * SW41 : abxx xxxx -> a = 0 : Analog monitor 46 * 1 : Digital monitor 47 * b = 0 : VGA 48 * 1 : 720p 49 */ 50 51 /* 52 * about 720p 53 * 54 * When you use 1280 x 720 lcdc output, 55 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz, 56 * and change SW41 to use 720p 57 */ 58 59 /* 60 * about sound 61 * 62 * This setup.c supports FSI slave mode. 63 * Please change J20, J21, J22 pin to 1-2 connection. 64 */ 65 66 /* Heartbeat */ 67 static struct resource heartbeat_resource = { 68 .start = PA_LED, 69 .end = PA_LED, 70 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, 71 }; 72 73 static struct platform_device heartbeat_device = { 74 .name = "heartbeat", 75 .id = -1, 76 .num_resources = 1, 77 .resource = &heartbeat_resource, 78 }; 79 80 /* LAN91C111 */ 81 static struct smc91x_platdata smc91x_info = { 82 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 83 }; 84 85 static struct resource smc91x_eth_resources[] = { 86 [0] = { 87 .name = "SMC91C111" , 88 .start = 0x1a300300, 89 .end = 0x1a30030f, 90 .flags = IORESOURCE_MEM, 91 }, 92 [1] = { 93 .start = IRQ0_SMC, 94 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 95 }, 96 }; 97 98 static struct platform_device smc91x_eth_device = { 99 .name = "smc91x", 100 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 101 .resource = smc91x_eth_resources, 102 .dev = { 103 .platform_data = &smc91x_info, 104 }, 105 }; 106 107 /* MTD */ 108 static struct mtd_partition nor_flash_partitions[] = { 109 { 110 .name = "uboot", 111 .offset = 0, 112 .size = (1 * 1024 * 1024), 113 .mask_flags = MTD_WRITEABLE, /* Read-only */ 114 }, { 115 .name = "kernel", 116 .offset = MTDPART_OFS_APPEND, 117 .size = (2 * 1024 * 1024), 118 }, { 119 .name = "free-area", 120 .offset = MTDPART_OFS_APPEND, 121 .size = MTDPART_SIZ_FULL, 122 }, 123 }; 124 125 static struct physmap_flash_data nor_flash_data = { 126 .width = 2, 127 .parts = nor_flash_partitions, 128 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 129 }; 130 131 static struct resource nor_flash_resources[] = { 132 [0] = { 133 .name = "NOR Flash", 134 .start = 0x00000000, 135 .end = 0x01ffffff, 136 .flags = IORESOURCE_MEM, 137 } 138 }; 139 140 static struct platform_device nor_flash_device = { 141 .name = "physmap-flash", 142 .resource = nor_flash_resources, 143 .num_resources = ARRAY_SIZE(nor_flash_resources), 144 .dev = { 145 .platform_data = &nor_flash_data, 146 }, 147 }; 148 149 /* LCDC */ 150 static const struct fb_videomode lcdc_720p_modes[] = { 151 { 152 .name = "LB070WV1", 153 .sync = 0, /* hsync and vsync are active low */ 154 .xres = 1280, 155 .yres = 720, 156 .left_margin = 220, 157 .right_margin = 110, 158 .hsync_len = 40, 159 .upper_margin = 20, 160 .lower_margin = 5, 161 .vsync_len = 5, 162 }, 163 }; 164 165 static const struct fb_videomode lcdc_vga_modes[] = { 166 { 167 .name = "LB070WV1", 168 .sync = 0, /* hsync and vsync are active low */ 169 .xres = 640, 170 .yres = 480, 171 .left_margin = 105, 172 .right_margin = 50, 173 .hsync_len = 96, 174 .upper_margin = 33, 175 .lower_margin = 10, 176 .vsync_len = 2, 177 }, 178 }; 179 180 static struct sh_mobile_lcdc_info lcdc_info = { 181 .clock_source = LCDC_CLK_EXTERNAL, 182 .ch[0] = { 183 .chan = LCDC_CHAN_MAINLCD, 184 .fourcc = V4L2_PIX_FMT_RGB565, 185 .clock_divider = 1, 186 .panel_cfg = { /* 7.0 inch */ 187 .width = 152, 188 .height = 91, 189 }, 190 } 191 }; 192 193 static struct resource lcdc_resources[] = { 194 [0] = { 195 .name = "LCDC", 196 .start = 0xfe940000, 197 .end = 0xfe942fff, 198 .flags = IORESOURCE_MEM, 199 }, 200 [1] = { 201 .start = evt2irq(0xf40), 202 .flags = IORESOURCE_IRQ, 203 }, 204 }; 205 206 static struct platform_device lcdc_device = { 207 .name = "sh_mobile_lcdc_fb", 208 .num_resources = ARRAY_SIZE(lcdc_resources), 209 .resource = lcdc_resources, 210 .dev = { 211 .platform_data = &lcdc_info, 212 }, 213 }; 214 215 /* CEU0 */ 216 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 217 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 218 }; 219 220 static struct resource ceu0_resources[] = { 221 [0] = { 222 .name = "CEU0", 223 .start = 0xfe910000, 224 .end = 0xfe91009f, 225 .flags = IORESOURCE_MEM, 226 }, 227 [1] = { 228 .start = evt2irq(0x880), 229 .flags = IORESOURCE_IRQ, 230 }, 231 [2] = { 232 /* place holder for contiguous memory */ 233 }, 234 }; 235 236 static struct platform_device ceu0_device = { 237 .name = "sh_mobile_ceu", 238 .id = 0, /* "ceu0" clock */ 239 .num_resources = ARRAY_SIZE(ceu0_resources), 240 .resource = ceu0_resources, 241 .dev = { 242 .platform_data = &sh_mobile_ceu0_info, 243 }, 244 }; 245 246 /* CEU1 */ 247 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 248 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 249 }; 250 251 static struct resource ceu1_resources[] = { 252 [0] = { 253 .name = "CEU1", 254 .start = 0xfe914000, 255 .end = 0xfe91409f, 256 .flags = IORESOURCE_MEM, 257 }, 258 [1] = { 259 .start = evt2irq(0x9e0), 260 .flags = IORESOURCE_IRQ, 261 }, 262 [2] = { 263 /* place holder for contiguous memory */ 264 }, 265 }; 266 267 static struct platform_device ceu1_device = { 268 .name = "sh_mobile_ceu", 269 .id = 1, /* "ceu1" clock */ 270 .num_resources = ARRAY_SIZE(ceu1_resources), 271 .resource = ceu1_resources, 272 .dev = { 273 .platform_data = &sh_mobile_ceu1_info, 274 }, 275 }; 276 277 /* FSI */ 278 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ 279 static struct sh_fsi_platform_info fsi_info = { 280 .port_a = { 281 .flags = SH_FSI_BRS_INV, 282 }, 283 }; 284 285 static struct resource fsi_resources[] = { 286 [0] = { 287 .name = "FSI", 288 .start = 0xFE3C0000, 289 .end = 0xFE3C021d, 290 .flags = IORESOURCE_MEM, 291 }, 292 [1] = { 293 .start = evt2irq(0xf80), 294 .flags = IORESOURCE_IRQ, 295 }, 296 }; 297 298 static struct platform_device fsi_device = { 299 .name = "sh_fsi", 300 .id = 0, 301 .num_resources = ARRAY_SIZE(fsi_resources), 302 .resource = fsi_resources, 303 .dev = { 304 .platform_data = &fsi_info, 305 }, 306 }; 307 308 static struct fsi_ak4642_info fsi_ak4642_info = { 309 .name = "AK4642", 310 .card = "FSIA-AK4642", 311 .cpu_dai = "fsia-dai", 312 .codec = "ak4642-codec.0-0012", 313 .platform = "sh_fsi.0", 314 .id = FSI_PORT_A, 315 }; 316 317 static struct platform_device fsi_ak4642_device = { 318 .name = "fsi-ak4642-audio", 319 .dev = { 320 .platform_data = &fsi_ak4642_info, 321 }, 322 }; 323 324 /* KEYSC in SoC (Needs SW33-2 set to ON) */ 325 static struct sh_keysc_info keysc_info = { 326 .mode = SH_KEYSC_MODE_1, 327 .scan_timing = 3, 328 .delay = 50, 329 .keycodes = { 330 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 331 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A, 332 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, 333 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L, 334 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q, 335 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V, 336 }, 337 }; 338 339 static struct resource keysc_resources[] = { 340 [0] = { 341 .name = "KEYSC", 342 .start = 0x044b0000, 343 .end = 0x044b000f, 344 .flags = IORESOURCE_MEM, 345 }, 346 [1] = { 347 .start = evt2irq(0xbe0), 348 .flags = IORESOURCE_IRQ, 349 }, 350 }; 351 352 static struct platform_device keysc_device = { 353 .name = "sh_keysc", 354 .id = 0, /* "keysc0" clock */ 355 .num_resources = ARRAY_SIZE(keysc_resources), 356 .resource = keysc_resources, 357 .dev = { 358 .platform_data = &keysc_info, 359 }, 360 }; 361 362 /* SH Eth */ 363 static struct resource sh_eth_resources[] = { 364 [0] = { 365 .start = SH_ETH_ADDR, 366 .end = SH_ETH_ADDR + 0x1FC, 367 .flags = IORESOURCE_MEM, 368 }, 369 [1] = { 370 .start = evt2irq(0xd60), 371 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 372 }, 373 }; 374 375 static struct sh_eth_plat_data sh_eth_plat = { 376 .phy = 0x1f, /* SMSC LAN8187 */ 377 .edmac_endian = EDMAC_LITTLE_ENDIAN, 378 }; 379 380 static struct platform_device sh_eth_device = { 381 .name = "sh-eth", 382 .id = 0, 383 .dev = { 384 .platform_data = &sh_eth_plat, 385 }, 386 .num_resources = ARRAY_SIZE(sh_eth_resources), 387 .resource = sh_eth_resources, 388 }; 389 390 static struct r8a66597_platdata sh7724_usb0_host_data = { 391 .on_chip = 1, 392 }; 393 394 static struct resource sh7724_usb0_host_resources[] = { 395 [0] = { 396 .start = 0xa4d80000, 397 .end = 0xa4d80124 - 1, 398 .flags = IORESOURCE_MEM, 399 }, 400 [1] = { 401 .start = evt2irq(0xa20), 402 .end = evt2irq(0xa20), 403 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 404 }, 405 }; 406 407 static struct platform_device sh7724_usb0_host_device = { 408 .name = "r8a66597_hcd", 409 .id = 0, 410 .dev = { 411 .dma_mask = NULL, /* not use dma */ 412 .coherent_dma_mask = 0xffffffff, 413 .platform_data = &sh7724_usb0_host_data, 414 }, 415 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), 416 .resource = sh7724_usb0_host_resources, 417 }; 418 419 static struct r8a66597_platdata sh7724_usb1_gadget_data = { 420 .on_chip = 1, 421 }; 422 423 static struct resource sh7724_usb1_gadget_resources[] = { 424 [0] = { 425 .start = 0xa4d90000, 426 .end = 0xa4d90123, 427 .flags = IORESOURCE_MEM, 428 }, 429 [1] = { 430 .start = evt2irq(0xa40), 431 .end = evt2irq(0xa40), 432 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 433 }, 434 }; 435 436 static struct platform_device sh7724_usb1_gadget_device = { 437 .name = "r8a66597_udc", 438 .id = 1, /* USB1 */ 439 .dev = { 440 .dma_mask = NULL, /* not use dma */ 441 .coherent_dma_mask = 0xffffffff, 442 .platform_data = &sh7724_usb1_gadget_data, 443 }, 444 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources), 445 .resource = sh7724_usb1_gadget_resources, 446 }; 447 448 static struct resource sdhi0_cn7_resources[] = { 449 [0] = { 450 .name = "SDHI0", 451 .start = 0x04ce0000, 452 .end = 0x04ce00ff, 453 .flags = IORESOURCE_MEM, 454 }, 455 [1] = { 456 .start = evt2irq(0xe80), 457 .flags = IORESOURCE_IRQ, 458 }, 459 }; 460 461 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = { 462 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 463 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 464 .tmio_caps = MMC_CAP_SDIO_IRQ, 465 }; 466 467 static struct platform_device sdhi0_cn7_device = { 468 .name = "sh_mobile_sdhi", 469 .id = 0, 470 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources), 471 .resource = sdhi0_cn7_resources, 472 .dev = { 473 .platform_data = &sh7724_sdhi0_data, 474 }, 475 }; 476 477 static struct resource sdhi1_cn8_resources[] = { 478 [0] = { 479 .name = "SDHI1", 480 .start = 0x04cf0000, 481 .end = 0x04cf00ff, 482 .flags = IORESOURCE_MEM, 483 }, 484 [1] = { 485 .start = evt2irq(0x4e0), 486 .flags = IORESOURCE_IRQ, 487 }, 488 }; 489 490 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = { 491 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 492 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 493 .tmio_caps = MMC_CAP_SDIO_IRQ, 494 }; 495 496 static struct platform_device sdhi1_cn8_device = { 497 .name = "sh_mobile_sdhi", 498 .id = 1, 499 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources), 500 .resource = sdhi1_cn8_resources, 501 .dev = { 502 .platform_data = &sh7724_sdhi1_data, 503 }, 504 }; 505 506 /* IrDA */ 507 static struct resource irda_resources[] = { 508 [0] = { 509 .name = "IrDA", 510 .start = 0xA45D0000, 511 .end = 0xA45D0049, 512 .flags = IORESOURCE_MEM, 513 }, 514 [1] = { 515 .start = evt2irq(0x480), 516 .flags = IORESOURCE_IRQ, 517 }, 518 }; 519 520 static struct platform_device irda_device = { 521 .name = "sh_sir", 522 .num_resources = ARRAY_SIZE(irda_resources), 523 .resource = irda_resources, 524 }; 525 526 #include <media/ak881x.h> 527 #include <media/sh_vou.h> 528 529 static struct ak881x_pdata ak881x_pdata = { 530 .flags = AK881X_IF_MODE_SLAVE, 531 }; 532 533 static struct i2c_board_info ak8813 = { 534 /* With open J18 jumper address is 0x21 */ 535 I2C_BOARD_INFO("ak8813", 0x20), 536 .platform_data = &ak881x_pdata, 537 }; 538 539 static struct sh_vou_pdata sh_vou_pdata = { 540 .bus_fmt = SH_VOU_BUS_8BIT, 541 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, 542 .board_info = &ak8813, 543 .i2c_adap = 0, 544 }; 545 546 static struct resource sh_vou_resources[] = { 547 [0] = { 548 .start = 0xfe960000, 549 .end = 0xfe962043, 550 .flags = IORESOURCE_MEM, 551 }, 552 [1] = { 553 .start = evt2irq(0x8e0), 554 .flags = IORESOURCE_IRQ, 555 }, 556 }; 557 558 static struct platform_device vou_device = { 559 .name = "sh-vou", 560 .id = -1, 561 .num_resources = ARRAY_SIZE(sh_vou_resources), 562 .resource = sh_vou_resources, 563 .dev = { 564 .platform_data = &sh_vou_pdata, 565 }, 566 }; 567 568 static struct platform_device *ms7724se_devices[] __initdata = { 569 &heartbeat_device, 570 &smc91x_eth_device, 571 &lcdc_device, 572 &nor_flash_device, 573 &ceu0_device, 574 &ceu1_device, 575 &keysc_device, 576 &sh_eth_device, 577 &sh7724_usb0_host_device, 578 &sh7724_usb1_gadget_device, 579 &fsi_device, 580 &fsi_ak4642_device, 581 &sdhi0_cn7_device, 582 &sdhi1_cn8_device, 583 &irda_device, 584 &vou_device, 585 }; 586 587 /* I2C device */ 588 static struct i2c_board_info i2c0_devices[] = { 589 { 590 I2C_BOARD_INFO("ak4642", 0x12), 591 }, 592 }; 593 594 #define EEPROM_OP 0xBA206000 595 #define EEPROM_ADR 0xBA206004 596 #define EEPROM_DATA 0xBA20600C 597 #define EEPROM_STAT 0xBA206010 598 #define EEPROM_STRT 0xBA206014 599 600 static int __init sh_eth_is_eeprom_ready(void) 601 { 602 int t = 10000; 603 604 while (t--) { 605 if (!__raw_readw(EEPROM_STAT)) 606 return 1; 607 udelay(1); 608 } 609 610 printk(KERN_ERR "ms7724se can not access to eeprom\n"); 611 return 0; 612 } 613 614 static void __init sh_eth_init(void) 615 { 616 int i; 617 u16 mac; 618 619 /* check EEPROM status */ 620 if (!sh_eth_is_eeprom_ready()) 621 return; 622 623 /* read MAC addr from EEPROM */ 624 for (i = 0 ; i < 3 ; i++) { 625 __raw_writew(0x0, EEPROM_OP); /* read */ 626 __raw_writew(i*2, EEPROM_ADR); 627 __raw_writew(0x1, EEPROM_STRT); 628 if (!sh_eth_is_eeprom_ready()) 629 return; 630 631 mac = __raw_readw(EEPROM_DATA); 632 sh_eth_plat.mac_addr[i << 1] = mac & 0xff; 633 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8; 634 } 635 } 636 637 #define SW4140 0xBA201000 638 #define FPGA_OUT 0xBA200400 639 #define PORT_HIZA 0xA4050158 640 #define PORT_MSELCRB 0xA4050182 641 642 #define SW41_A 0x0100 643 #define SW41_B 0x0200 644 #define SW41_C 0x0400 645 #define SW41_D 0x0800 646 #define SW41_E 0x1000 647 #define SW41_F 0x2000 648 #define SW41_G 0x4000 649 #define SW41_H 0x8000 650 651 extern char ms7724se_sdram_enter_start; 652 extern char ms7724se_sdram_enter_end; 653 extern char ms7724se_sdram_leave_start; 654 extern char ms7724se_sdram_leave_end; 655 656 static int __init arch_setup(void) 657 { 658 /* enable I2C device */ 659 i2c_register_board_info(0, i2c0_devices, 660 ARRAY_SIZE(i2c0_devices)); 661 return 0; 662 } 663 arch_initcall(arch_setup); 664 665 static int __init devices_setup(void) 666 { 667 u16 sw = __raw_readw(SW4140); /* select camera, monitor */ 668 struct clk *clk; 669 u16 fpga_out; 670 671 /* register board specific self-refresh code */ 672 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | 673 SUSP_SH_RSTANDBY, 674 &ms7724se_sdram_enter_start, 675 &ms7724se_sdram_enter_end, 676 &ms7724se_sdram_leave_start, 677 &ms7724se_sdram_leave_end); 678 /* Reset Release */ 679 fpga_out = __raw_readw(FPGA_OUT); 680 /* bit4: NTSC_PDN, bit5: NTSC_RESET */ 681 fpga_out &= ~((1 << 1) | /* LAN */ 682 (1 << 4) | /* AK8813 PDN */ 683 (1 << 5) | /* AK8813 RESET */ 684 (1 << 6) | /* VIDEO DAC */ 685 (1 << 7) | /* AK4643 */ 686 (1 << 8) | /* IrDA */ 687 (1 << 12) | /* USB0 */ 688 (1 << 14)); /* RMII */ 689 __raw_writew(fpga_out | (1 << 4), FPGA_OUT); 690 691 udelay(10); 692 693 /* AK8813 RESET */ 694 __raw_writew(fpga_out | (1 << 5), FPGA_OUT); 695 696 udelay(10); 697 698 __raw_writew(fpga_out, FPGA_OUT); 699 700 /* turn on USB clocks, use external clock */ 701 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 702 703 /* Let LED9 show STATUS2 */ 704 gpio_request(GPIO_FN_STATUS2, NULL); 705 706 /* Lit LED10 show STATUS0 */ 707 gpio_request(GPIO_FN_STATUS0, NULL); 708 709 /* Lit LED11 show PDSTATUS */ 710 gpio_request(GPIO_FN_PDSTATUS, NULL); 711 712 /* enable USB0 port */ 713 __raw_writew(0x0600, 0xa40501d4); 714 715 /* enable USB1 port */ 716 __raw_writew(0x0600, 0xa4050192); 717 718 /* enable IRQ 0,1,2 */ 719 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 720 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 721 gpio_request(GPIO_FN_INTC_IRQ2, NULL); 722 723 /* enable SCIFA3 */ 724 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL); 725 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL); 726 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL); 727 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL); 728 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL); 729 730 /* enable LCDC */ 731 gpio_request(GPIO_FN_LCDD23, NULL); 732 gpio_request(GPIO_FN_LCDD22, NULL); 733 gpio_request(GPIO_FN_LCDD21, NULL); 734 gpio_request(GPIO_FN_LCDD20, NULL); 735 gpio_request(GPIO_FN_LCDD19, NULL); 736 gpio_request(GPIO_FN_LCDD18, NULL); 737 gpio_request(GPIO_FN_LCDD17, NULL); 738 gpio_request(GPIO_FN_LCDD16, NULL); 739 gpio_request(GPIO_FN_LCDD15, NULL); 740 gpio_request(GPIO_FN_LCDD14, NULL); 741 gpio_request(GPIO_FN_LCDD13, NULL); 742 gpio_request(GPIO_FN_LCDD12, NULL); 743 gpio_request(GPIO_FN_LCDD11, NULL); 744 gpio_request(GPIO_FN_LCDD10, NULL); 745 gpio_request(GPIO_FN_LCDD9, NULL); 746 gpio_request(GPIO_FN_LCDD8, NULL); 747 gpio_request(GPIO_FN_LCDD7, NULL); 748 gpio_request(GPIO_FN_LCDD6, NULL); 749 gpio_request(GPIO_FN_LCDD5, NULL); 750 gpio_request(GPIO_FN_LCDD4, NULL); 751 gpio_request(GPIO_FN_LCDD3, NULL); 752 gpio_request(GPIO_FN_LCDD2, NULL); 753 gpio_request(GPIO_FN_LCDD1, NULL); 754 gpio_request(GPIO_FN_LCDD0, NULL); 755 gpio_request(GPIO_FN_LCDDISP, NULL); 756 gpio_request(GPIO_FN_LCDHSYN, NULL); 757 gpio_request(GPIO_FN_LCDDCK, NULL); 758 gpio_request(GPIO_FN_LCDVSYN, NULL); 759 gpio_request(GPIO_FN_LCDDON, NULL); 760 gpio_request(GPIO_FN_LCDVEPWC, NULL); 761 gpio_request(GPIO_FN_LCDVCPWC, NULL); 762 gpio_request(GPIO_FN_LCDRD, NULL); 763 gpio_request(GPIO_FN_LCDLCLK, NULL); 764 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); 765 766 /* enable CEU0 */ 767 gpio_request(GPIO_FN_VIO0_D15, NULL); 768 gpio_request(GPIO_FN_VIO0_D14, NULL); 769 gpio_request(GPIO_FN_VIO0_D13, NULL); 770 gpio_request(GPIO_FN_VIO0_D12, NULL); 771 gpio_request(GPIO_FN_VIO0_D11, NULL); 772 gpio_request(GPIO_FN_VIO0_D10, NULL); 773 gpio_request(GPIO_FN_VIO0_D9, NULL); 774 gpio_request(GPIO_FN_VIO0_D8, NULL); 775 gpio_request(GPIO_FN_VIO0_D7, NULL); 776 gpio_request(GPIO_FN_VIO0_D6, NULL); 777 gpio_request(GPIO_FN_VIO0_D5, NULL); 778 gpio_request(GPIO_FN_VIO0_D4, NULL); 779 gpio_request(GPIO_FN_VIO0_D3, NULL); 780 gpio_request(GPIO_FN_VIO0_D2, NULL); 781 gpio_request(GPIO_FN_VIO0_D1, NULL); 782 gpio_request(GPIO_FN_VIO0_D0, NULL); 783 gpio_request(GPIO_FN_VIO0_VD, NULL); 784 gpio_request(GPIO_FN_VIO0_CLK, NULL); 785 gpio_request(GPIO_FN_VIO0_FLD, NULL); 786 gpio_request(GPIO_FN_VIO0_HD, NULL); 787 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 788 789 /* enable CEU1 */ 790 gpio_request(GPIO_FN_VIO1_D7, NULL); 791 gpio_request(GPIO_FN_VIO1_D6, NULL); 792 gpio_request(GPIO_FN_VIO1_D5, NULL); 793 gpio_request(GPIO_FN_VIO1_D4, NULL); 794 gpio_request(GPIO_FN_VIO1_D3, NULL); 795 gpio_request(GPIO_FN_VIO1_D2, NULL); 796 gpio_request(GPIO_FN_VIO1_D1, NULL); 797 gpio_request(GPIO_FN_VIO1_D0, NULL); 798 gpio_request(GPIO_FN_VIO1_FLD, NULL); 799 gpio_request(GPIO_FN_VIO1_HD, NULL); 800 gpio_request(GPIO_FN_VIO1_VD, NULL); 801 gpio_request(GPIO_FN_VIO1_CLK, NULL); 802 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 803 804 /* KEYSC */ 805 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 806 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 807 gpio_request(GPIO_FN_KEYIN4, NULL); 808 gpio_request(GPIO_FN_KEYIN3, NULL); 809 gpio_request(GPIO_FN_KEYIN2, NULL); 810 gpio_request(GPIO_FN_KEYIN1, NULL); 811 gpio_request(GPIO_FN_KEYIN0, NULL); 812 gpio_request(GPIO_FN_KEYOUT3, NULL); 813 gpio_request(GPIO_FN_KEYOUT2, NULL); 814 gpio_request(GPIO_FN_KEYOUT1, NULL); 815 gpio_request(GPIO_FN_KEYOUT0, NULL); 816 817 /* enable FSI */ 818 gpio_request(GPIO_FN_FSIMCKA, NULL); 819 gpio_request(GPIO_FN_FSIIASD, NULL); 820 gpio_request(GPIO_FN_FSIOASD, NULL); 821 gpio_request(GPIO_FN_FSIIABCK, NULL); 822 gpio_request(GPIO_FN_FSIIALRCK, NULL); 823 gpio_request(GPIO_FN_FSIOABCK, NULL); 824 gpio_request(GPIO_FN_FSIOALRCK, NULL); 825 gpio_request(GPIO_FN_CLKAUDIOAO, NULL); 826 827 /* set SPU2 clock to 83.4 MHz */ 828 clk = clk_get(NULL, "spu_clk"); 829 if (!IS_ERR(clk)) { 830 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 831 clk_put(clk); 832 } 833 834 /* change parent of FSI A */ 835 clk = clk_get(NULL, "fsia_clk"); 836 if (!IS_ERR(clk)) { 837 /* 48kHz dummy clock was used to make sure 1/1 divide */ 838 clk_set_rate(&sh7724_fsimcka_clk, 48000); 839 clk_set_parent(clk, &sh7724_fsimcka_clk); 840 clk_set_rate(clk, 48000); 841 clk_put(clk); 842 } 843 844 /* SDHI0 connected to cn7 */ 845 gpio_request(GPIO_FN_SDHI0CD, NULL); 846 gpio_request(GPIO_FN_SDHI0WP, NULL); 847 gpio_request(GPIO_FN_SDHI0D3, NULL); 848 gpio_request(GPIO_FN_SDHI0D2, NULL); 849 gpio_request(GPIO_FN_SDHI0D1, NULL); 850 gpio_request(GPIO_FN_SDHI0D0, NULL); 851 gpio_request(GPIO_FN_SDHI0CMD, NULL); 852 gpio_request(GPIO_FN_SDHI0CLK, NULL); 853 854 /* SDHI1 connected to cn8 */ 855 gpio_request(GPIO_FN_SDHI1CD, NULL); 856 gpio_request(GPIO_FN_SDHI1WP, NULL); 857 gpio_request(GPIO_FN_SDHI1D3, NULL); 858 gpio_request(GPIO_FN_SDHI1D2, NULL); 859 gpio_request(GPIO_FN_SDHI1D1, NULL); 860 gpio_request(GPIO_FN_SDHI1D0, NULL); 861 gpio_request(GPIO_FN_SDHI1CMD, NULL); 862 gpio_request(GPIO_FN_SDHI1CLK, NULL); 863 864 /* enable IrDA */ 865 gpio_request(GPIO_FN_IRDA_OUT, NULL); 866 gpio_request(GPIO_FN_IRDA_IN, NULL); 867 868 /* 869 * enable SH-Eth 870 * 871 * please remove J33 pin from your board !! 872 * 873 * ms7724 board should not use GPIO_FN_LNKSTA pin 874 * So, This time PTX5 is set to input pin 875 */ 876 gpio_request(GPIO_FN_RMII_RXD0, NULL); 877 gpio_request(GPIO_FN_RMII_RXD1, NULL); 878 gpio_request(GPIO_FN_RMII_TXD0, NULL); 879 gpio_request(GPIO_FN_RMII_TXD1, NULL); 880 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 881 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 882 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 883 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 884 gpio_request(GPIO_FN_MDIO, NULL); 885 gpio_request(GPIO_FN_MDC, NULL); 886 gpio_request(GPIO_PTX5, NULL); 887 gpio_direction_input(GPIO_PTX5); 888 sh_eth_init(); 889 890 if (sw & SW41_B) { 891 /* 720p */ 892 lcdc_info.ch[0].lcd_modes = lcdc_720p_modes; 893 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes); 894 } else { 895 /* VGA */ 896 lcdc_info.ch[0].lcd_modes = lcdc_vga_modes; 897 lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes); 898 } 899 900 if (sw & SW41_A) { 901 /* Digital monitor */ 902 lcdc_info.ch[0].interface_type = RGB18; 903 lcdc_info.ch[0].flags = 0; 904 } else { 905 /* Analog monitor */ 906 lcdc_info.ch[0].interface_type = RGB24; 907 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; 908 } 909 910 /* VOU */ 911 gpio_request(GPIO_FN_DV_D15, NULL); 912 gpio_request(GPIO_FN_DV_D14, NULL); 913 gpio_request(GPIO_FN_DV_D13, NULL); 914 gpio_request(GPIO_FN_DV_D12, NULL); 915 gpio_request(GPIO_FN_DV_D11, NULL); 916 gpio_request(GPIO_FN_DV_D10, NULL); 917 gpio_request(GPIO_FN_DV_D9, NULL); 918 gpio_request(GPIO_FN_DV_D8, NULL); 919 gpio_request(GPIO_FN_DV_CLKI, NULL); 920 gpio_request(GPIO_FN_DV_CLK, NULL); 921 gpio_request(GPIO_FN_DV_VSYNC, NULL); 922 gpio_request(GPIO_FN_DV_HSYNC, NULL); 923 924 return platform_add_devices(ms7724se_devices, 925 ARRAY_SIZE(ms7724se_devices)); 926 } 927 device_initcall(devices_setup); 928 929 static struct sh_machine_vector mv_ms7724se __initmv = { 930 .mv_name = "ms7724se", 931 .mv_init_irq = init_se7724_IRQ, 932 }; 933