1 /* 2 * linux/arch/sh/boards/se/7722/setup.c 3 * 4 * Copyright (C) 2007 Nobuhiro Iwamatsu 5 * 6 * Hitachi UL SolutionEngine 7722 Support. 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 * 12 */ 13 #include <linux/init.h> 14 #include <linux/platform_device.h> 15 #include <linux/ata_platform.h> 16 #include <linux/input.h> 17 #include <linux/smc91x.h> 18 #include <mach-se/mach/se7722.h> 19 #include <mach-se/mach/mrshpc.h> 20 #include <asm/machvec.h> 21 #include <asm/clock.h> 22 #include <asm/io.h> 23 #include <asm/heartbeat.h> 24 #include <asm/sh_keysc.h> 25 #include <cpu/sh7722.h> 26 27 /* Heartbeat */ 28 static struct heartbeat_data heartbeat_data = { 29 .regsize = 16, 30 }; 31 32 static struct resource heartbeat_resources[] = { 33 [0] = { 34 .start = PA_LED, 35 .end = PA_LED, 36 .flags = IORESOURCE_MEM, 37 }, 38 }; 39 40 static struct platform_device heartbeat_device = { 41 .name = "heartbeat", 42 .id = -1, 43 .dev = { 44 .platform_data = &heartbeat_data, 45 }, 46 .num_resources = ARRAY_SIZE(heartbeat_resources), 47 .resource = heartbeat_resources, 48 }; 49 50 /* SMC91x */ 51 static struct smc91x_platdata smc91x_info = { 52 .flags = SMC91X_USE_16BIT, 53 }; 54 55 static struct resource smc91x_eth_resources[] = { 56 [0] = { 57 .name = "smc91x-regs" , 58 .start = PA_LAN + 0x300, 59 .end = PA_LAN + 0x300 + 0x10 , 60 .flags = IORESOURCE_MEM, 61 }, 62 [1] = { 63 .start = SMC_IRQ, 64 .end = SMC_IRQ, 65 .flags = IORESOURCE_IRQ, 66 }, 67 }; 68 69 static struct platform_device smc91x_eth_device = { 70 .name = "smc91x", 71 .id = 0, 72 .dev = { 73 .dma_mask = NULL, /* don't use dma */ 74 .coherent_dma_mask = 0xffffffff, 75 .platform_data = &smc91x_info, 76 }, 77 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 78 .resource = smc91x_eth_resources, 79 }; 80 81 static struct resource cf_ide_resources[] = { 82 [0] = { 83 .start = PA_MRSHPC_IO + 0x1f0, 84 .end = PA_MRSHPC_IO + 0x1f0 + 8 , 85 .flags = IORESOURCE_IO, 86 }, 87 [1] = { 88 .start = PA_MRSHPC_IO + 0x1f0 + 0x206, 89 .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8, 90 .flags = IORESOURCE_IO, 91 }, 92 [2] = { 93 .start = MRSHPC_IRQ0, 94 .end = MRSHPC_IRQ0, 95 .flags = IORESOURCE_IRQ, 96 }, 97 }; 98 99 static struct platform_device cf_ide_device = { 100 .name = "pata_platform", 101 .id = -1, 102 .num_resources = ARRAY_SIZE(cf_ide_resources), 103 .resource = cf_ide_resources, 104 }; 105 106 static struct sh_keysc_info sh_keysc_info = { 107 .mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */ 108 .scan_timing = 3, 109 .delay = 5, 110 .keycodes = { /* SW1 -> SW30 */ 111 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, 112 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J, 113 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O, 114 KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, 115 KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y, 116 KEY_Z, 117 KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */ 118 }, 119 }; 120 121 static struct resource sh_keysc_resources[] = { 122 [0] = { 123 .start = 0x044b0000, 124 .end = 0x044b000f, 125 .flags = IORESOURCE_MEM, 126 }, 127 [1] = { 128 .start = 79, 129 .flags = IORESOURCE_IRQ, 130 }, 131 }; 132 133 static struct platform_device sh_keysc_device = { 134 .name = "sh_keysc", 135 .id = 0, /* "keysc0" clock */ 136 .num_resources = ARRAY_SIZE(sh_keysc_resources), 137 .resource = sh_keysc_resources, 138 .dev = { 139 .platform_data = &sh_keysc_info, 140 }, 141 .archdata = { 142 .hwblk_id = HWBLK_KEYSC, 143 }, 144 }; 145 146 static struct platform_device *se7722_devices[] __initdata = { 147 &heartbeat_device, 148 &smc91x_eth_device, 149 &cf_ide_device, 150 &sh_keysc_device, 151 }; 152 153 static int __init se7722_devices_setup(void) 154 { 155 mrshpc_setup_windows(); 156 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); 157 } 158 device_initcall(se7722_devices_setup); 159 160 static void __init se7722_setup(char **cmdline_p) 161 { 162 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ 163 164 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 165 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 166 167 /* LCDC I/O */ 168 ctrl_outw(0x0020, PORT_PSELD); 169 170 /* SIOF1*/ 171 ctrl_outw(0x0003, PORT_PSELB); 172 ctrl_outw(0xe000, PORT_PSELC); 173 ctrl_outw(0x0000, PORT_PKCR); 174 175 /* LCDC */ 176 ctrl_outw(0x4020, PORT_PHCR); 177 ctrl_outw(0x0000, PORT_PLCR); 178 ctrl_outw(0x0000, PORT_PMCR); 179 ctrl_outw(0x0002, PORT_PRCR); 180 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ 181 182 /* KEYSC */ 183 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 184 ctrl_outw(0x0000, PORT_PYCR); 185 ctrl_outw(0x0000, PORT_PZCR); 186 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 187 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 188 } 189 190 /* 191 * The Machine Vector 192 */ 193 static struct sh_machine_vector mv_se7722 __initmv = { 194 .mv_name = "Solution Engine 7722" , 195 .mv_setup = se7722_setup , 196 .mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR, 197 .mv_init_irq = init_se7722_IRQ, 198 }; 199