1 /* 2 * linux/arch/sh/boards/se/7722/setup.c 3 * 4 * Copyright (C) 2007 Nobuhiro Iwamatsu 5 * 6 * Hitachi UL SolutionEngine 7722 Support. 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 * 12 */ 13 #include <linux/init.h> 14 #include <linux/platform_device.h> 15 #include <linux/ata_platform.h> 16 #include <linux/input.h> 17 #include <linux/smc91x.h> 18 #include <mach-se/mach/se7722.h> 19 #include <mach-se/mach/mrshpc.h> 20 #include <asm/machvec.h> 21 #include <asm/clock.h> 22 #include <asm/io.h> 23 #include <asm/heartbeat.h> 24 #include <asm/sh_keysc.h> 25 26 /* Heartbeat */ 27 static struct heartbeat_data heartbeat_data = { 28 .regsize = 16, 29 }; 30 31 static struct resource heartbeat_resources[] = { 32 [0] = { 33 .start = PA_LED, 34 .end = PA_LED, 35 .flags = IORESOURCE_MEM, 36 }, 37 }; 38 39 static struct platform_device heartbeat_device = { 40 .name = "heartbeat", 41 .id = -1, 42 .dev = { 43 .platform_data = &heartbeat_data, 44 }, 45 .num_resources = ARRAY_SIZE(heartbeat_resources), 46 .resource = heartbeat_resources, 47 }; 48 49 /* SMC91x */ 50 static struct smc91x_platdata smc91x_info = { 51 .flags = SMC91X_USE_16BIT, 52 }; 53 54 static struct resource smc91x_eth_resources[] = { 55 [0] = { 56 .name = "smc91x-regs" , 57 .start = PA_LAN + 0x300, 58 .end = PA_LAN + 0x300 + 0x10 , 59 .flags = IORESOURCE_MEM, 60 }, 61 [1] = { 62 .start = SMC_IRQ, 63 .end = SMC_IRQ, 64 .flags = IORESOURCE_IRQ, 65 }, 66 }; 67 68 static struct platform_device smc91x_eth_device = { 69 .name = "smc91x", 70 .id = 0, 71 .dev = { 72 .dma_mask = NULL, /* don't use dma */ 73 .coherent_dma_mask = 0xffffffff, 74 .platform_data = &smc91x_info, 75 }, 76 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 77 .resource = smc91x_eth_resources, 78 }; 79 80 static struct resource cf_ide_resources[] = { 81 [0] = { 82 .start = PA_MRSHPC_IO + 0x1f0, 83 .end = PA_MRSHPC_IO + 0x1f0 + 8 , 84 .flags = IORESOURCE_IO, 85 }, 86 [1] = { 87 .start = PA_MRSHPC_IO + 0x1f0 + 0x206, 88 .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8, 89 .flags = IORESOURCE_IO, 90 }, 91 [2] = { 92 .start = MRSHPC_IRQ0, 93 .end = MRSHPC_IRQ0, 94 .flags = IORESOURCE_IRQ, 95 }, 96 }; 97 98 static struct platform_device cf_ide_device = { 99 .name = "pata_platform", 100 .id = -1, 101 .num_resources = ARRAY_SIZE(cf_ide_resources), 102 .resource = cf_ide_resources, 103 }; 104 105 static struct sh_keysc_info sh_keysc_info = { 106 .mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */ 107 .scan_timing = 3, 108 .delay = 5, 109 .keycodes = { /* SW1 -> SW30 */ 110 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, 111 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J, 112 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O, 113 KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, 114 KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y, 115 KEY_Z, 116 KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */ 117 }, 118 }; 119 120 static struct resource sh_keysc_resources[] = { 121 [0] = { 122 .start = 0x044b0000, 123 .end = 0x044b000f, 124 .flags = IORESOURCE_MEM, 125 }, 126 [1] = { 127 .start = 79, 128 .flags = IORESOURCE_IRQ, 129 }, 130 }; 131 132 static struct platform_device sh_keysc_device = { 133 .name = "sh_keysc", 134 .id = 0, /* "keysc0" clock */ 135 .num_resources = ARRAY_SIZE(sh_keysc_resources), 136 .resource = sh_keysc_resources, 137 .dev = { 138 .platform_data = &sh_keysc_info, 139 }, 140 }; 141 142 static struct platform_device *se7722_devices[] __initdata = { 143 &heartbeat_device, 144 &smc91x_eth_device, 145 &cf_ide_device, 146 &sh_keysc_device, 147 }; 148 149 static int __init se7722_devices_setup(void) 150 { 151 mrshpc_setup_windows(); 152 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); 153 } 154 device_initcall(se7722_devices_setup); 155 156 static void __init se7722_setup(char **cmdline_p) 157 { 158 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ 159 160 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 161 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 162 163 /* LCDC I/O */ 164 ctrl_outw(0x0020, PORT_PSELD); 165 166 /* SIOF1*/ 167 ctrl_outw(0x0003, PORT_PSELB); 168 ctrl_outw(0xe000, PORT_PSELC); 169 ctrl_outw(0x0000, PORT_PKCR); 170 171 /* LCDC */ 172 ctrl_outw(0x4020, PORT_PHCR); 173 ctrl_outw(0x0000, PORT_PLCR); 174 ctrl_outw(0x0000, PORT_PMCR); 175 ctrl_outw(0x0002, PORT_PRCR); 176 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ 177 178 /* KEYSC */ 179 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 180 ctrl_outw(0x0000, PORT_PYCR); 181 ctrl_outw(0x0000, PORT_PZCR); 182 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 183 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 184 } 185 186 /* 187 * The Machine Vector 188 */ 189 static struct sh_machine_vector mv_se7722 __initmv = { 190 .mv_name = "Solution Engine 7722" , 191 .mv_setup = se7722_setup , 192 .mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR, 193 .mv_init_irq = init_se7722_IRQ, 194 }; 195