xref: /openbmc/linux/arch/sh/boards/mach-se/7722/setup.c (revision b34e08d5)
1 /*
2  * linux/arch/sh/boards/se/7722/setup.c
3  *
4  * Copyright (C) 2007 Nobuhiro Iwamatsu
5  * Copyright (C) 2012 Paul Mundt
6  *
7  * Hitachi UL SolutionEngine 7722 Support.
8  *
9  * This file is subject to the terms and conditions of the GNU General Public
10  * License.  See the file "COPYING" in the main directory of this archive
11  * for more details.
12  *
13  */
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/ata_platform.h>
17 #include <linux/input.h>
18 #include <linux/input/sh_keysc.h>
19 #include <linux/irqdomain.h>
20 #include <linux/smc91x.h>
21 #include <linux/sh_intc.h>
22 #include <mach-se/mach/se7722.h>
23 #include <mach-se/mach/mrshpc.h>
24 #include <asm/machvec.h>
25 #include <asm/clock.h>
26 #include <asm/io.h>
27 #include <asm/heartbeat.h>
28 #include <cpu/sh7722.h>
29 
30 /* Heartbeat */
31 static struct resource heartbeat_resource = {
32 	.start  = PA_LED,
33 	.end    = PA_LED,
34 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
35 };
36 
37 static struct platform_device heartbeat_device = {
38 	.name           = "heartbeat",
39 	.id             = -1,
40 	.num_resources  = 1,
41 	.resource       = &heartbeat_resource,
42 };
43 
44 /* SMC91x */
45 static struct smc91x_platdata smc91x_info = {
46 	.flags = SMC91X_USE_16BIT,
47 };
48 
49 static struct resource smc91x_eth_resources[] = {
50 	[0] = {
51 		.name   = "smc91x-regs" ,
52 		.start  = PA_LAN + 0x300,
53 		.end    = PA_LAN + 0x300 + 0x10 ,
54 		.flags  = IORESOURCE_MEM,
55 	},
56 	[1] = {
57 		/* Filled in later */
58 		.flags  = IORESOURCE_IRQ,
59 	},
60 };
61 
62 static struct platform_device smc91x_eth_device = {
63 	.name           = "smc91x",
64 	.id             = 0,
65 	.dev = {
66 		.dma_mask               = NULL,         /* don't use dma */
67 		.coherent_dma_mask      = 0xffffffff,
68 		.platform_data	= &smc91x_info,
69 	},
70 	.num_resources  = ARRAY_SIZE(smc91x_eth_resources),
71 	.resource       = smc91x_eth_resources,
72 };
73 
74 static struct resource cf_ide_resources[] = {
75 	[0] = {
76 		.start  = PA_MRSHPC_IO + 0x1f0,
77 		.end    = PA_MRSHPC_IO + 0x1f0 + 8 ,
78 		.flags  = IORESOURCE_IO,
79 	},
80 	[1] = {
81 		.start  = PA_MRSHPC_IO + 0x1f0 + 0x206,
82 		.end    = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
83 		.flags  = IORESOURCE_IO,
84 	},
85 	[2] = {
86 		/* Filled in later */
87 		.flags  = IORESOURCE_IRQ,
88 	},
89 };
90 
91 static struct platform_device cf_ide_device  = {
92 	.name           = "pata_platform",
93 	.id             = -1,
94 	.num_resources  = ARRAY_SIZE(cf_ide_resources),
95 	.resource       = cf_ide_resources,
96 };
97 
98 static struct sh_keysc_info sh_keysc_info = {
99 	.mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
100 	.scan_timing = 3,
101 	.delay = 5,
102 	.keycodes = { /* SW1 -> SW30 */
103 		KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
104 		KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
105 		KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
106 		KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
107 		KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
108 		KEY_Z,
109 		KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
110 	},
111 };
112 
113 static struct resource sh_keysc_resources[] = {
114 	[0] = {
115 		.start  = 0x044b0000,
116 		.end    = 0x044b000f,
117 		.flags  = IORESOURCE_MEM,
118 	},
119 	[1] = {
120 		.start  = evt2irq(0xbe0),
121 		.flags  = IORESOURCE_IRQ,
122 	},
123 };
124 
125 static struct platform_device sh_keysc_device = {
126 	.name           = "sh_keysc",
127 	.id             = 0, /* "keysc0" clock */
128 	.num_resources  = ARRAY_SIZE(sh_keysc_resources),
129 	.resource       = sh_keysc_resources,
130 	.dev	= {
131 		.platform_data	= &sh_keysc_info,
132 	},
133 };
134 
135 static struct platform_device *se7722_devices[] __initdata = {
136 	&heartbeat_device,
137 	&smc91x_eth_device,
138 	&cf_ide_device,
139 	&sh_keysc_device,
140 };
141 
142 static int __init se7722_devices_setup(void)
143 {
144 	mrshpc_setup_windows();
145 
146 	/* Wire-up dynamic vectors */
147 	cf_ide_resources[2].start = cf_ide_resources[2].end =
148 		irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
149 
150 	smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
151 		irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
152 
153 	return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
154 }
155 device_initcall(se7722_devices_setup);
156 
157 static void __init se7722_setup(char **cmdline_p)
158 {
159 	__raw_writew(0x010D, FPGA_OUT);    /* FPGA */
160 
161 	__raw_writew(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
162 	__raw_writew(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
163 
164 	/* LCDC I/O */
165 	__raw_writew(0x0020, PORT_PSELD);
166 
167 	/* SIOF1*/
168 	__raw_writew(0x0003, PORT_PSELB);
169 	__raw_writew(0xe000, PORT_PSELC);
170 	__raw_writew(0x0000, PORT_PKCR);
171 
172 	/* LCDC */
173 	__raw_writew(0x4020, PORT_PHCR);
174 	__raw_writew(0x0000, PORT_PLCR);
175 	__raw_writew(0x0000, PORT_PMCR);
176 	__raw_writew(0x0002, PORT_PRCR);
177 	__raw_writew(0x0000, PORT_PXCR);   /* LCDC,CS6A */
178 
179 	/* KEYSC */
180 	__raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
181 	__raw_writew(0x0000, PORT_PYCR);
182 	__raw_writew(0x0000, PORT_PZCR);
183 	__raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
184 	__raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
185 }
186 
187 /*
188  * The Machine Vector
189  */
190 static struct sh_machine_vector mv_se7722 __initmv = {
191 	.mv_name                = "Solution Engine 7722" ,
192 	.mv_setup               = se7722_setup ,
193 	.mv_init_irq		= init_se7722_IRQ,
194 };
195