xref: /openbmc/linux/arch/sh/boards/mach-se/7722/setup.c (revision ab73b751)
1 /*
2  * linux/arch/sh/boards/se/7722/setup.c
3  *
4  * Copyright (C) 2007 Nobuhiro Iwamatsu
5  *
6  * Hitachi UL SolutionEngine 7722 Support.
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  *
12  */
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/ata_platform.h>
16 #include <linux/input.h>
17 #include <linux/input/sh_keysc.h>
18 #include <linux/smc91x.h>
19 #include <linux/sh_intc.h>
20 #include <mach-se/mach/se7722.h>
21 #include <mach-se/mach/mrshpc.h>
22 #include <asm/machvec.h>
23 #include <asm/clock.h>
24 #include <asm/io.h>
25 #include <asm/heartbeat.h>
26 #include <cpu/sh7722.h>
27 
28 /* Heartbeat */
29 static struct resource heartbeat_resource = {
30 	.start  = PA_LED,
31 	.end    = PA_LED,
32 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
33 };
34 
35 static struct platform_device heartbeat_device = {
36 	.name           = "heartbeat",
37 	.id             = -1,
38 	.num_resources  = 1,
39 	.resource       = &heartbeat_resource,
40 };
41 
42 /* SMC91x */
43 static struct smc91x_platdata smc91x_info = {
44 	.flags = SMC91X_USE_16BIT,
45 };
46 
47 static struct resource smc91x_eth_resources[] = {
48 	[0] = {
49 		.name   = "smc91x-regs" ,
50 		.start  = PA_LAN + 0x300,
51 		.end    = PA_LAN + 0x300 + 0x10 ,
52 		.flags  = IORESOURCE_MEM,
53 	},
54 	[1] = {
55 		/* Filled in later */
56 		.flags  = IORESOURCE_IRQ,
57 	},
58 };
59 
60 static struct platform_device smc91x_eth_device = {
61 	.name           = "smc91x",
62 	.id             = 0,
63 	.dev = {
64 		.dma_mask               = NULL,         /* don't use dma */
65 		.coherent_dma_mask      = 0xffffffff,
66 		.platform_data	= &smc91x_info,
67 	},
68 	.num_resources  = ARRAY_SIZE(smc91x_eth_resources),
69 	.resource       = smc91x_eth_resources,
70 };
71 
72 static struct resource cf_ide_resources[] = {
73 	[0] = {
74 		.start  = PA_MRSHPC_IO + 0x1f0,
75 		.end    = PA_MRSHPC_IO + 0x1f0 + 8 ,
76 		.flags  = IORESOURCE_IO,
77 	},
78 	[1] = {
79 		.start  = PA_MRSHPC_IO + 0x1f0 + 0x206,
80 		.end    = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
81 		.flags  = IORESOURCE_IO,
82 	},
83 	[2] = {
84 		/* Filled in later */
85 		.flags  = IORESOURCE_IRQ,
86 	},
87 };
88 
89 static struct platform_device cf_ide_device  = {
90 	.name           = "pata_platform",
91 	.id             = -1,
92 	.num_resources  = ARRAY_SIZE(cf_ide_resources),
93 	.resource       = cf_ide_resources,
94 };
95 
96 static struct sh_keysc_info sh_keysc_info = {
97 	.mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
98 	.scan_timing = 3,
99 	.delay = 5,
100 	.keycodes = { /* SW1 -> SW30 */
101 		KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
102 		KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
103 		KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
104 		KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
105 		KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
106 		KEY_Z,
107 		KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
108 	},
109 };
110 
111 static struct resource sh_keysc_resources[] = {
112 	[0] = {
113 		.start  = 0x044b0000,
114 		.end    = 0x044b000f,
115 		.flags  = IORESOURCE_MEM,
116 	},
117 	[1] = {
118 		.start  = evt2irq(0xbe0),
119 		.flags  = IORESOURCE_IRQ,
120 	},
121 };
122 
123 static struct platform_device sh_keysc_device = {
124 	.name           = "sh_keysc",
125 	.id             = 0, /* "keysc0" clock */
126 	.num_resources  = ARRAY_SIZE(sh_keysc_resources),
127 	.resource       = sh_keysc_resources,
128 	.dev	= {
129 		.platform_data	= &sh_keysc_info,
130 	},
131 };
132 
133 static struct platform_device *se7722_devices[] __initdata = {
134 	&heartbeat_device,
135 	&smc91x_eth_device,
136 	&cf_ide_device,
137 	&sh_keysc_device,
138 };
139 
140 static int __init se7722_devices_setup(void)
141 {
142 	mrshpc_setup_windows();
143 
144 	/* Wire-up dynamic vectors */
145 	cf_ide_resources[2].start = cf_ide_resources[2].end =
146 		se7722_fpga_irq[SE7722_FPGA_IRQ_MRSHPC0];
147 
148 	smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
149 		se7722_fpga_irq[SE7722_FPGA_IRQ_SMC];
150 
151 	return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
152 }
153 device_initcall(se7722_devices_setup);
154 
155 static void __init se7722_setup(char **cmdline_p)
156 {
157 	__raw_writew(0x010D, FPGA_OUT);    /* FPGA */
158 
159 	__raw_writew(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
160 	__raw_writew(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
161 
162 	/* LCDC I/O */
163 	__raw_writew(0x0020, PORT_PSELD);
164 
165 	/* SIOF1*/
166 	__raw_writew(0x0003, PORT_PSELB);
167 	__raw_writew(0xe000, PORT_PSELC);
168 	__raw_writew(0x0000, PORT_PKCR);
169 
170 	/* LCDC */
171 	__raw_writew(0x4020, PORT_PHCR);
172 	__raw_writew(0x0000, PORT_PLCR);
173 	__raw_writew(0x0000, PORT_PMCR);
174 	__raw_writew(0x0002, PORT_PRCR);
175 	__raw_writew(0x0000, PORT_PXCR);   /* LCDC,CS6A */
176 
177 	/* KEYSC */
178 	__raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
179 	__raw_writew(0x0000, PORT_PYCR);
180 	__raw_writew(0x0000, PORT_PZCR);
181 	__raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
182 	__raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
183 }
184 
185 /*
186  * The Machine Vector
187  */
188 static struct sh_machine_vector mv_se7722 __initmv = {
189 	.mv_name                = "Solution Engine 7722" ,
190 	.mv_setup               = se7722_setup ,
191 	.mv_init_irq		= init_se7722_IRQ,
192 };
193