1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * linux/arch/sh/boards/se/770x/setup.c 4 * 5 * Copyright (C) 2000 Kazumoto Kojima 6 * 7 * Hitachi SolutionEngine Support. 8 * 9 */ 10 #include <linux/init.h> 11 #include <linux/platform_device.h> 12 #include <mach-se/mach/se.h> 13 #include <mach-se/mach/mrshpc.h> 14 #include <asm/machvec.h> 15 #include <asm/io.h> 16 #include <asm/smc37c93x.h> 17 #include <asm/heartbeat.h> 18 19 /* 20 * Configure the Super I/O chip 21 */ 22 static void __init smsc_config(int index, int data) 23 { 24 outb_p(index, INDEX_PORT); 25 outb_p(data, DATA_PORT); 26 } 27 28 /* XXX: Another candidate for a more generic cchip machine vector */ 29 static void __init smsc_setup(char **cmdline_p) 30 { 31 outb_p(CONFIG_ENTER, CONFIG_PORT); 32 outb_p(CONFIG_ENTER, CONFIG_PORT); 33 34 /* FDC */ 35 smsc_config(CURRENT_LDN_INDEX, LDN_FDC); 36 smsc_config(ACTIVATE_INDEX, 0x01); 37 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */ 38 39 /* AUXIO (GPIO): to use IDE1 */ 40 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO); 41 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */ 42 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */ 43 44 /* COM1 */ 45 smsc_config(CURRENT_LDN_INDEX, LDN_COM1); 46 smsc_config(ACTIVATE_INDEX, 0x01); 47 smsc_config(IO_BASE_HI_INDEX, 0x03); 48 smsc_config(IO_BASE_LO_INDEX, 0xf8); 49 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */ 50 51 /* COM2 */ 52 smsc_config(CURRENT_LDN_INDEX, LDN_COM2); 53 smsc_config(ACTIVATE_INDEX, 0x01); 54 smsc_config(IO_BASE_HI_INDEX, 0x02); 55 smsc_config(IO_BASE_LO_INDEX, 0xf8); 56 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */ 57 58 /* RTC */ 59 smsc_config(CURRENT_LDN_INDEX, LDN_RTC); 60 smsc_config(ACTIVATE_INDEX, 0x01); 61 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */ 62 63 /* XXX: PARPORT, KBD, and MOUSE will come here... */ 64 outb_p(CONFIG_EXIT, CONFIG_PORT); 65 } 66 67 68 static struct resource cf_ide_resources[] = { 69 [0] = { 70 .start = PA_MRSHPC_IO + 0x1f0, 71 .end = PA_MRSHPC_IO + 0x1f0 + 8, 72 .flags = IORESOURCE_MEM, 73 }, 74 [1] = { 75 .start = PA_MRSHPC_IO + 0x1f0 + 0x206, 76 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8, 77 .flags = IORESOURCE_MEM, 78 }, 79 [2] = { 80 .start = IRQ_CFCARD, 81 .flags = IORESOURCE_IRQ, 82 }, 83 }; 84 85 static struct platform_device cf_ide_device = { 86 .name = "pata_platform", 87 .id = -1, 88 .num_resources = ARRAY_SIZE(cf_ide_resources), 89 .resource = cf_ide_resources, 90 }; 91 92 static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 }; 93 94 static struct heartbeat_data heartbeat_data = { 95 .bit_pos = heartbeat_bit_pos, 96 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 97 }; 98 99 static struct resource heartbeat_resource = { 100 .start = PA_LED, 101 .end = PA_LED, 102 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, 103 }; 104 105 static struct platform_device heartbeat_device = { 106 .name = "heartbeat", 107 .id = -1, 108 .dev = { 109 .platform_data = &heartbeat_data, 110 }, 111 .num_resources = 1, 112 .resource = &heartbeat_resource, 113 }; 114 115 #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 116 defined(CONFIG_CPU_SUBTYPE_SH7712) 117 /* SH771X Ethernet driver */ 118 static struct resource sh_eth0_resources[] = { 119 [0] = { 120 .start = SH_ETH0_BASE, 121 .end = SH_ETH0_BASE + 0x1B8, 122 .flags = IORESOURCE_MEM, 123 }, 124 [1] = { 125 .start = SH_ETH0_IRQ, 126 .end = SH_ETH0_IRQ, 127 .flags = IORESOURCE_IRQ, 128 }, 129 }; 130 131 static struct platform_device sh_eth0_device = { 132 .name = "sh771x-ether", 133 .id = 0, 134 .dev = { 135 .platform_data = PHY_ID, 136 }, 137 .num_resources = ARRAY_SIZE(sh_eth0_resources), 138 .resource = sh_eth0_resources, 139 }; 140 141 static struct resource sh_eth1_resources[] = { 142 [0] = { 143 .start = SH_ETH1_BASE, 144 .end = SH_ETH1_BASE + 0x1B8, 145 .flags = IORESOURCE_MEM, 146 }, 147 [1] = { 148 .start = SH_ETH1_IRQ, 149 .end = SH_ETH1_IRQ, 150 .flags = IORESOURCE_IRQ, 151 }, 152 }; 153 154 static struct platform_device sh_eth1_device = { 155 .name = "sh771x-ether", 156 .id = 1, 157 .dev = { 158 .platform_data = PHY_ID, 159 }, 160 .num_resources = ARRAY_SIZE(sh_eth1_resources), 161 .resource = sh_eth1_resources, 162 }; 163 #endif 164 165 static struct platform_device *se_devices[] __initdata = { 166 &heartbeat_device, 167 &cf_ide_device, 168 #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 169 defined(CONFIG_CPU_SUBTYPE_SH7712) 170 &sh_eth0_device, 171 &sh_eth1_device, 172 #endif 173 }; 174 175 static int __init se_devices_setup(void) 176 { 177 mrshpc_setup_windows(); 178 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices)); 179 } 180 device_initcall(se_devices_setup); 181 182 /* 183 * The Machine Vector 184 */ 185 static struct sh_machine_vector mv_se __initmv = { 186 .mv_name = "SolutionEngine", 187 .mv_setup = smsc_setup, 188 .mv_init_irq = init_se_IRQ, 189 }; 190