1da2014a2SPaul Mundt /* 2da2014a2SPaul Mundt * linux/arch/sh/boards/se/770x/irq.c 3da2014a2SPaul Mundt * 4da2014a2SPaul Mundt * Copyright (C) 2000 Kazumoto Kojima 5da2014a2SPaul Mundt * Copyright (C) 2006 Nobuhiro Iwamatsu 6da2014a2SPaul Mundt * 7da2014a2SPaul Mundt * Hitachi SolutionEngine Support. 8da2014a2SPaul Mundt * 9da2014a2SPaul Mundt */ 10da2014a2SPaul Mundt 11da2014a2SPaul Mundt #include <linux/init.h> 12da2014a2SPaul Mundt #include <linux/interrupt.h> 13da2014a2SPaul Mundt #include <linux/irq.h> 14da2014a2SPaul Mundt #include <asm/irq.h> 15da2014a2SPaul Mundt #include <asm/io.h> 16939a24a6SPaul Mundt #include <mach-se/mach/se.h> 17da2014a2SPaul Mundt 18da2014a2SPaul Mundt static struct ipr_data ipr_irq_table[] = { 19da2014a2SPaul Mundt /* 20da2014a2SPaul Mundt * Super I/O (Just mimic PC): 21da2014a2SPaul Mundt * 1: keyboard 22da2014a2SPaul Mundt * 3: serial 0 23da2014a2SPaul Mundt * 4: serial 1 24da2014a2SPaul Mundt * 5: printer 25da2014a2SPaul Mundt * 6: floppy 26da2014a2SPaul Mundt * 8: rtc 27da2014a2SPaul Mundt * 12: mouse 28da2014a2SPaul Mundt * 14: ide0 29da2014a2SPaul Mundt */ 30da2014a2SPaul Mundt #if defined(CONFIG_CPU_SUBTYPE_SH7705) 31da2014a2SPaul Mundt /* This is default value */ 32da2014a2SPaul Mundt { 13, 0, 8, 0x0f-13, }, 33da2014a2SPaul Mundt { 5 , 0, 4, 0x0f- 5, }, 34da2014a2SPaul Mundt { 10, 1, 0, 0x0f-10, }, 35da2014a2SPaul Mundt { 7 , 2, 4, 0x0f- 7, }, 36da2014a2SPaul Mundt { 3 , 2, 0, 0x0f- 3, }, 37da2014a2SPaul Mundt { 1 , 3, 12, 0x0f- 1, }, 38da2014a2SPaul Mundt { 12, 3, 4, 0x0f-12, }, /* LAN */ 39da2014a2SPaul Mundt { 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */ 40da2014a2SPaul Mundt { 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */ 41da2014a2SPaul Mundt { 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */ 42da2014a2SPaul Mundt { 0 , 5, 12, 0x0f , }, 43da2014a2SPaul Mundt { 4 , 5, 4, 0x0f- 4, }, 44da2014a2SPaul Mundt { 8 , 6, 12, 0x0f- 8, }, 45da2014a2SPaul Mundt { 9 , 6, 8, 0x0f- 9, }, 46da2014a2SPaul Mundt { 11, 6, 4, 0x0f-11, }, 47da2014a2SPaul Mundt #else 48da2014a2SPaul Mundt { 14, 0, 8, 0x0f-14, }, 49da2014a2SPaul Mundt { 12, 0, 4, 0x0f-12, }, 50da2014a2SPaul Mundt { 8, 1, 4, 0x0f- 8, }, 51da2014a2SPaul Mundt { 6, 2, 12, 0x0f- 6, }, 52da2014a2SPaul Mundt { 5, 2, 8, 0x0f- 5, }, 53da2014a2SPaul Mundt { 4, 2, 4, 0x0f- 4, }, 54da2014a2SPaul Mundt { 3, 2, 0, 0x0f- 3, }, 55da2014a2SPaul Mundt { 1, 3, 12, 0x0f- 1, }, 56da2014a2SPaul Mundt #if defined(CONFIG_STNIC) 57da2014a2SPaul Mundt /* ST NIC */ 58da2014a2SPaul Mundt { 10, 3, 4, 0x0f-10, }, /* LAN */ 59da2014a2SPaul Mundt #endif 60da2014a2SPaul Mundt /* MRSHPC IRQs setting */ 61da2014a2SPaul Mundt { 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */ 62da2014a2SPaul Mundt { 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */ 63da2014a2SPaul Mundt { 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */ 64da2014a2SPaul Mundt { 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */ 65da2014a2SPaul Mundt /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */ 66da2014a2SPaul Mundt /* NOTE: #2 and #13 are not used on PC */ 67da2014a2SPaul Mundt { 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */ 68da2014a2SPaul Mundt { 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */ 69da2014a2SPaul Mundt #endif 70da2014a2SPaul Mundt }; 71da2014a2SPaul Mundt 72da2014a2SPaul Mundt static unsigned long ipr_offsets[] = { 73da2014a2SPaul Mundt BCR_ILCRA, 74da2014a2SPaul Mundt BCR_ILCRB, 75da2014a2SPaul Mundt BCR_ILCRC, 76da2014a2SPaul Mundt BCR_ILCRD, 77da2014a2SPaul Mundt BCR_ILCRE, 78da2014a2SPaul Mundt BCR_ILCRF, 79da2014a2SPaul Mundt BCR_ILCRG, 80da2014a2SPaul Mundt }; 81da2014a2SPaul Mundt 82da2014a2SPaul Mundt static struct ipr_desc ipr_irq_desc = { 83da2014a2SPaul Mundt .ipr_offsets = ipr_offsets, 84da2014a2SPaul Mundt .nr_offsets = ARRAY_SIZE(ipr_offsets), 85da2014a2SPaul Mundt 86da2014a2SPaul Mundt .ipr_data = ipr_irq_table, 87da2014a2SPaul Mundt .nr_irqs = ARRAY_SIZE(ipr_irq_table), 88da2014a2SPaul Mundt .chip = { 89da2014a2SPaul Mundt .name = "IPR-se770x", 90da2014a2SPaul Mundt }, 91da2014a2SPaul Mundt }; 92da2014a2SPaul Mundt 93da2014a2SPaul Mundt /* 94da2014a2SPaul Mundt * Initialize IRQ setting 95da2014a2SPaul Mundt */ 96da2014a2SPaul Mundt void __init init_se_IRQ(void) 97da2014a2SPaul Mundt { 98da2014a2SPaul Mundt /* Disable all interrupts */ 999d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRA); 1009d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRB); 1019d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRC); 1029d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRD); 1039d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRE); 1049d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRF); 1059d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRG); 106da2014a2SPaul Mundt 107da2014a2SPaul Mundt register_ipr_controller(&ipr_irq_desc); 108da2014a2SPaul Mundt } 109