1 #include <linux/init.h> 2 #include <linux/platform_device.h> 3 #include <linux/mtd/physmap.h> 4 #include <asm/machvec.h> 5 #include <mach-se/mach/se7343.h> 6 #include <asm/heartbeat.h> 7 #include <asm/irq.h> 8 #include <asm/io.h> 9 10 static struct resource smc91x_resources[] = { 11 [0] = { 12 .start = 0x10000000, 13 .end = 0x1000000F, 14 .flags = IORESOURCE_MEM, 15 }, 16 [1] = { 17 /* 18 * shared with other devices via externel 19 * interrupt controller in FPGA... 20 */ 21 .start = SMC_IRQ, 22 .end = SMC_IRQ, 23 .flags = IORESOURCE_IRQ, 24 }, 25 }; 26 27 static struct platform_device smc91x_device = { 28 .name = "smc91x", 29 .id = 0, 30 .num_resources = ARRAY_SIZE(smc91x_resources), 31 .resource = smc91x_resources, 32 }; 33 34 static struct resource heartbeat_resources[] = { 35 [0] = { 36 .start = PA_LED, 37 .end = PA_LED, 38 .flags = IORESOURCE_MEM, 39 }, 40 }; 41 42 static struct heartbeat_data heartbeat_data = { 43 .regsize = 16, 44 }; 45 46 static struct platform_device heartbeat_device = { 47 .name = "heartbeat", 48 .id = -1, 49 .dev = { 50 .platform_data = &heartbeat_data, 51 }, 52 .num_resources = ARRAY_SIZE(heartbeat_resources), 53 .resource = heartbeat_resources, 54 }; 55 56 static struct mtd_partition nor_flash_partitions[] = { 57 { 58 .name = "loader", 59 .offset = 0x00000000, 60 .size = 128 * 1024, 61 }, 62 { 63 .name = "rootfs", 64 .offset = MTDPART_OFS_APPEND, 65 .size = 31 * 1024 * 1024, 66 }, 67 { 68 .name = "data", 69 .offset = MTDPART_OFS_APPEND, 70 .size = MTDPART_SIZ_FULL, 71 }, 72 }; 73 74 static struct physmap_flash_data nor_flash_data = { 75 .width = 2, 76 .parts = nor_flash_partitions, 77 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 78 }; 79 80 static struct resource nor_flash_resources[] = { 81 [0] = { 82 .start = 0x00000000, 83 .end = 0x01ffffff, 84 .flags = IORESOURCE_MEM, 85 } 86 }; 87 88 static struct platform_device nor_flash_device = { 89 .name = "physmap-flash", 90 .dev = { 91 .platform_data = &nor_flash_data, 92 }, 93 .num_resources = ARRAY_SIZE(nor_flash_resources), 94 .resource = nor_flash_resources, 95 }; 96 97 static struct platform_device *sh7343se_platform_devices[] __initdata = { 98 &smc91x_device, 99 &heartbeat_device, 100 &nor_flash_device, 101 }; 102 103 static int __init sh7343se_devices_setup(void) 104 { 105 return platform_add_devices(sh7343se_platform_devices, 106 ARRAY_SIZE(sh7343se_platform_devices)); 107 } 108 device_initcall(sh7343se_devices_setup); 109 110 /* 111 * Initialize the board 112 */ 113 static void __init sh7343se_setup(char **cmdline_p) 114 { 115 ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ 116 117 ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ 118 ctrl_outw(0x0020, PORT_PSELD); 119 120 printk(KERN_INFO "MS7343CP01 Setup...done\n"); 121 } 122 123 /* 124 * The Machine Vector 125 */ 126 static struct sh_machine_vector mv_7343se __initmv = { 127 .mv_name = "SolutionEngine 7343", 128 .mv_setup = sh7343se_setup, 129 .mv_nr_irqs = 108, 130 .mv_inb = sh7343se_inb, 131 .mv_inw = sh7343se_inw, 132 .mv_inl = sh7343se_inl, 133 .mv_outb = sh7343se_outb, 134 .mv_outw = sh7343se_outw, 135 .mv_outl = sh7343se_outl, 136 137 .mv_inb_p = sh7343se_inb_p, 138 .mv_inw_p = sh7343se_inw, 139 .mv_inl_p = sh7343se_inl, 140 .mv_outb_p = sh7343se_outb_p, 141 .mv_outw_p = sh7343se_outw, 142 .mv_outl_p = sh7343se_outl, 143 144 .mv_insb = sh7343se_insb, 145 .mv_insw = sh7343se_insw, 146 .mv_insl = sh7343se_insl, 147 .mv_outsb = sh7343se_outsb, 148 .mv_outsw = sh7343se_outsw, 149 .mv_outsl = sh7343se_outsl, 150 151 .mv_init_irq = init_7343se_IRQ, 152 }; 153