1 /* 2 * Renesas Technology Europe SDK7786 Support. 3 * 4 * Copyright (C) 2010 Matt Fleming 5 * Copyright (C) 2010 Paul Mundt 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11 #include <linux/init.h> 12 #include <linux/platform_device.h> 13 #include <linux/io.h> 14 #include <linux/smsc911x.h> 15 #include <linux/i2c.h> 16 #include <linux/irq.h> 17 #include <linux/clk.h> 18 #include <linux/clkdev.h> 19 #include <mach/fpga.h> 20 #include <mach/irq.h> 21 #include <asm/machvec.h> 22 #include <asm/heartbeat.h> 23 #include <asm/sizes.h> 24 #include <asm/clock.h> 25 #include <asm/reboot.h> 26 #include <asm/smp-ops.h> 27 28 static struct resource heartbeat_resource = { 29 .start = 0x07fff8b0, 30 .end = 0x07fff8b0 + sizeof(u16) - 1, 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT, 32 }; 33 34 static struct platform_device heartbeat_device = { 35 .name = "heartbeat", 36 .id = -1, 37 .num_resources = 1, 38 .resource = &heartbeat_resource, 39 }; 40 41 static struct resource smsc911x_resources[] = { 42 [0] = { 43 .name = "smsc911x-memory", 44 .start = 0x07ffff00, 45 .end = 0x07ffff00 + SZ_256 - 1, 46 .flags = IORESOURCE_MEM, 47 }, 48 [1] = { 49 .name = "smsc911x-irq", 50 .start = evt2irq(0x2c0), 51 .end = evt2irq(0x2c0), 52 .flags = IORESOURCE_IRQ, 53 }, 54 }; 55 56 static struct smsc911x_platform_config smsc911x_config = { 57 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 58 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 59 .flags = SMSC911X_USE_32BIT, 60 .phy_interface = PHY_INTERFACE_MODE_MII, 61 }; 62 63 static struct platform_device smsc911x_device = { 64 .name = "smsc911x", 65 .id = -1, 66 .num_resources = ARRAY_SIZE(smsc911x_resources), 67 .resource = smsc911x_resources, 68 .dev = { 69 .platform_data = &smsc911x_config, 70 }, 71 }; 72 73 static struct resource smbus_fpga_resource = { 74 .start = 0x07fff9e0, 75 .end = 0x07fff9e0 + SZ_32 - 1, 76 .flags = IORESOURCE_MEM, 77 }; 78 79 static struct platform_device smbus_fpga_device = { 80 .name = "i2c-sdk7786", 81 .id = 0, 82 .num_resources = 1, 83 .resource = &smbus_fpga_resource, 84 }; 85 86 static struct resource smbus_pcie_resource = { 87 .start = 0x07fffc30, 88 .end = 0x07fffc30 + SZ_32 - 1, 89 .flags = IORESOURCE_MEM, 90 }; 91 92 static struct platform_device smbus_pcie_device = { 93 .name = "i2c-sdk7786", 94 .id = 1, 95 .num_resources = 1, 96 .resource = &smbus_pcie_resource, 97 }; 98 99 static struct i2c_board_info __initdata sdk7786_i2c_devices[] = { 100 { 101 I2C_BOARD_INFO("max6900", 0x68), 102 }, 103 }; 104 105 static struct platform_device *sh7786_devices[] __initdata = { 106 &heartbeat_device, 107 &smsc911x_device, 108 &smbus_fpga_device, 109 &smbus_pcie_device, 110 }; 111 112 static int sdk7786_i2c_setup(void) 113 { 114 unsigned int tmp; 115 116 /* 117 * Hand over I2C control to the FPGA. 118 */ 119 tmp = fpga_read_reg(SBCR); 120 tmp &= ~SCBR_I2CCEN; 121 tmp |= SCBR_I2CMEN; 122 fpga_write_reg(tmp, SBCR); 123 124 return i2c_register_board_info(0, sdk7786_i2c_devices, 125 ARRAY_SIZE(sdk7786_i2c_devices)); 126 } 127 128 static int __init sdk7786_devices_setup(void) 129 { 130 int ret; 131 132 ret = platform_add_devices(sh7786_devices, ARRAY_SIZE(sh7786_devices)); 133 if (unlikely(ret != 0)) 134 return ret; 135 136 return sdk7786_i2c_setup(); 137 } 138 device_initcall(sdk7786_devices_setup); 139 140 static int sdk7786_mode_pins(void) 141 { 142 return fpga_read_reg(MODSWR); 143 } 144 145 /* 146 * FPGA-driven PCIe clocks 147 * 148 * Historically these include the oscillator, clock B (slots 2/3/4) and 149 * clock A (slot 1 and the CPU clock). Newer revs of the PCB shove 150 * everything under a single PCIe clocks enable bit that happens to map 151 * to the same bit position as the oscillator bit for earlier FPGA 152 * versions. 153 * 154 * Given that the legacy clocks have the side-effect of shutting the CPU 155 * off through the FPGA along with the PCI slots, we simply leave them in 156 * their initial state and don't bother registering them with the clock 157 * framework. 158 */ 159 static int sdk7786_pcie_clk_enable(struct clk *clk) 160 { 161 fpga_write_reg(fpga_read_reg(PCIECR) | PCIECR_CLKEN, PCIECR); 162 return 0; 163 } 164 165 static void sdk7786_pcie_clk_disable(struct clk *clk) 166 { 167 fpga_write_reg(fpga_read_reg(PCIECR) & ~PCIECR_CLKEN, PCIECR); 168 } 169 170 static struct sh_clk_ops sdk7786_pcie_clk_ops = { 171 .enable = sdk7786_pcie_clk_enable, 172 .disable = sdk7786_pcie_clk_disable, 173 }; 174 175 static struct clk sdk7786_pcie_clk = { 176 .ops = &sdk7786_pcie_clk_ops, 177 }; 178 179 static struct clk_lookup sdk7786_pcie_cl = { 180 .con_id = "pcie_plat_clk", 181 .clk = &sdk7786_pcie_clk, 182 }; 183 184 static int sdk7786_clk_init(void) 185 { 186 struct clk *clk; 187 int ret; 188 189 /* 190 * Only handle the EXTAL case, anyone interfacing a crystal 191 * resonator will need to provide their own input clock. 192 */ 193 if (test_mode_pin(MODE_PIN9)) 194 return -EINVAL; 195 196 clk = clk_get(NULL, "extal"); 197 if (IS_ERR(clk)) 198 return PTR_ERR(clk); 199 ret = clk_set_rate(clk, 33333333); 200 clk_put(clk); 201 202 /* 203 * Setup the FPGA clocks. 204 */ 205 ret = clk_register(&sdk7786_pcie_clk); 206 if (unlikely(ret)) { 207 pr_err("FPGA clock registration failed\n"); 208 return ret; 209 } 210 211 clkdev_add(&sdk7786_pcie_cl); 212 213 return 0; 214 } 215 216 static void sdk7786_restart(char *cmd) 217 { 218 fpga_write_reg(0xa5a5, SRSTR); 219 } 220 221 static void sdk7786_power_off(void) 222 { 223 fpga_write_reg(fpga_read_reg(PWRCR) | PWRCR_PDWNREQ, PWRCR); 224 225 /* 226 * It can take up to 20us for the R8C to do its job, back off and 227 * wait a bit until we've been shut off. Even though newer FPGA 228 * versions don't set the ACK bit, the latency issue remains. 229 */ 230 while ((fpga_read_reg(PWRCR) & PWRCR_PDWNACK) == 0) 231 cpu_sleep(); 232 } 233 234 /* Initialize the board */ 235 static void __init sdk7786_setup(char **cmdline_p) 236 { 237 pr_info("Renesas Technology Europe SDK7786 support:\n"); 238 239 sdk7786_fpga_init(); 240 sdk7786_nmi_init(); 241 242 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf); 243 244 machine_ops.restart = sdk7786_restart; 245 pm_power_off = sdk7786_power_off; 246 247 register_smp_ops(&shx3_smp_ops); 248 } 249 250 /* 251 * The Machine Vector 252 */ 253 static struct sh_machine_vector mv_sdk7786 __initmv = { 254 .mv_name = "SDK7786", 255 .mv_setup = sdk7786_setup, 256 .mv_mode_pins = sdk7786_mode_pins, 257 .mv_clk_init = sdk7786_clk_init, 258 .mv_init_irq = sdk7786_init_irq, 259 }; 260