1 /* 2 * Renesas System Solutions Asia Pte. Ltd - Migo-R 3 * 4 * Copyright (C) 2008 Magnus Damm 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 #include <linux/init.h> 11 #include <linux/platform_device.h> 12 #include <linux/interrupt.h> 13 #include <linux/input.h> 14 #include <linux/mtd/physmap.h> 15 #include <linux/mtd/nand.h> 16 #include <linux/i2c.h> 17 #include <linux/smc91x.h> 18 #include <linux/delay.h> 19 #include <linux/clk.h> 20 #include <linux/gpio.h> 21 #include <media/soc_camera_platform.h> 22 #include <media/sh_mobile_ceu.h> 23 #include <video/sh_mobile_lcdc.h> 24 #include <asm/clock.h> 25 #include <asm/machvec.h> 26 #include <asm/io.h> 27 #include <asm/sh_keysc.h> 28 #include <mach/migor.h> 29 #include <cpu/sh7722.h> 30 31 /* Address IRQ Size Bus Description 32 * 0x00000000 64MB 16 NOR Flash (SP29PL256N) 33 * 0x0c000000 64MB 64 SDRAM (2xK4M563233G) 34 * 0x10000000 IRQ0 16 Ethernet (SMC91C111) 35 * 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596) 36 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A) 37 */ 38 39 static struct smc91x_platdata smc91x_info = { 40 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 41 }; 42 43 static struct resource smc91x_eth_resources[] = { 44 [0] = { 45 .name = "SMC91C111" , 46 .start = 0x10000300, 47 .end = 0x1000030f, 48 .flags = IORESOURCE_MEM, 49 }, 50 [1] = { 51 .start = 32, /* IRQ0 */ 52 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 53 }, 54 }; 55 56 static struct platform_device smc91x_eth_device = { 57 .name = "smc91x", 58 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 59 .resource = smc91x_eth_resources, 60 .dev = { 61 .platform_data = &smc91x_info, 62 }, 63 }; 64 65 static struct sh_keysc_info sh_keysc_info = { 66 .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */ 67 .scan_timing = 3, 68 .delay = 5, 69 .keycodes = { 70 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER, 71 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1, 72 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, 73 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0, 74 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD, 75 }, 76 }; 77 78 static struct resource sh_keysc_resources[] = { 79 [0] = { 80 .start = 0x044b0000, 81 .end = 0x044b000f, 82 .flags = IORESOURCE_MEM, 83 }, 84 [1] = { 85 .start = 79, 86 .flags = IORESOURCE_IRQ, 87 }, 88 }; 89 90 static struct platform_device sh_keysc_device = { 91 .name = "sh_keysc", 92 .num_resources = ARRAY_SIZE(sh_keysc_resources), 93 .resource = sh_keysc_resources, 94 .dev = { 95 .platform_data = &sh_keysc_info, 96 }, 97 }; 98 99 static struct mtd_partition migor_nor_flash_partitions[] = 100 { 101 { 102 .name = "uboot", 103 .offset = 0, 104 .size = (1 * 1024 * 1024), 105 .mask_flags = MTD_WRITEABLE, /* Read-only */ 106 }, 107 { 108 .name = "rootfs", 109 .offset = MTDPART_OFS_APPEND, 110 .size = (15 * 1024 * 1024), 111 }, 112 { 113 .name = "other", 114 .offset = MTDPART_OFS_APPEND, 115 .size = MTDPART_SIZ_FULL, 116 }, 117 }; 118 119 static struct physmap_flash_data migor_nor_flash_data = { 120 .width = 2, 121 .parts = migor_nor_flash_partitions, 122 .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions), 123 }; 124 125 static struct resource migor_nor_flash_resources[] = { 126 [0] = { 127 .name = "NOR Flash", 128 .start = 0x00000000, 129 .end = 0x03ffffff, 130 .flags = IORESOURCE_MEM, 131 } 132 }; 133 134 static struct platform_device migor_nor_flash_device = { 135 .name = "physmap-flash", 136 .resource = migor_nor_flash_resources, 137 .num_resources = ARRAY_SIZE(migor_nor_flash_resources), 138 .dev = { 139 .platform_data = &migor_nor_flash_data, 140 }, 141 }; 142 143 static struct mtd_partition migor_nand_flash_partitions[] = { 144 { 145 .name = "nanddata1", 146 .offset = 0x0, 147 .size = 512 * 1024 * 1024, 148 }, 149 { 150 .name = "nanddata2", 151 .offset = MTDPART_OFS_APPEND, 152 .size = 512 * 1024 * 1024, 153 }, 154 }; 155 156 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd, 157 unsigned int ctrl) 158 { 159 struct nand_chip *chip = mtd->priv; 160 161 if (cmd == NAND_CMD_NONE) 162 return; 163 164 if (ctrl & NAND_CLE) 165 writeb(cmd, chip->IO_ADDR_W + 0x00400000); 166 else if (ctrl & NAND_ALE) 167 writeb(cmd, chip->IO_ADDR_W + 0x00800000); 168 else 169 writeb(cmd, chip->IO_ADDR_W); 170 } 171 172 static int migor_nand_flash_ready(struct mtd_info *mtd) 173 { 174 return gpio_get_value(GPIO_PTA1); /* NAND_RBn */ 175 } 176 177 struct platform_nand_data migor_nand_flash_data = { 178 .chip = { 179 .nr_chips = 1, 180 .partitions = migor_nand_flash_partitions, 181 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions), 182 .chip_delay = 20, 183 .part_probe_types = (const char *[]) { "cmdlinepart", NULL }, 184 }, 185 .ctrl = { 186 .dev_ready = migor_nand_flash_ready, 187 .cmd_ctrl = migor_nand_flash_cmd_ctl, 188 }, 189 }; 190 191 static struct resource migor_nand_flash_resources[] = { 192 [0] = { 193 .name = "NAND Flash", 194 .start = 0x18000000, 195 .end = 0x18ffffff, 196 .flags = IORESOURCE_MEM, 197 }, 198 }; 199 200 static struct platform_device migor_nand_flash_device = { 201 .name = "gen_nand", 202 .resource = migor_nand_flash_resources, 203 .num_resources = ARRAY_SIZE(migor_nand_flash_resources), 204 .dev = { 205 .platform_data = &migor_nand_flash_data, 206 } 207 }; 208 209 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = { 210 #ifdef CONFIG_SH_MIGOR_RTA_WVGA 211 .clock_source = LCDC_CLK_BUS, 212 .ch[0] = { 213 .chan = LCDC_CHAN_MAINLCD, 214 .bpp = 16, 215 .interface_type = RGB16, 216 .clock_divider = 2, 217 .lcd_cfg = { 218 .name = "LB070WV1", 219 .xres = 800, 220 .yres = 480, 221 .left_margin = 64, 222 .right_margin = 16, 223 .hsync_len = 120, 224 .upper_margin = 1, 225 .lower_margin = 17, 226 .vsync_len = 2, 227 .sync = 0, 228 }, 229 .lcd_size_cfg = { /* 7.0 inch */ 230 .width = 152, 231 .height = 91, 232 }, 233 } 234 #endif 235 #ifdef CONFIG_SH_MIGOR_QVGA 236 .clock_source = LCDC_CLK_PERIPHERAL, 237 .ch[0] = { 238 .chan = LCDC_CHAN_MAINLCD, 239 .bpp = 16, 240 .interface_type = SYS16A, 241 .clock_divider = 10, 242 .lcd_cfg = { 243 .name = "PH240320T", 244 .xres = 320, 245 .yres = 240, 246 .left_margin = 0, 247 .right_margin = 16, 248 .hsync_len = 8, 249 .upper_margin = 1, 250 .lower_margin = 17, 251 .vsync_len = 2, 252 .sync = FB_SYNC_HOR_HIGH_ACT, 253 }, 254 .lcd_size_cfg = { /* 2.4 inch */ 255 .width = 49, 256 .height = 37, 257 }, 258 .board_cfg = { 259 .setup_sys = migor_lcd_qvga_setup, 260 }, 261 .sys_bus_cfg = { 262 .ldmt2r = 0x06000a09, 263 .ldmt3r = 0x180e3418, 264 }, 265 } 266 #endif 267 }; 268 269 static struct resource migor_lcdc_resources[] = { 270 [0] = { 271 .name = "LCDC", 272 .start = 0xfe940000, /* P4-only space */ 273 .end = 0xfe941fff, 274 .flags = IORESOURCE_MEM, 275 }, 276 }; 277 278 static struct platform_device migor_lcdc_device = { 279 .name = "sh_mobile_lcdc_fb", 280 .num_resources = ARRAY_SIZE(migor_lcdc_resources), 281 .resource = migor_lcdc_resources, 282 .dev = { 283 .platform_data = &sh_mobile_lcdc_info, 284 }, 285 }; 286 287 static struct clk *camera_clk; 288 289 static void camera_power_on(void) 290 { 291 camera_clk = clk_get(NULL, "video_clk"); 292 clk_set_rate(camera_clk, 24000000); 293 clk_enable(camera_clk); /* start VIO_CKO */ 294 295 /* use VIO_RST to take camera out of reset */ 296 mdelay(10); 297 gpio_set_value(GPIO_PTT3, 0); 298 mdelay(10); 299 gpio_set_value(GPIO_PTT3, 1); 300 } 301 302 static void camera_power_off(void) 303 { 304 clk_disable(camera_clk); /* stop VIO_CKO */ 305 clk_put(camera_clk); 306 307 gpio_set_value(GPIO_PTT3, 0); 308 } 309 310 #ifdef CONFIG_I2C 311 static unsigned char camera_ov772x_magic[] = 312 { 313 0x09, 0x01, 0x0c, 0x10, 0x0d, 0x41, 0x0e, 0x01, 314 0x12, 0x00, 0x13, 0x8F, 0x14, 0x4A, 0x15, 0x00, 315 0x16, 0x00, 0x17, 0x23, 0x18, 0xa0, 0x19, 0x07, 316 0x1a, 0xf0, 0x1b, 0x40, 0x1f, 0x00, 0x20, 0x10, 317 0x22, 0xff, 0x23, 0x01, 0x28, 0x00, 0x29, 0xa0, 318 0x2a, 0x00, 0x2b, 0x00, 0x2c, 0xf0, 0x2d, 0x00, 319 0x2e, 0x00, 0x30, 0x80, 0x31, 0x60, 0x32, 0x00, 320 0x33, 0x00, 0x34, 0x00, 0x3d, 0x80, 0x3e, 0xe2, 321 0x3f, 0x1f, 0x42, 0x80, 0x43, 0x80, 0x44, 0x80, 322 0x45, 0x80, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00, 323 0x49, 0x50, 0x4a, 0x30, 0x4b, 0x50, 0x4c, 0x50, 324 0x4d, 0x00, 0x4e, 0xef, 0x4f, 0x10, 0x50, 0x60, 325 0x51, 0x00, 0x52, 0x00, 0x53, 0x24, 0x54, 0x7a, 326 0x55, 0xfc, 0x62, 0xff, 0x63, 0xf0, 0x64, 0x1f, 327 0x65, 0x00, 0x66, 0x10, 0x67, 0x00, 0x68, 0x00, 328 0x69, 0x5c, 0x6a, 0x11, 0x6b, 0xa2, 0x6c, 0x01, 329 0x6d, 0x50, 0x6e, 0x80, 0x6f, 0x80, 0x70, 0x0f, 330 0x71, 0x00, 0x72, 0x00, 0x73, 0x0f, 0x74, 0x0f, 331 0x75, 0xff, 0x78, 0x10, 0x79, 0x70, 0x7a, 0x70, 332 0x7b, 0xf0, 0x7c, 0xf0, 0x7d, 0xf0, 0x7e, 0x0e, 333 0x7f, 0x1a, 0x80, 0x31, 0x81, 0x5a, 0x82, 0x69, 334 0x83, 0x75, 0x84, 0x7e, 0x85, 0x88, 0x86, 0x8f, 335 0x87, 0x96, 0x88, 0xa3, 0x89, 0xaf, 0x8a, 0xc4, 336 0x8b, 0xd7, 0x8c, 0xe8, 0x8d, 0x20, 0x8e, 0x00, 337 0x8f, 0x00, 0x90, 0x08, 0x91, 0x10, 0x92, 0x1f, 338 0x93, 0x01, 0x94, 0x2c, 0x95, 0x24, 0x96, 0x08, 339 0x97, 0x14, 0x98, 0x24, 0x99, 0x38, 0x9a, 0x9e, 340 0x9b, 0x00, 0x9c, 0x40, 0x9e, 0x11, 0x9f, 0x02, 341 0xa0, 0x00, 0xa1, 0x40, 0xa2, 0x40, 0xa3, 0x06, 342 0xa4, 0x00, 0xa6, 0x00, 0xa7, 0x40, 0xa8, 0x40, 343 0xa9, 0x80, 0xaa, 0x80, 0xab, 0x06, 0xac, 0xff, 344 0x12, 0x06, 0x64, 0x3f, 0x12, 0x46, 0x17, 0x3f, 345 0x18, 0x50, 0x19, 0x03, 0x1a, 0x78, 0x29, 0x50, 346 0x2c, 0x78, 347 }; 348 349 static int ov772x_set_capture(struct soc_camera_platform_info *info, 350 int enable) 351 { 352 struct i2c_adapter *a = i2c_get_adapter(0); 353 struct i2c_msg msg; 354 int ret = 0; 355 int i; 356 357 if (!enable) 358 return 0; /* camera_power_off() is enough */ 359 360 for (i = 0; i < ARRAY_SIZE(camera_ov772x_magic); i += 2) { 361 u_int8_t buf[8]; 362 363 msg.addr = 0x21; 364 msg.buf = buf; 365 msg.len = 2; 366 msg.flags = 0; 367 368 buf[0] = camera_ov772x_magic[i]; 369 buf[1] = camera_ov772x_magic[i + 1]; 370 371 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); 372 } 373 374 return ret; 375 } 376 377 static struct soc_camera_platform_info ov772x_info = { 378 .iface = 0, 379 .format_name = "RGB565", 380 .format_depth = 16, 381 .format = { 382 .pixelformat = V4L2_PIX_FMT_RGB565, 383 .colorspace = V4L2_COLORSPACE_SRGB, 384 .width = 320, 385 .height = 240, 386 }, 387 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | 388 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, 389 .set_capture = ov772x_set_capture, 390 }; 391 392 static struct platform_device migor_camera_device = { 393 .name = "soc_camera_platform", 394 .dev = { 395 .platform_data = &ov772x_info, 396 }, 397 }; 398 #endif /* CONFIG_I2C */ 399 400 static struct sh_mobile_ceu_info sh_mobile_ceu_info = { 401 .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \ 402 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH, 403 .enable_camera = camera_power_on, 404 .disable_camera = camera_power_off, 405 }; 406 407 static struct resource migor_ceu_resources[] = { 408 [0] = { 409 .name = "CEU", 410 .start = 0xfe910000, 411 .end = 0xfe91009f, 412 .flags = IORESOURCE_MEM, 413 }, 414 [1] = { 415 .start = 52, 416 .flags = IORESOURCE_IRQ, 417 }, 418 [2] = { 419 /* place holder for contiguous memory */ 420 }, 421 }; 422 423 static struct platform_device migor_ceu_device = { 424 .name = "sh_mobile_ceu", 425 .num_resources = ARRAY_SIZE(migor_ceu_resources), 426 .resource = migor_ceu_resources, 427 .dev = { 428 .platform_data = &sh_mobile_ceu_info, 429 }, 430 }; 431 432 static struct platform_device *migor_devices[] __initdata = { 433 &smc91x_eth_device, 434 &sh_keysc_device, 435 &migor_lcdc_device, 436 &migor_ceu_device, 437 #ifdef CONFIG_I2C 438 &migor_camera_device, 439 #endif 440 &migor_nor_flash_device, 441 &migor_nand_flash_device, 442 }; 443 444 static struct i2c_board_info migor_i2c_devices[] = { 445 { 446 I2C_BOARD_INFO("rs5c372b", 0x32), 447 }, 448 { 449 I2C_BOARD_INFO("migor_ts", 0x51), 450 .irq = 38, /* IRQ6 */ 451 }, 452 }; 453 454 static int __init migor_devices_setup(void) 455 { 456 /* Lit D11 LED */ 457 gpio_request(GPIO_PTJ7, NULL); 458 gpio_direction_output(GPIO_PTJ7, 1); 459 gpio_export(GPIO_PTJ7, 0); 460 461 /* Lit D12 LED */ 462 gpio_request(GPIO_PTJ5, NULL); 463 gpio_direction_output(GPIO_PTJ5, 1); 464 gpio_export(GPIO_PTJ5, 0); 465 466 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */ 467 gpio_request(GPIO_FN_IRQ0, NULL); 468 ctrl_outl(0x00003400, BSC_CS4BCR); 469 ctrl_outl(0x00110080, BSC_CS4WCR); 470 471 /* KEYSC */ 472 clk_always_enable("mstp214"); /* KEYSC */ 473 gpio_request(GPIO_FN_KEYOUT0, NULL); 474 gpio_request(GPIO_FN_KEYOUT1, NULL); 475 gpio_request(GPIO_FN_KEYOUT2, NULL); 476 gpio_request(GPIO_FN_KEYOUT3, NULL); 477 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 478 gpio_request(GPIO_FN_KEYIN1, NULL); 479 gpio_request(GPIO_FN_KEYIN2, NULL); 480 gpio_request(GPIO_FN_KEYIN3, NULL); 481 gpio_request(GPIO_FN_KEYIN4, NULL); 482 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 483 484 /* NAND Flash */ 485 gpio_request(GPIO_FN_CS6A_CE2B, NULL); 486 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR); 487 gpio_request(GPIO_PTA1, NULL); 488 gpio_direction_input(GPIO_PTA1); 489 490 /* Touch Panel */ 491 gpio_request(GPIO_FN_IRQ6, NULL); 492 493 /* LCD Panel */ 494 clk_always_enable("mstp200"); /* LCDC */ 495 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */ 496 gpio_request(GPIO_FN_LCDD17, NULL); 497 gpio_request(GPIO_FN_LCDD16, NULL); 498 gpio_request(GPIO_FN_LCDD15, NULL); 499 gpio_request(GPIO_FN_LCDD14, NULL); 500 gpio_request(GPIO_FN_LCDD13, NULL); 501 gpio_request(GPIO_FN_LCDD12, NULL); 502 gpio_request(GPIO_FN_LCDD11, NULL); 503 gpio_request(GPIO_FN_LCDD10, NULL); 504 gpio_request(GPIO_FN_LCDD8, NULL); 505 gpio_request(GPIO_FN_LCDD7, NULL); 506 gpio_request(GPIO_FN_LCDD6, NULL); 507 gpio_request(GPIO_FN_LCDD5, NULL); 508 gpio_request(GPIO_FN_LCDD4, NULL); 509 gpio_request(GPIO_FN_LCDD3, NULL); 510 gpio_request(GPIO_FN_LCDD2, NULL); 511 gpio_request(GPIO_FN_LCDD1, NULL); 512 gpio_request(GPIO_FN_LCDRS, NULL); 513 gpio_request(GPIO_FN_LCDCS, NULL); 514 gpio_request(GPIO_FN_LCDRD, NULL); 515 gpio_request(GPIO_FN_LCDWR, NULL); 516 gpio_request(GPIO_PTH2, NULL); /* LCD_DON */ 517 gpio_direction_output(GPIO_PTH2, 1); 518 #endif 519 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */ 520 gpio_request(GPIO_FN_LCDD15, NULL); 521 gpio_request(GPIO_FN_LCDD14, NULL); 522 gpio_request(GPIO_FN_LCDD13, NULL); 523 gpio_request(GPIO_FN_LCDD12, NULL); 524 gpio_request(GPIO_FN_LCDD11, NULL); 525 gpio_request(GPIO_FN_LCDD10, NULL); 526 gpio_request(GPIO_FN_LCDD9, NULL); 527 gpio_request(GPIO_FN_LCDD8, NULL); 528 gpio_request(GPIO_FN_LCDD7, NULL); 529 gpio_request(GPIO_FN_LCDD6, NULL); 530 gpio_request(GPIO_FN_LCDD5, NULL); 531 gpio_request(GPIO_FN_LCDD4, NULL); 532 gpio_request(GPIO_FN_LCDD3, NULL); 533 gpio_request(GPIO_FN_LCDD2, NULL); 534 gpio_request(GPIO_FN_LCDD1, NULL); 535 gpio_request(GPIO_FN_LCDD0, NULL); 536 gpio_request(GPIO_FN_LCDLCLK, NULL); 537 gpio_request(GPIO_FN_LCDDCK, NULL); 538 gpio_request(GPIO_FN_LCDVEPWC, NULL); 539 gpio_request(GPIO_FN_LCDVCPWC, NULL); 540 gpio_request(GPIO_FN_LCDVSYN, NULL); 541 gpio_request(GPIO_FN_LCDHSYN, NULL); 542 gpio_request(GPIO_FN_LCDDISP, NULL); 543 gpio_request(GPIO_FN_LCDDON, NULL); 544 #endif 545 546 /* CEU */ 547 clk_always_enable("mstp203"); /* CEU */ 548 gpio_request(GPIO_FN_VIO_CLK2, NULL); 549 gpio_request(GPIO_FN_VIO_VD2, NULL); 550 gpio_request(GPIO_FN_VIO_HD2, NULL); 551 gpio_request(GPIO_FN_VIO_FLD, NULL); 552 gpio_request(GPIO_FN_VIO_CKO, NULL); 553 gpio_request(GPIO_FN_VIO_D15, NULL); 554 gpio_request(GPIO_FN_VIO_D14, NULL); 555 gpio_request(GPIO_FN_VIO_D13, NULL); 556 gpio_request(GPIO_FN_VIO_D12, NULL); 557 gpio_request(GPIO_FN_VIO_D11, NULL); 558 gpio_request(GPIO_FN_VIO_D10, NULL); 559 gpio_request(GPIO_FN_VIO_D9, NULL); 560 gpio_request(GPIO_FN_VIO_D8, NULL); 561 562 gpio_request(GPIO_PTT3, NULL); /* VIO_RST */ 563 gpio_direction_output(GPIO_PTT3, 0); 564 gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */ 565 gpio_direction_output(GPIO_PTT2, 1); 566 gpio_request(GPIO_PTT0, NULL); /* CAM_EN */ 567 #ifdef CONFIG_SH_MIGOR_RTA_WVGA 568 gpio_direction_output(GPIO_PTT0, 0); 569 #else 570 gpio_direction_output(GPIO_PTT0, 1); 571 #endif 572 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ 573 574 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); 575 576 i2c_register_board_info(0, migor_i2c_devices, 577 ARRAY_SIZE(migor_i2c_devices)); 578 579 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 580 } 581 __initcall(migor_devices_setup); 582 583 static void __init migor_setup(char **cmdline_p) 584 { 585 } 586 587 static struct sh_machine_vector mv_migor __initmv = { 588 .mv_name = "Migo-R", 589 .mv_setup = migor_setup, 590 }; 591