1 /* 2 * Support for SuperH MigoR Quarter VGA LCD Panel 3 * 4 * Copyright (C) 2008 Magnus Damm 5 * 6 * Based on lcd_powertip.c from Kenati Technologies Pvt Ltd. 7 * Copyright (c) 2007 Ujjwal Pande <ujjwal@kenati.com>, 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/delay.h> 15 #include <linux/err.h> 16 #include <linux/fb.h> 17 #include <linux/init.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <asm/sh_mobile_lcdc.h> 21 #include <asm/migor.h> 22 23 /* LCD Module is a PH240320T according to board schematics. This module 24 * is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?) 25 * Driver IC. This IC is connected to the SH7722 built-in LCDC using a 26 * SYS-80 interface configured in 16 bit mode. 27 * 28 * Index 0: "Device Code Read" returns 0x1505. 29 */ 30 31 static void reset_lcd_module(void) 32 { 33 ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR); 34 mdelay(2); 35 ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR); 36 mdelay(1); 37 } 38 39 /* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */ 40 41 static unsigned long adjust_reg18(unsigned short data) 42 { 43 unsigned long tmp1, tmp2; 44 45 tmp1 = (data<<1 | 0x00000001) & 0x000001FF; 46 tmp2 = (data<<2 | 0x00000200) & 0x0003FE00; 47 return tmp1 | tmp2; 48 } 49 50 static void write_reg(void *sys_ops_handle, 51 struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 52 unsigned short reg, unsigned short data) 53 { 54 sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data)); 55 } 56 57 static void write_reg16(void *sys_ops_handle, 58 struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 59 unsigned short reg, unsigned short data) 60 { 61 sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); 62 sys_ops->write_data(sys_ops_handle, adjust_reg18(data)); 63 } 64 65 static unsigned long read_reg16(void *sys_ops_handle, 66 struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 67 unsigned short reg) 68 { 69 unsigned long data; 70 71 sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); 72 data = sys_ops->read_data(sys_ops_handle); 73 return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00); 74 } 75 76 static void migor_lcd_qvga_seq(void *sys_ops_handle, 77 struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 78 unsigned short const *data, int no_data) 79 { 80 int i; 81 82 for (i = 0; i < no_data; i += 2) 83 write_reg16(sys_ops_handle, sys_ops, data[i], data[i + 1]); 84 } 85 86 static const unsigned short sync_data[] = { 87 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 88 }; 89 90 static const unsigned short magic0_data[] = { 91 0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001, 92 0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116, 93 0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8, 94 }; 95 96 static const unsigned short magic1_data[] = { 97 0x0030, 0x0307, 0x0031, 0x0303, 0x0032, 0x0603, 0x0033, 0x0202, 98 0x0034, 0x0202, 0x0035, 0x0202, 0x0036, 0x1F1F, 0x0037, 0x0303, 99 0x0038, 0x0303, 0x0039, 0x0603, 0x003A, 0x0202, 0x003B, 0x0102, 100 0x003C, 0x0204, 0x003D, 0x0000, 0x0001, 0x0100, 0x0002, 0x0300, 101 0x0003, 0x5028, 0x0020, 0x00ef, 0x0021, 0x0000, 0x0004, 0x0000, 102 0x0009, 0x0000, 0x000A, 0x0008, 0x000C, 0x0000, 0x000D, 0x0000, 103 0x0015, 0x8000, 104 }; 105 106 static const unsigned short magic2_data[] = { 107 0x0061, 0x0001, 0x0092, 0x0100, 0x0093, 0x0001, 0x0007, 0x0021, 108 }; 109 110 static const unsigned short magic3_data[] = { 111 0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061, 112 }; 113 114 int migor_lcd_qvga_setup(void *board_data, void *sohandle, 115 struct sh_mobile_lcdc_sys_bus_ops *so) 116 { 117 unsigned long xres = 320; 118 unsigned long yres = 240; 119 int k; 120 121 reset_lcd_module(); 122 migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); 123 124 if (read_reg16(sohandle, so, 0) != 0x1505) 125 return -ENODEV; 126 127 pr_info("Migo-R QVGA LCD Module detected.\n"); 128 129 migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); 130 write_reg16(sohandle, so, 0x00A4, 0x0001); 131 mdelay(10); 132 133 migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data)); 134 mdelay(100); 135 136 migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data)); 137 write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1)); 138 write_reg16(sohandle, so, 0x0051, 0x00ef); 139 write_reg16(sohandle, so, 0x0052, 0x0000); 140 write_reg16(sohandle, so, 0x0053, xres - 1); 141 142 migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data)); 143 mdelay(10); 144 145 migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data)); 146 mdelay(40); 147 148 /* clear GRAM to avoid displaying garbage */ 149 150 write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */ 151 write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */ 152 153 for (k = 0; k < (xres * 256); k++) /* yes, 256 words per line */ 154 write_reg16(sohandle, so, 0x0022, 0x0000); 155 156 write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */ 157 write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */ 158 write_reg16(sohandle, so, 0x0007, 0x0173); 159 mdelay(40); 160 161 /* enable display */ 162 write_reg(sohandle, so, 0x00, 0x22); 163 mdelay(100); 164 return 0; 165 } 166