1/*
2 * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License.  See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 */
9
10#include <linux/linkage.h>
11#include <cpu/mmu_context.h>
12
13#define k0	r0
14#define k1	r1
15#define k2	r2
16#define k3	r3
17#define k4	r4
18
19/*
20 * Kernel mode register usage:
21 *	k0	scratch
22 *	k1	scratch
23 *	k2	scratch (Exception code)
24 *	k3	scratch (Return address)
25 *	k4	scratch
26 *	k5	reserved
27 *	k6	Global Interrupt Mask (0--15 << 4)
28 *	k7	CURRENT_THREAD_INFO (pointer to current thread info)
29 */
30
31ENTRY(wakeup_start)
32! clear STBY bit
33	mov	#-126, k2
34   	and	#127, k0
35	mov.b	k0, @k2
36! enable refresh
37	mov.l	5f, k1
38	mov.w	6f, k0
39  	mov.w	k0, @k1
40! jump to handler
41	mov.l	2f, k2
42	mov.l	3f, k3
43	mov.l	@k2, k2
44
45	mov.l	4f, k1
46	jmp	@k1
47	nop
48
49	.align	2
501:	.long	EXPEVT
512:	.long	INTEVT
523:	.long	ret_from_irq
534:	.long	handle_exception
545:	.long	0xffffff68
556:	.word	0x0524
56
57ENTRY(wakeup_end)
58	nop
59