1 /* 2 * Copyright (C) 2009 Renesas Solutions Corp. 3 * 4 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11 #include <linux/init.h> 12 #include <linux/device.h> 13 #include <linux/platform_device.h> 14 #include <linux/mfd/sh_mobile_sdhi.h> 15 #include <linux/mmc/host.h> 16 #include <linux/mmc/sh_mmcif.h> 17 #include <linux/mtd/physmap.h> 18 #include <linux/gpio.h> 19 #include <linux/interrupt.h> 20 #include <linux/io.h> 21 #include <linux/delay.h> 22 #include <linux/usb/r8a66597.h> 23 #include <linux/i2c.h> 24 #include <linux/i2c/tsc2007.h> 25 #include <linux/spi/spi.h> 26 #include <linux/spi/sh_msiof.h> 27 #include <linux/spi/mmc_spi.h> 28 #include <linux/input.h> 29 #include <linux/input/sh_keysc.h> 30 #include <video/sh_mobile_lcdc.h> 31 #include <sound/sh_fsi.h> 32 #include <media/sh_mobile_ceu.h> 33 #include <media/tw9910.h> 34 #include <media/mt9t112.h> 35 #include <asm/heartbeat.h> 36 #include <asm/sh_eth.h> 37 #include <asm/clock.h> 38 #include <asm/suspend.h> 39 #include <cpu/sh7724.h> 40 41 /* 42 * Address Interface BusWidth 43 *----------------------------------------- 44 * 0x0000_0000 uboot 16bit 45 * 0x0004_0000 Linux romImage 16bit 46 * 0x0014_0000 MTD for Linux 16bit 47 * 0x0400_0000 Internal I/O 16/32bit 48 * 0x0800_0000 DRAM 32bit 49 * 0x1800_0000 MFI 16bit 50 */ 51 52 /* SWITCH 53 *------------------------------ 54 * DS2[1] = FlashROM write protect ON : write protect 55 * OFF : No write protect 56 * DS2[2] = RMII / TS, SCIF ON : RMII 57 * OFF : TS, SCIF3 58 * DS2[3] = Camera / Video ON : Camera 59 * OFF : NTSC/PAL (IN) 60 * DS2[5] = NTSC_OUT Clock ON : On board OSC 61 * OFF : SH7724 DV_CLK 62 * DS2[6-7] = MMC / SD ON-OFF : SD 63 * OFF-ON : MMC 64 */ 65 66 /* Heartbeat */ 67 static unsigned char led_pos[] = { 0, 1, 2, 3 }; 68 69 static struct heartbeat_data heartbeat_data = { 70 .nr_bits = 4, 71 .bit_pos = led_pos, 72 }; 73 74 static struct resource heartbeat_resource = { 75 .start = 0xA405012C, /* PTG */ 76 .end = 0xA405012E - 1, 77 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 78 }; 79 80 static struct platform_device heartbeat_device = { 81 .name = "heartbeat", 82 .id = -1, 83 .dev = { 84 .platform_data = &heartbeat_data, 85 }, 86 .num_resources = 1, 87 .resource = &heartbeat_resource, 88 }; 89 90 /* MTD */ 91 static struct mtd_partition nor_flash_partitions[] = { 92 { 93 .name = "boot loader", 94 .offset = 0, 95 .size = (5 * 1024 * 1024), 96 .mask_flags = MTD_WRITEABLE, /* force read-only */ 97 }, { 98 .name = "free-area", 99 .offset = MTDPART_OFS_APPEND, 100 .size = MTDPART_SIZ_FULL, 101 }, 102 }; 103 104 static struct physmap_flash_data nor_flash_data = { 105 .width = 2, 106 .parts = nor_flash_partitions, 107 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 108 }; 109 110 static struct resource nor_flash_resources[] = { 111 [0] = { 112 .name = "NOR Flash", 113 .start = 0x00000000, 114 .end = 0x03ffffff, 115 .flags = IORESOURCE_MEM, 116 } 117 }; 118 119 static struct platform_device nor_flash_device = { 120 .name = "physmap-flash", 121 .resource = nor_flash_resources, 122 .num_resources = ARRAY_SIZE(nor_flash_resources), 123 .dev = { 124 .platform_data = &nor_flash_data, 125 }, 126 }; 127 128 /* SH Eth */ 129 #define SH_ETH_ADDR (0xA4600000) 130 static struct resource sh_eth_resources[] = { 131 [0] = { 132 .start = SH_ETH_ADDR, 133 .end = SH_ETH_ADDR + 0x1FC, 134 .flags = IORESOURCE_MEM, 135 }, 136 [1] = { 137 .start = 91, 138 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 139 }, 140 }; 141 142 static struct sh_eth_plat_data sh_eth_plat = { 143 .phy = 0x1f, /* SMSC LAN8700 */ 144 .edmac_endian = EDMAC_LITTLE_ENDIAN, 145 .ether_link_active_low = 1 146 }; 147 148 static struct platform_device sh_eth_device = { 149 .name = "sh-eth", 150 .id = 0, 151 .dev = { 152 .platform_data = &sh_eth_plat, 153 }, 154 .num_resources = ARRAY_SIZE(sh_eth_resources), 155 .resource = sh_eth_resources, 156 .archdata = { 157 .hwblk_id = HWBLK_ETHER, 158 }, 159 }; 160 161 /* USB0 host */ 162 static void usb0_port_power(int port, int power) 163 { 164 gpio_set_value(GPIO_PTB4, power); 165 } 166 167 static struct r8a66597_platdata usb0_host_data = { 168 .on_chip = 1, 169 .port_power = usb0_port_power, 170 }; 171 172 static struct resource usb0_host_resources[] = { 173 [0] = { 174 .start = 0xa4d80000, 175 .end = 0xa4d80124 - 1, 176 .flags = IORESOURCE_MEM, 177 }, 178 [1] = { 179 .start = 65, 180 .end = 65, 181 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 182 }, 183 }; 184 185 static struct platform_device usb0_host_device = { 186 .name = "r8a66597_hcd", 187 .id = 0, 188 .dev = { 189 .dma_mask = NULL, /* not use dma */ 190 .coherent_dma_mask = 0xffffffff, 191 .platform_data = &usb0_host_data, 192 }, 193 .num_resources = ARRAY_SIZE(usb0_host_resources), 194 .resource = usb0_host_resources, 195 }; 196 197 /* USB1 host/function */ 198 static void usb1_port_power(int port, int power) 199 { 200 gpio_set_value(GPIO_PTB5, power); 201 } 202 203 static struct r8a66597_platdata usb1_common_data = { 204 .on_chip = 1, 205 .port_power = usb1_port_power, 206 }; 207 208 static struct resource usb1_common_resources[] = { 209 [0] = { 210 .start = 0xa4d90000, 211 .end = 0xa4d90124 - 1, 212 .flags = IORESOURCE_MEM, 213 }, 214 [1] = { 215 .start = 66, 216 .end = 66, 217 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 218 }, 219 }; 220 221 static struct platform_device usb1_common_device = { 222 /* .name will be added in arch_setup */ 223 .id = 1, 224 .dev = { 225 .dma_mask = NULL, /* not use dma */ 226 .coherent_dma_mask = 0xffffffff, 227 .platform_data = &usb1_common_data, 228 }, 229 .num_resources = ARRAY_SIZE(usb1_common_resources), 230 .resource = usb1_common_resources, 231 }; 232 233 /* LCDC */ 234 const static struct fb_videomode ecovec_lcd_modes[] = { 235 { 236 .name = "Panel", 237 .xres = 800, 238 .yres = 480, 239 .left_margin = 220, 240 .right_margin = 110, 241 .hsync_len = 70, 242 .upper_margin = 20, 243 .lower_margin = 5, 244 .vsync_len = 5, 245 .sync = 0, /* hsync and vsync are active low */ 246 }, 247 }; 248 249 const static struct fb_videomode ecovec_dvi_modes[] = { 250 { 251 .name = "DVI", 252 .xres = 1280, 253 .yres = 720, 254 .left_margin = 220, 255 .right_margin = 110, 256 .hsync_len = 40, 257 .upper_margin = 20, 258 .lower_margin = 5, 259 .vsync_len = 5, 260 .sync = 0, /* hsync and vsync are active low */ 261 }, 262 }; 263 264 static struct sh_mobile_lcdc_info lcdc_info = { 265 .ch[0] = { 266 .interface_type = RGB18, 267 .chan = LCDC_CHAN_MAINLCD, 268 .bpp = 16, 269 .lcd_size_cfg = { /* 7.0 inch */ 270 .width = 152, 271 .height = 91, 272 }, 273 .board_cfg = { 274 }, 275 } 276 }; 277 278 static struct resource lcdc_resources[] = { 279 [0] = { 280 .name = "LCDC", 281 .start = 0xfe940000, 282 .end = 0xfe942fff, 283 .flags = IORESOURCE_MEM, 284 }, 285 [1] = { 286 .start = 106, 287 .flags = IORESOURCE_IRQ, 288 }, 289 }; 290 291 static struct platform_device lcdc_device = { 292 .name = "sh_mobile_lcdc_fb", 293 .num_resources = ARRAY_SIZE(lcdc_resources), 294 .resource = lcdc_resources, 295 .dev = { 296 .platform_data = &lcdc_info, 297 }, 298 .archdata = { 299 .hwblk_id = HWBLK_LCDC, 300 }, 301 }; 302 303 /* CEU0 */ 304 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 305 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 306 }; 307 308 static struct resource ceu0_resources[] = { 309 [0] = { 310 .name = "CEU0", 311 .start = 0xfe910000, 312 .end = 0xfe91009f, 313 .flags = IORESOURCE_MEM, 314 }, 315 [1] = { 316 .start = 52, 317 .flags = IORESOURCE_IRQ, 318 }, 319 [2] = { 320 /* place holder for contiguous memory */ 321 }, 322 }; 323 324 static struct platform_device ceu0_device = { 325 .name = "sh_mobile_ceu", 326 .id = 0, /* "ceu0" clock */ 327 .num_resources = ARRAY_SIZE(ceu0_resources), 328 .resource = ceu0_resources, 329 .dev = { 330 .platform_data = &sh_mobile_ceu0_info, 331 }, 332 .archdata = { 333 .hwblk_id = HWBLK_CEU0, 334 }, 335 }; 336 337 /* CEU1 */ 338 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 339 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 340 }; 341 342 static struct resource ceu1_resources[] = { 343 [0] = { 344 .name = "CEU1", 345 .start = 0xfe914000, 346 .end = 0xfe91409f, 347 .flags = IORESOURCE_MEM, 348 }, 349 [1] = { 350 .start = 63, 351 .flags = IORESOURCE_IRQ, 352 }, 353 [2] = { 354 /* place holder for contiguous memory */ 355 }, 356 }; 357 358 static struct platform_device ceu1_device = { 359 .name = "sh_mobile_ceu", 360 .id = 1, /* "ceu1" clock */ 361 .num_resources = ARRAY_SIZE(ceu1_resources), 362 .resource = ceu1_resources, 363 .dev = { 364 .platform_data = &sh_mobile_ceu1_info, 365 }, 366 .archdata = { 367 .hwblk_id = HWBLK_CEU1, 368 }, 369 }; 370 371 /* I2C device */ 372 static struct i2c_board_info i2c0_devices[] = { 373 { 374 I2C_BOARD_INFO("da7210", 0x1a), 375 }, 376 }; 377 378 static struct i2c_board_info i2c1_devices[] = { 379 { 380 I2C_BOARD_INFO("r2025sd", 0x32), 381 }, 382 { 383 I2C_BOARD_INFO("lis3lv02d", 0x1c), 384 .irq = 33, 385 } 386 }; 387 388 /* KEYSC */ 389 static struct sh_keysc_info keysc_info = { 390 .mode = SH_KEYSC_MODE_1, 391 .scan_timing = 3, 392 .delay = 50, 393 .kycr2_delay = 100, 394 .keycodes = { KEY_1, 0, 0, 0, 0, 395 KEY_2, 0, 0, 0, 0, 396 KEY_3, 0, 0, 0, 0, 397 KEY_4, 0, 0, 0, 0, 398 KEY_5, 0, 0, 0, 0, 399 KEY_6, 0, 0, 0, 0, }, 400 }; 401 402 static struct resource keysc_resources[] = { 403 [0] = { 404 .name = "KEYSC", 405 .start = 0x044b0000, 406 .end = 0x044b000f, 407 .flags = IORESOURCE_MEM, 408 }, 409 [1] = { 410 .start = 79, 411 .flags = IORESOURCE_IRQ, 412 }, 413 }; 414 415 static struct platform_device keysc_device = { 416 .name = "sh_keysc", 417 .id = 0, /* keysc0 clock */ 418 .num_resources = ARRAY_SIZE(keysc_resources), 419 .resource = keysc_resources, 420 .dev = { 421 .platform_data = &keysc_info, 422 }, 423 .archdata = { 424 .hwblk_id = HWBLK_KEYSC, 425 }, 426 }; 427 428 /* TouchScreen */ 429 #define IRQ0 32 430 static int ts_get_pendown_state(void) 431 { 432 int val = 0; 433 gpio_free(GPIO_FN_INTC_IRQ0); 434 gpio_request(GPIO_PTZ0, NULL); 435 gpio_direction_input(GPIO_PTZ0); 436 437 val = gpio_get_value(GPIO_PTZ0); 438 439 gpio_free(GPIO_PTZ0); 440 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 441 442 return val ? 0 : 1; 443 } 444 445 static int ts_init(void) 446 { 447 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 448 return 0; 449 } 450 451 static struct tsc2007_platform_data tsc2007_info = { 452 .model = 2007, 453 .x_plate_ohms = 180, 454 .get_pendown_state = ts_get_pendown_state, 455 .init_platform_hw = ts_init, 456 }; 457 458 static struct i2c_board_info ts_i2c_clients = { 459 I2C_BOARD_INFO("tsc2007", 0x48), 460 .type = "tsc2007", 461 .platform_data = &tsc2007_info, 462 .irq = IRQ0, 463 }; 464 465 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 466 /* SDHI0 */ 467 static void sdhi0_set_pwr(struct platform_device *pdev, int state) 468 { 469 gpio_set_value(GPIO_PTB6, state); 470 } 471 472 static struct sh_mobile_sdhi_info sdhi0_info = { 473 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 474 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 475 .set_pwr = sdhi0_set_pwr, 476 }; 477 478 static struct resource sdhi0_resources[] = { 479 [0] = { 480 .name = "SDHI0", 481 .start = 0x04ce0000, 482 .end = 0x04ce01ff, 483 .flags = IORESOURCE_MEM, 484 }, 485 [1] = { 486 .start = 100, 487 .flags = IORESOURCE_IRQ, 488 }, 489 }; 490 491 static struct platform_device sdhi0_device = { 492 .name = "sh_mobile_sdhi", 493 .num_resources = ARRAY_SIZE(sdhi0_resources), 494 .resource = sdhi0_resources, 495 .id = 0, 496 .dev = { 497 .platform_data = &sdhi0_info, 498 }, 499 .archdata = { 500 .hwblk_id = HWBLK_SDHI0, 501 }, 502 }; 503 504 #if !defined(CONFIG_MMC_SH_MMCIF) 505 /* SDHI1 */ 506 static void sdhi1_set_pwr(struct platform_device *pdev, int state) 507 { 508 gpio_set_value(GPIO_PTB7, state); 509 } 510 511 static struct sh_mobile_sdhi_info sdhi1_info = { 512 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 513 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 514 .set_pwr = sdhi1_set_pwr, 515 }; 516 517 static struct resource sdhi1_resources[] = { 518 [0] = { 519 .name = "SDHI1", 520 .start = 0x04cf0000, 521 .end = 0x04cf01ff, 522 .flags = IORESOURCE_MEM, 523 }, 524 [1] = { 525 .start = 23, 526 .flags = IORESOURCE_IRQ, 527 }, 528 }; 529 530 static struct platform_device sdhi1_device = { 531 .name = "sh_mobile_sdhi", 532 .num_resources = ARRAY_SIZE(sdhi1_resources), 533 .resource = sdhi1_resources, 534 .id = 1, 535 .dev = { 536 .platform_data = &sdhi1_info, 537 }, 538 .archdata = { 539 .hwblk_id = HWBLK_SDHI1, 540 }, 541 }; 542 #endif /* CONFIG_MMC_SH_MMCIF */ 543 544 #else 545 546 /* MMC SPI */ 547 static int mmc_spi_get_ro(struct device *dev) 548 { 549 return gpio_get_value(GPIO_PTY6); 550 } 551 552 static int mmc_spi_get_cd(struct device *dev) 553 { 554 return !gpio_get_value(GPIO_PTY7); 555 } 556 557 static void mmc_spi_setpower(struct device *dev, unsigned int maskval) 558 { 559 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); 560 } 561 562 static struct mmc_spi_platform_data mmc_spi_info = { 563 .get_ro = mmc_spi_get_ro, 564 .get_cd = mmc_spi_get_cd, 565 .caps = MMC_CAP_NEEDS_POLL, 566 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ 567 .setpower = mmc_spi_setpower, 568 }; 569 570 static struct spi_board_info spi_bus[] = { 571 { 572 .modalias = "mmc_spi", 573 .platform_data = &mmc_spi_info, 574 .max_speed_hz = 5000000, 575 .mode = SPI_MODE_0, 576 .controller_data = (void *) GPIO_PTM4, 577 }, 578 }; 579 580 /* MSIOF0 */ 581 static struct sh_msiof_spi_info msiof0_data = { 582 .num_chipselect = 1, 583 }; 584 585 static struct resource msiof0_resources[] = { 586 [0] = { 587 .name = "MSIOF0", 588 .start = 0xa4c40000, 589 .end = 0xa4c40063, 590 .flags = IORESOURCE_MEM, 591 }, 592 [1] = { 593 .start = 84, 594 .flags = IORESOURCE_IRQ, 595 }, 596 }; 597 598 static struct platform_device msiof0_device = { 599 .name = "spi_sh_msiof", 600 .id = 0, /* MSIOF0 */ 601 .dev = { 602 .platform_data = &msiof0_data, 603 }, 604 .num_resources = ARRAY_SIZE(msiof0_resources), 605 .resource = msiof0_resources, 606 .archdata = { 607 .hwblk_id = HWBLK_MSIOF0, 608 }, 609 }; 610 611 #endif 612 613 /* I2C Video/Camera */ 614 static struct i2c_board_info i2c_camera[] = { 615 { 616 I2C_BOARD_INFO("tw9910", 0x45), 617 }, 618 { 619 /* 1st camera */ 620 I2C_BOARD_INFO("mt9t112", 0x3c), 621 }, 622 { 623 /* 2nd camera */ 624 I2C_BOARD_INFO("mt9t112", 0x3c), 625 }, 626 }; 627 628 /* tw9910 */ 629 static int tw9910_power(struct device *dev, int mode) 630 { 631 int val = mode ? 0 : 1; 632 633 gpio_set_value(GPIO_PTU2, val); 634 if (mode) 635 mdelay(100); 636 637 return 0; 638 } 639 640 static struct tw9910_video_info tw9910_info = { 641 .buswidth = SOCAM_DATAWIDTH_8, 642 .mpout = TW9910_MPO_FIELD, 643 }; 644 645 static struct soc_camera_link tw9910_link = { 646 .i2c_adapter_id = 0, 647 .bus_id = 1, 648 .power = tw9910_power, 649 .board_info = &i2c_camera[0], 650 .priv = &tw9910_info, 651 }; 652 653 /* mt9t112 */ 654 static int mt9t112_power1(struct device *dev, int mode) 655 { 656 gpio_set_value(GPIO_PTA3, mode); 657 if (mode) 658 mdelay(100); 659 660 return 0; 661 } 662 663 static struct mt9t112_camera_info mt9t112_info1 = { 664 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 665 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 666 }; 667 668 static struct soc_camera_link mt9t112_link1 = { 669 .i2c_adapter_id = 0, 670 .power = mt9t112_power1, 671 .bus_id = 0, 672 .board_info = &i2c_camera[1], 673 .priv = &mt9t112_info1, 674 }; 675 676 static int mt9t112_power2(struct device *dev, int mode) 677 { 678 gpio_set_value(GPIO_PTA4, mode); 679 if (mode) 680 mdelay(100); 681 682 return 0; 683 } 684 685 static struct mt9t112_camera_info mt9t112_info2 = { 686 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 687 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 688 }; 689 690 static struct soc_camera_link mt9t112_link2 = { 691 .i2c_adapter_id = 1, 692 .power = mt9t112_power2, 693 .bus_id = 1, 694 .board_info = &i2c_camera[2], 695 .priv = &mt9t112_info2, 696 }; 697 698 static struct platform_device camera_devices[] = { 699 { 700 .name = "soc-camera-pdrv", 701 .id = 0, 702 .dev = { 703 .platform_data = &tw9910_link, 704 }, 705 }, 706 { 707 .name = "soc-camera-pdrv", 708 .id = 1, 709 .dev = { 710 .platform_data = &mt9t112_link1, 711 }, 712 }, 713 { 714 .name = "soc-camera-pdrv", 715 .id = 2, 716 .dev = { 717 .platform_data = &mt9t112_link2, 718 }, 719 }, 720 }; 721 722 /* FSI */ 723 static struct sh_fsi_platform_info fsi_info = { 724 .portb_flags = SH_FSI_BRS_INV | 725 SH_FSI_OUT_SLAVE_MODE | 726 SH_FSI_IN_SLAVE_MODE | 727 SH_FSI_OFMT(I2S) | 728 SH_FSI_IFMT(I2S), 729 }; 730 731 static struct resource fsi_resources[] = { 732 [0] = { 733 .name = "FSI", 734 .start = 0xFE3C0000, 735 .end = 0xFE3C021d, 736 .flags = IORESOURCE_MEM, 737 }, 738 [1] = { 739 .start = 108, 740 .flags = IORESOURCE_IRQ, 741 }, 742 }; 743 744 static struct platform_device fsi_device = { 745 .name = "sh_fsi", 746 .id = 0, 747 .num_resources = ARRAY_SIZE(fsi_resources), 748 .resource = fsi_resources, 749 .dev = { 750 .platform_data = &fsi_info, 751 }, 752 .archdata = { 753 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */ 754 }, 755 }; 756 757 /* IrDA */ 758 static struct resource irda_resources[] = { 759 [0] = { 760 .name = "IrDA", 761 .start = 0xA45D0000, 762 .end = 0xA45D0049, 763 .flags = IORESOURCE_MEM, 764 }, 765 [1] = { 766 .start = 20, 767 .flags = IORESOURCE_IRQ, 768 }, 769 }; 770 771 static struct platform_device irda_device = { 772 .name = "sh_sir", 773 .num_resources = ARRAY_SIZE(irda_resources), 774 .resource = irda_resources, 775 }; 776 777 #include <media/ak881x.h> 778 #include <media/sh_vou.h> 779 780 static struct ak881x_pdata ak881x_pdata = { 781 .flags = AK881X_IF_MODE_SLAVE, 782 }; 783 784 static struct i2c_board_info ak8813 = { 785 I2C_BOARD_INFO("ak8813", 0x20), 786 .platform_data = &ak881x_pdata, 787 }; 788 789 static struct sh_vou_pdata sh_vou_pdata = { 790 .bus_fmt = SH_VOU_BUS_8BIT, 791 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, 792 .board_info = &ak8813, 793 .i2c_adap = 0, 794 }; 795 796 static struct resource sh_vou_resources[] = { 797 [0] = { 798 .start = 0xfe960000, 799 .end = 0xfe962043, 800 .flags = IORESOURCE_MEM, 801 }, 802 [1] = { 803 .start = 55, 804 .flags = IORESOURCE_IRQ, 805 }, 806 }; 807 808 static struct platform_device vou_device = { 809 .name = "sh-vou", 810 .id = -1, 811 .num_resources = ARRAY_SIZE(sh_vou_resources), 812 .resource = sh_vou_resources, 813 .dev = { 814 .platform_data = &sh_vou_pdata, 815 }, 816 .archdata = { 817 .hwblk_id = HWBLK_VOU, 818 }, 819 }; 820 821 #if defined(CONFIG_MMC_SH_MMCIF) 822 /* SH_MMCIF */ 823 static void mmcif_set_pwr(struct platform_device *pdev, int state) 824 { 825 gpio_set_value(GPIO_PTB7, state); 826 } 827 828 static void mmcif_down_pwr(struct platform_device *pdev) 829 { 830 gpio_set_value(GPIO_PTB7, 0); 831 } 832 833 static struct resource sh_mmcif_resources[] = { 834 [0] = { 835 .name = "SH_MMCIF", 836 .start = 0xA4CA0000, 837 .end = 0xA4CA00FF, 838 .flags = IORESOURCE_MEM, 839 }, 840 [1] = { 841 /* MMC2I */ 842 .start = 29, 843 .flags = IORESOURCE_IRQ, 844 }, 845 [2] = { 846 /* MMC3I */ 847 .start = 30, 848 .flags = IORESOURCE_IRQ, 849 }, 850 }; 851 852 static struct sh_mmcif_plat_data sh_mmcif_plat = { 853 .set_pwr = mmcif_set_pwr, 854 .down_pwr = mmcif_down_pwr, 855 .sup_pclk = 0, /* SH7724: Max Pclk/2 */ 856 .caps = MMC_CAP_4_BIT_DATA | 857 MMC_CAP_8_BIT_DATA | 858 MMC_CAP_NEEDS_POLL, 859 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, 860 }; 861 862 static struct platform_device sh_mmcif_device = { 863 .name = "sh_mmcif", 864 .id = 0, 865 .dev = { 866 .platform_data = &sh_mmcif_plat, 867 }, 868 .num_resources = ARRAY_SIZE(sh_mmcif_resources), 869 .resource = sh_mmcif_resources, 870 }; 871 #endif 872 873 static struct platform_device *ecovec_devices[] __initdata = { 874 &heartbeat_device, 875 &nor_flash_device, 876 &sh_eth_device, 877 &usb0_host_device, 878 &usb1_common_device, 879 &lcdc_device, 880 &ceu0_device, 881 &ceu1_device, 882 &keysc_device, 883 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 884 &sdhi0_device, 885 #if !defined(CONFIG_MMC_SH_MMCIF) 886 &sdhi1_device, 887 #endif 888 #else 889 &msiof0_device, 890 #endif 891 &camera_devices[0], 892 &camera_devices[1], 893 &camera_devices[2], 894 &fsi_device, 895 &irda_device, 896 &vou_device, 897 #if defined(CONFIG_MMC_SH_MMCIF) 898 &sh_mmcif_device, 899 #endif 900 }; 901 902 #ifdef CONFIG_I2C 903 #define EEPROM_ADDR 0x50 904 static u8 mac_read(struct i2c_adapter *a, u8 command) 905 { 906 struct i2c_msg msg[2]; 907 u8 buf; 908 int ret; 909 910 msg[0].addr = EEPROM_ADDR; 911 msg[0].flags = 0; 912 msg[0].len = 1; 913 msg[0].buf = &command; 914 915 msg[1].addr = EEPROM_ADDR; 916 msg[1].flags = I2C_M_RD; 917 msg[1].len = 1; 918 msg[1].buf = &buf; 919 920 ret = i2c_transfer(a, msg, 2); 921 if (ret < 0) { 922 printk(KERN_ERR "error %d\n", ret); 923 buf = 0xff; 924 } 925 926 return buf; 927 } 928 929 static void __init sh_eth_init(struct sh_eth_plat_data *pd) 930 { 931 struct i2c_adapter *a = i2c_get_adapter(1); 932 int i; 933 934 if (!a) { 935 pr_err("can not get I2C 1\n"); 936 return; 937 } 938 939 /* read MAC address frome EEPROM */ 940 for (i = 0; i < sizeof(pd->mac_addr); i++) { 941 pd->mac_addr[i] = mac_read(a, 0x10 + i); 942 msleep(10); 943 } 944 945 i2c_put_adapter(a); 946 } 947 #else 948 static void __init sh_eth_init(struct sh_eth_plat_data *pd) 949 { 950 pr_err("unable to read sh_eth MAC address\n"); 951 } 952 #endif 953 954 #define PORT_HIZA 0xA4050158 955 #define IODRIVEA 0xA405018A 956 957 extern char ecovec24_sdram_enter_start; 958 extern char ecovec24_sdram_enter_end; 959 extern char ecovec24_sdram_leave_start; 960 extern char ecovec24_sdram_leave_end; 961 962 static int __init arch_setup(void) 963 { 964 struct clk *clk; 965 966 /* register board specific self-refresh code */ 967 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | 968 SUSP_SH_RSTANDBY, 969 &ecovec24_sdram_enter_start, 970 &ecovec24_sdram_enter_end, 971 &ecovec24_sdram_leave_start, 972 &ecovec24_sdram_leave_end); 973 974 /* enable STATUS0, STATUS2 and PDSTATUS */ 975 gpio_request(GPIO_FN_STATUS0, NULL); 976 gpio_request(GPIO_FN_STATUS2, NULL); 977 gpio_request(GPIO_FN_PDSTATUS, NULL); 978 979 /* enable SCIFA0 */ 980 gpio_request(GPIO_FN_SCIF0_TXD, NULL); 981 gpio_request(GPIO_FN_SCIF0_RXD, NULL); 982 983 /* enable debug LED */ 984 gpio_request(GPIO_PTG0, NULL); 985 gpio_request(GPIO_PTG1, NULL); 986 gpio_request(GPIO_PTG2, NULL); 987 gpio_request(GPIO_PTG3, NULL); 988 gpio_direction_output(GPIO_PTG0, 0); 989 gpio_direction_output(GPIO_PTG1, 0); 990 gpio_direction_output(GPIO_PTG2, 0); 991 gpio_direction_output(GPIO_PTG3, 0); 992 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 993 994 /* enable SH-Eth */ 995 gpio_request(GPIO_PTA1, NULL); 996 gpio_direction_output(GPIO_PTA1, 1); 997 mdelay(20); 998 999 gpio_request(GPIO_FN_RMII_RXD0, NULL); 1000 gpio_request(GPIO_FN_RMII_RXD1, NULL); 1001 gpio_request(GPIO_FN_RMII_TXD0, NULL); 1002 gpio_request(GPIO_FN_RMII_TXD1, NULL); 1003 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 1004 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 1005 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 1006 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 1007 gpio_request(GPIO_FN_MDIO, NULL); 1008 gpio_request(GPIO_FN_MDC, NULL); 1009 gpio_request(GPIO_FN_LNKSTA, NULL); 1010 1011 /* enable USB */ 1012 __raw_writew(0x0000, 0xA4D80000); 1013 __raw_writew(0x0000, 0xA4D90000); 1014 gpio_request(GPIO_PTB3, NULL); 1015 gpio_request(GPIO_PTB4, NULL); 1016 gpio_request(GPIO_PTB5, NULL); 1017 gpio_direction_input(GPIO_PTB3); 1018 gpio_direction_output(GPIO_PTB4, 0); 1019 gpio_direction_output(GPIO_PTB5, 0); 1020 __raw_writew(0x0600, 0xa40501d4); 1021 __raw_writew(0x0600, 0xa4050192); 1022 1023 if (gpio_get_value(GPIO_PTB3)) { 1024 printk(KERN_INFO "USB1 function is selected\n"); 1025 usb1_common_device.name = "r8a66597_udc"; 1026 } else { 1027 printk(KERN_INFO "USB1 host is selected\n"); 1028 usb1_common_device.name = "r8a66597_hcd"; 1029 } 1030 1031 /* enable LCDC */ 1032 gpio_request(GPIO_FN_LCDD23, NULL); 1033 gpio_request(GPIO_FN_LCDD22, NULL); 1034 gpio_request(GPIO_FN_LCDD21, NULL); 1035 gpio_request(GPIO_FN_LCDD20, NULL); 1036 gpio_request(GPIO_FN_LCDD19, NULL); 1037 gpio_request(GPIO_FN_LCDD18, NULL); 1038 gpio_request(GPIO_FN_LCDD17, NULL); 1039 gpio_request(GPIO_FN_LCDD16, NULL); 1040 gpio_request(GPIO_FN_LCDD15, NULL); 1041 gpio_request(GPIO_FN_LCDD14, NULL); 1042 gpio_request(GPIO_FN_LCDD13, NULL); 1043 gpio_request(GPIO_FN_LCDD12, NULL); 1044 gpio_request(GPIO_FN_LCDD11, NULL); 1045 gpio_request(GPIO_FN_LCDD10, NULL); 1046 gpio_request(GPIO_FN_LCDD9, NULL); 1047 gpio_request(GPIO_FN_LCDD8, NULL); 1048 gpio_request(GPIO_FN_LCDD7, NULL); 1049 gpio_request(GPIO_FN_LCDD6, NULL); 1050 gpio_request(GPIO_FN_LCDD5, NULL); 1051 gpio_request(GPIO_FN_LCDD4, NULL); 1052 gpio_request(GPIO_FN_LCDD3, NULL); 1053 gpio_request(GPIO_FN_LCDD2, NULL); 1054 gpio_request(GPIO_FN_LCDD1, NULL); 1055 gpio_request(GPIO_FN_LCDD0, NULL); 1056 gpio_request(GPIO_FN_LCDDISP, NULL); 1057 gpio_request(GPIO_FN_LCDHSYN, NULL); 1058 gpio_request(GPIO_FN_LCDDCK, NULL); 1059 gpio_request(GPIO_FN_LCDVSYN, NULL); 1060 gpio_request(GPIO_FN_LCDDON, NULL); 1061 gpio_request(GPIO_FN_LCDLCLK, NULL); 1062 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); 1063 1064 gpio_request(GPIO_PTE6, NULL); 1065 gpio_request(GPIO_PTU1, NULL); 1066 gpio_request(GPIO_PTR1, NULL); 1067 gpio_request(GPIO_PTA2, NULL); 1068 gpio_direction_input(GPIO_PTE6); 1069 gpio_direction_output(GPIO_PTU1, 0); 1070 gpio_direction_output(GPIO_PTR1, 0); 1071 gpio_direction_output(GPIO_PTA2, 0); 1072 1073 /* I/O buffer drive ability is high */ 1074 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); 1075 1076 if (gpio_get_value(GPIO_PTE6)) { 1077 /* DVI */ 1078 lcdc_info.clock_source = LCDC_CLK_EXTERNAL; 1079 lcdc_info.ch[0].clock_divider = 1; 1080 lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes; 1081 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes); 1082 1083 gpio_set_value(GPIO_PTA2, 1); 1084 gpio_set_value(GPIO_PTU1, 1); 1085 } else { 1086 /* Panel */ 1087 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; 1088 lcdc_info.ch[0].clock_divider = 2; 1089 lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes; 1090 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes); 1091 1092 gpio_set_value(GPIO_PTR1, 1); 1093 1094 /* FIXME 1095 * 1096 * LCDDON control is needed for Panel, 1097 * but current sh_mobile_lcdc driver doesn't control it. 1098 * It is temporary correspondence 1099 */ 1100 gpio_request(GPIO_PTF4, NULL); 1101 gpio_direction_output(GPIO_PTF4, 1); 1102 1103 /* enable TouchScreen */ 1104 i2c_register_board_info(0, &ts_i2c_clients, 1); 1105 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); 1106 } 1107 1108 /* enable CEU0 */ 1109 gpio_request(GPIO_FN_VIO0_D15, NULL); 1110 gpio_request(GPIO_FN_VIO0_D14, NULL); 1111 gpio_request(GPIO_FN_VIO0_D13, NULL); 1112 gpio_request(GPIO_FN_VIO0_D12, NULL); 1113 gpio_request(GPIO_FN_VIO0_D11, NULL); 1114 gpio_request(GPIO_FN_VIO0_D10, NULL); 1115 gpio_request(GPIO_FN_VIO0_D9, NULL); 1116 gpio_request(GPIO_FN_VIO0_D8, NULL); 1117 gpio_request(GPIO_FN_VIO0_D7, NULL); 1118 gpio_request(GPIO_FN_VIO0_D6, NULL); 1119 gpio_request(GPIO_FN_VIO0_D5, NULL); 1120 gpio_request(GPIO_FN_VIO0_D4, NULL); 1121 gpio_request(GPIO_FN_VIO0_D3, NULL); 1122 gpio_request(GPIO_FN_VIO0_D2, NULL); 1123 gpio_request(GPIO_FN_VIO0_D1, NULL); 1124 gpio_request(GPIO_FN_VIO0_D0, NULL); 1125 gpio_request(GPIO_FN_VIO0_VD, NULL); 1126 gpio_request(GPIO_FN_VIO0_CLK, NULL); 1127 gpio_request(GPIO_FN_VIO0_FLD, NULL); 1128 gpio_request(GPIO_FN_VIO0_HD, NULL); 1129 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 1130 1131 /* enable CEU1 */ 1132 gpio_request(GPIO_FN_VIO1_D7, NULL); 1133 gpio_request(GPIO_FN_VIO1_D6, NULL); 1134 gpio_request(GPIO_FN_VIO1_D5, NULL); 1135 gpio_request(GPIO_FN_VIO1_D4, NULL); 1136 gpio_request(GPIO_FN_VIO1_D3, NULL); 1137 gpio_request(GPIO_FN_VIO1_D2, NULL); 1138 gpio_request(GPIO_FN_VIO1_D1, NULL); 1139 gpio_request(GPIO_FN_VIO1_D0, NULL); 1140 gpio_request(GPIO_FN_VIO1_FLD, NULL); 1141 gpio_request(GPIO_FN_VIO1_HD, NULL); 1142 gpio_request(GPIO_FN_VIO1_VD, NULL); 1143 gpio_request(GPIO_FN_VIO1_CLK, NULL); 1144 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 1145 1146 /* enable KEYSC */ 1147 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 1148 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 1149 gpio_request(GPIO_FN_KEYOUT3, NULL); 1150 gpio_request(GPIO_FN_KEYOUT2, NULL); 1151 gpio_request(GPIO_FN_KEYOUT1, NULL); 1152 gpio_request(GPIO_FN_KEYOUT0, NULL); 1153 gpio_request(GPIO_FN_KEYIN0, NULL); 1154 1155 /* enable user debug switch */ 1156 gpio_request(GPIO_PTR0, NULL); 1157 gpio_request(GPIO_PTR4, NULL); 1158 gpio_request(GPIO_PTR5, NULL); 1159 gpio_request(GPIO_PTR6, NULL); 1160 gpio_direction_input(GPIO_PTR0); 1161 gpio_direction_input(GPIO_PTR4); 1162 gpio_direction_input(GPIO_PTR5); 1163 gpio_direction_input(GPIO_PTR6); 1164 1165 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 1166 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ 1167 gpio_request(GPIO_FN_SDHI0CD, NULL); 1168 gpio_request(GPIO_FN_SDHI0WP, NULL); 1169 gpio_request(GPIO_FN_SDHI0CMD, NULL); 1170 gpio_request(GPIO_FN_SDHI0CLK, NULL); 1171 gpio_request(GPIO_FN_SDHI0D3, NULL); 1172 gpio_request(GPIO_FN_SDHI0D2, NULL); 1173 gpio_request(GPIO_FN_SDHI0D1, NULL); 1174 gpio_request(GPIO_FN_SDHI0D0, NULL); 1175 gpio_request(GPIO_PTB6, NULL); 1176 gpio_direction_output(GPIO_PTB6, 0); 1177 1178 #if !defined(CONFIG_MMC_SH_MMCIF) 1179 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ 1180 gpio_request(GPIO_FN_SDHI1CD, NULL); 1181 gpio_request(GPIO_FN_SDHI1WP, NULL); 1182 gpio_request(GPIO_FN_SDHI1CMD, NULL); 1183 gpio_request(GPIO_FN_SDHI1CLK, NULL); 1184 gpio_request(GPIO_FN_SDHI1D3, NULL); 1185 gpio_request(GPIO_FN_SDHI1D2, NULL); 1186 gpio_request(GPIO_FN_SDHI1D1, NULL); 1187 gpio_request(GPIO_FN_SDHI1D0, NULL); 1188 gpio_request(GPIO_PTB7, NULL); 1189 gpio_direction_output(GPIO_PTB7, 0); 1190 1191 /* I/O buffer drive ability is high for SDHI1 */ 1192 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1193 #endif /* CONFIG_MMC_SH_MMCIF */ 1194 #else 1195 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1196 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1197 gpio_request(GPIO_FN_MSIOF0_RXD, NULL); 1198 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); 1199 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ 1200 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ 1201 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ 1202 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ 1203 gpio_request(GPIO_PTY6, NULL); /* write protect */ 1204 gpio_direction_input(GPIO_PTY6); 1205 gpio_request(GPIO_PTY7, NULL); /* card detect */ 1206 gpio_direction_input(GPIO_PTY7); 1207 1208 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 1209 #endif 1210 1211 /* enable Video */ 1212 gpio_request(GPIO_PTU2, NULL); 1213 gpio_direction_output(GPIO_PTU2, 1); 1214 1215 /* enable Camera */ 1216 gpio_request(GPIO_PTA3, NULL); 1217 gpio_request(GPIO_PTA4, NULL); 1218 gpio_direction_output(GPIO_PTA3, 0); 1219 gpio_direction_output(GPIO_PTA4, 0); 1220 1221 /* enable FSI */ 1222 gpio_request(GPIO_FN_FSIMCKB, NULL); 1223 gpio_request(GPIO_FN_FSIIBSD, NULL); 1224 gpio_request(GPIO_FN_FSIOBSD, NULL); 1225 gpio_request(GPIO_FN_FSIIBBCK, NULL); 1226 gpio_request(GPIO_FN_FSIIBLRCK, NULL); 1227 gpio_request(GPIO_FN_FSIOBBCK, NULL); 1228 gpio_request(GPIO_FN_FSIOBLRCK, NULL); 1229 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 1230 1231 /* set SPU2 clock to 83.4 MHz */ 1232 clk = clk_get(NULL, "spu_clk"); 1233 if (!IS_ERR(clk)) { 1234 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 1235 clk_put(clk); 1236 } 1237 1238 /* change parent of FSI B */ 1239 clk = clk_get(NULL, "fsib_clk"); 1240 if (!IS_ERR(clk)) { 1241 /* 48kHz dummy clock was used to make sure 1/1 divide */ 1242 clk_set_rate(&sh7724_fsimckb_clk, 48000); 1243 clk_set_parent(clk, &sh7724_fsimckb_clk); 1244 clk_set_rate(clk, 48000); 1245 clk_put(clk); 1246 } 1247 1248 gpio_request(GPIO_PTU0, NULL); 1249 gpio_direction_output(GPIO_PTU0, 0); 1250 mdelay(20); 1251 1252 /* enable motion sensor */ 1253 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 1254 gpio_direction_input(GPIO_FN_INTC_IRQ1); 1255 1256 /* set VPU clock to 166 MHz */ 1257 clk = clk_get(NULL, "vpu_clk"); 1258 if (!IS_ERR(clk)) { 1259 clk_set_rate(clk, clk_round_rate(clk, 166000000)); 1260 clk_put(clk); 1261 } 1262 1263 /* enable IrDA */ 1264 gpio_request(GPIO_FN_IRDA_OUT, NULL); 1265 gpio_request(GPIO_FN_IRDA_IN, NULL); 1266 gpio_request(GPIO_PTU5, NULL); 1267 gpio_direction_output(GPIO_PTU5, 0); 1268 1269 #if defined(CONFIG_MMC_SH_MMCIF) 1270 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ 1271 gpio_request(GPIO_FN_MMC_D7, NULL); 1272 gpio_request(GPIO_FN_MMC_D6, NULL); 1273 gpio_request(GPIO_FN_MMC_D5, NULL); 1274 gpio_request(GPIO_FN_MMC_D4, NULL); 1275 gpio_request(GPIO_FN_MMC_D3, NULL); 1276 gpio_request(GPIO_FN_MMC_D2, NULL); 1277 gpio_request(GPIO_FN_MMC_D1, NULL); 1278 gpio_request(GPIO_FN_MMC_D0, NULL); 1279 gpio_request(GPIO_FN_MMC_CLK, NULL); 1280 gpio_request(GPIO_FN_MMC_CMD, NULL); 1281 gpio_request(GPIO_PTB7, NULL); 1282 gpio_direction_output(GPIO_PTB7, 0); 1283 1284 /* I/O buffer drive ability is high for MMCIF */ 1285 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1286 #endif 1287 1288 /* enable I2C device */ 1289 i2c_register_board_info(0, i2c0_devices, 1290 ARRAY_SIZE(i2c0_devices)); 1291 1292 i2c_register_board_info(1, i2c1_devices, 1293 ARRAY_SIZE(i2c1_devices)); 1294 1295 /* VOU */ 1296 gpio_request(GPIO_FN_DV_D15, NULL); 1297 gpio_request(GPIO_FN_DV_D14, NULL); 1298 gpio_request(GPIO_FN_DV_D13, NULL); 1299 gpio_request(GPIO_FN_DV_D12, NULL); 1300 gpio_request(GPIO_FN_DV_D11, NULL); 1301 gpio_request(GPIO_FN_DV_D10, NULL); 1302 gpio_request(GPIO_FN_DV_D9, NULL); 1303 gpio_request(GPIO_FN_DV_D8, NULL); 1304 gpio_request(GPIO_FN_DV_CLKI, NULL); 1305 gpio_request(GPIO_FN_DV_CLK, NULL); 1306 gpio_request(GPIO_FN_DV_VSYNC, NULL); 1307 gpio_request(GPIO_FN_DV_HSYNC, NULL); 1308 1309 /* AK8813 power / reset sequence */ 1310 gpio_request(GPIO_PTG4, NULL); 1311 gpio_request(GPIO_PTU3, NULL); 1312 /* Reset */ 1313 gpio_direction_output(GPIO_PTG4, 0); 1314 /* Power down */ 1315 gpio_direction_output(GPIO_PTU3, 1); 1316 1317 udelay(10); 1318 1319 /* Power up, reset */ 1320 gpio_set_value(GPIO_PTU3, 0); 1321 1322 udelay(10); 1323 1324 /* Remove reset */ 1325 gpio_set_value(GPIO_PTG4, 1); 1326 1327 return platform_add_devices(ecovec_devices, 1328 ARRAY_SIZE(ecovec_devices)); 1329 } 1330 arch_initcall(arch_setup); 1331 1332 static int __init devices_setup(void) 1333 { 1334 sh_eth_init(&sh_eth_plat); 1335 return 0; 1336 } 1337 device_initcall(devices_setup); 1338 1339 static struct sh_machine_vector mv_ecovec __initmv = { 1340 .mv_name = "R0P7724 (EcoVec)", 1341 }; 1342