1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2009 Renesas Solutions Corp.
4  *
5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6  */
7 #include <asm/clock.h>
8 #include <asm/heartbeat.h>
9 #include <asm/suspend.h>
10 #include <cpu/sh7724.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/i2c.h>
14 #include <linux/io.h>
15 #include <linux/init.h>
16 #include <linux/input.h>
17 #include <linux/input/sh_keysc.h>
18 #include <linux/interrupt.h>
19 #include <linux/memblock.h>
20 #include <linux/mfd/tmio.h>
21 #include <linux/mmc/host.h>
22 #include <linux/mmc/sh_mmcif.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/gpio.h>
25 #include <linux/gpio/machine.h>
26 #include <linux/platform_data/gpio_backlight.h>
27 #include <linux/platform_data/tsc2007.h>
28 #include <linux/platform_device.h>
29 #include <linux/regulator/fixed.h>
30 #include <linux/regulator/machine.h>
31 #include <linux/sh_eth.h>
32 #include <linux/sh_intc.h>
33 #include <linux/spi/mmc_spi.h>
34 #include <linux/spi/sh_msiof.h>
35 #include <linux/spi/spi.h>
36 #include <linux/usb/r8a66597.h>
37 #include <linux/usb/renesas_usbhs.h>
38 #include <linux/videodev2.h>
39 
40 #include <media/drv-intf/renesas-ceu.h>
41 #include <media/i2c/mt9t112.h>
42 #include <media/i2c/tw9910.h>
43 
44 #include <sound/sh_fsi.h>
45 #include <sound/simple_card.h>
46 
47 #include <video/sh_mobile_lcdc.h>
48 
49 /*
50  *  Address      Interface        BusWidth
51  *-----------------------------------------
52  *  0x0000_0000  uboot            16bit
53  *  0x0004_0000  Linux romImage   16bit
54  *  0x0014_0000  MTD for Linux    16bit
55  *  0x0400_0000  Internal I/O     16/32bit
56  *  0x0800_0000  DRAM             32bit
57  *  0x1800_0000  MFI              16bit
58  */
59 
60 /* SWITCH
61  *------------------------------
62  * DS2[1] = FlashROM write protect  ON     : write protect
63  *                                  OFF    : No write protect
64  * DS2[2] = RMII / TS, SCIF         ON     : RMII
65  *                                  OFF    : TS, SCIF3
66  * DS2[3] = Camera / Video          ON     : Camera
67  *                                  OFF    : NTSC/PAL (IN)
68  * DS2[5] = NTSC_OUT Clock          ON     : On board OSC
69  *                                  OFF    : SH7724 DV_CLK
70  * DS2[6-7] = MMC / SD              ON-OFF : SD
71  *                                  OFF-ON : MMC
72  */
73 
74 /*
75  * FSI - DA7210
76  *
77  * it needs amixer settings for playing
78  *
79  * amixer set 'HeadPhone' 80
80  * amixer set 'Out Mixer Left DAC Left' on
81  * amixer set 'Out Mixer Right DAC Right' on
82  */
83 
84 #define CEU_BUFFER_MEMORY_SIZE		(4 << 20)
85 static phys_addr_t ceu0_dma_membase;
86 static phys_addr_t ceu1_dma_membase;
87 
88 /* Heartbeat */
89 static unsigned char led_pos[] = { 0, 1, 2, 3 };
90 
91 static struct heartbeat_data heartbeat_data = {
92 	.nr_bits = 4,
93 	.bit_pos = led_pos,
94 };
95 
96 static struct resource heartbeat_resource = {
97 	.start  = 0xA405012C, /* PTG */
98 	.end    = 0xA405012E - 1,
99 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
100 };
101 
102 static struct platform_device heartbeat_device = {
103 	.name           = "heartbeat",
104 	.id             = -1,
105 	.dev = {
106 		.platform_data = &heartbeat_data,
107 	},
108 	.num_resources  = 1,
109 	.resource       = &heartbeat_resource,
110 };
111 
112 /* MTD */
113 static struct mtd_partition nor_flash_partitions[] = {
114 	{
115 		.name = "boot loader",
116 		.offset = 0,
117 		.size = (5 * 1024 * 1024),
118 		.mask_flags = MTD_WRITEABLE,  /* force read-only */
119 	}, {
120 		.name = "free-area",
121 		.offset = MTDPART_OFS_APPEND,
122 		.size = MTDPART_SIZ_FULL,
123 	},
124 };
125 
126 static struct physmap_flash_data nor_flash_data = {
127 	.width		= 2,
128 	.parts		= nor_flash_partitions,
129 	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
130 };
131 
132 static struct resource nor_flash_resources[] = {
133 	[0] = {
134 		.name	= "NOR Flash",
135 		.start	= 0x00000000,
136 		.end	= 0x03ffffff,
137 		.flags	= IORESOURCE_MEM,
138 	}
139 };
140 
141 static struct platform_device nor_flash_device = {
142 	.name		= "physmap-flash",
143 	.resource	= nor_flash_resources,
144 	.num_resources	= ARRAY_SIZE(nor_flash_resources),
145 	.dev		= {
146 		.platform_data = &nor_flash_data,
147 	},
148 };
149 
150 /* SH Eth */
151 #define SH_ETH_ADDR	(0xA4600000)
152 static struct resource sh_eth_resources[] = {
153 	[0] = {
154 		.start = SH_ETH_ADDR,
155 		.end   = SH_ETH_ADDR + 0x1FC,
156 		.flags = IORESOURCE_MEM,
157 	},
158 	[1] = {
159 		.start = evt2irq(0xd60),
160 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
161 	},
162 };
163 
164 static struct sh_eth_plat_data sh_eth_plat = {
165 	.phy = 0x1f, /* SMSC LAN8700 */
166 	.phy_interface = PHY_INTERFACE_MODE_MII,
167 	.ether_link_active_low = 1
168 };
169 
170 static struct platform_device sh_eth_device = {
171 	.name = "sh7724-ether",
172 	.id = 0,
173 	.dev = {
174 		.platform_data = &sh_eth_plat,
175 	},
176 	.num_resources = ARRAY_SIZE(sh_eth_resources),
177 	.resource = sh_eth_resources,
178 };
179 
180 /* USB0 host */
181 static void usb0_port_power(int port, int power)
182 {
183 	gpio_set_value(GPIO_PTB4, power);
184 }
185 
186 static struct r8a66597_platdata usb0_host_data = {
187 	.on_chip = 1,
188 	.port_power = usb0_port_power,
189 };
190 
191 static struct resource usb0_host_resources[] = {
192 	[0] = {
193 		.start	= 0xa4d80000,
194 		.end	= 0xa4d80124 - 1,
195 		.flags	= IORESOURCE_MEM,
196 	},
197 	[1] = {
198 		.start	= evt2irq(0xa20),
199 		.end	= evt2irq(0xa20),
200 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
201 	},
202 };
203 
204 static struct platform_device usb0_host_device = {
205 	.name		= "r8a66597_hcd",
206 	.id		= 0,
207 	.dev = {
208 		.dma_mask		= NULL,         /*  not use dma */
209 		.coherent_dma_mask	= 0xffffffff,
210 		.platform_data		= &usb0_host_data,
211 	},
212 	.num_resources	= ARRAY_SIZE(usb0_host_resources),
213 	.resource	= usb0_host_resources,
214 };
215 
216 /* USB1 host/function */
217 static void usb1_port_power(int port, int power)
218 {
219 	gpio_set_value(GPIO_PTB5, power);
220 }
221 
222 static struct r8a66597_platdata usb1_common_data = {
223 	.on_chip = 1,
224 	.port_power = usb1_port_power,
225 };
226 
227 static struct resource usb1_common_resources[] = {
228 	[0] = {
229 		.start	= 0xa4d90000,
230 		.end	= 0xa4d90124 - 1,
231 		.flags	= IORESOURCE_MEM,
232 	},
233 	[1] = {
234 		.start	= evt2irq(0xa40),
235 		.end	= evt2irq(0xa40),
236 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
237 	},
238 };
239 
240 static struct platform_device usb1_common_device = {
241 	/* .name will be added in arch_setup */
242 	.id		= 1,
243 	.dev = {
244 		.dma_mask		= NULL,         /*  not use dma */
245 		.coherent_dma_mask	= 0xffffffff,
246 		.platform_data		= &usb1_common_data,
247 	},
248 	.num_resources	= ARRAY_SIZE(usb1_common_resources),
249 	.resource	= usb1_common_resources,
250 };
251 
252 /*
253  * USBHS
254  */
255 static int usbhs_get_id(struct platform_device *pdev)
256 {
257 	return gpio_get_value(GPIO_PTB3);
258 }
259 
260 static int usbhs_phy_reset(struct platform_device *pdev)
261 {
262 	/* enable vbus if HOST */
263 	if (!gpio_get_value(GPIO_PTB3))
264 		gpio_set_value(GPIO_PTB5, 1);
265 
266 	return 0;
267 }
268 
269 static struct renesas_usbhs_platform_info usbhs_info = {
270 	.platform_callback = {
271 		.get_id		= usbhs_get_id,
272 		.phy_reset	= usbhs_phy_reset,
273 	},
274 	.driver_param = {
275 		.buswait_bwait		= 4,
276 		.detection_delay	= 5,
277 		.d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
278 		.d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
279 		.d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
280 		.d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
281 	},
282 };
283 
284 static struct resource usbhs_resources[] = {
285 	[0] = {
286 		.start	= 0xa4d90000,
287 		.end	= 0xa4d90124 - 1,
288 		.flags	= IORESOURCE_MEM,
289 	},
290 	[1] = {
291 		.start	= evt2irq(0xa40),
292 		.end	= evt2irq(0xa40),
293 		.flags	= IORESOURCE_IRQ,
294 	},
295 };
296 
297 static struct platform_device usbhs_device = {
298 	.name	= "renesas_usbhs",
299 	.id	= 1,
300 	.dev = {
301 		.dma_mask		= NULL,         /*  not use dma */
302 		.coherent_dma_mask	= 0xffffffff,
303 		.platform_data		= &usbhs_info,
304 	},
305 	.num_resources	= ARRAY_SIZE(usbhs_resources),
306 	.resource	= usbhs_resources,
307 };
308 
309 /* LCDC and backlight */
310 static const struct fb_videomode ecovec_lcd_modes[] = {
311 	{
312 		.name		= "Panel",
313 		.xres		= 800,
314 		.yres		= 480,
315 		.left_margin	= 220,
316 		.right_margin	= 110,
317 		.hsync_len	= 70,
318 		.upper_margin	= 20,
319 		.lower_margin	= 5,
320 		.vsync_len	= 5,
321 		.sync		= 0, /* hsync and vsync are active low */
322 	},
323 };
324 
325 static const struct fb_videomode ecovec_dvi_modes[] = {
326 	{
327 		.name		= "DVI",
328 		.xres		= 1280,
329 		.yres		= 720,
330 		.left_margin	= 220,
331 		.right_margin	= 110,
332 		.hsync_len	= 40,
333 		.upper_margin	= 20,
334 		.lower_margin	= 5,
335 		.vsync_len	= 5,
336 		.sync = 0, /* hsync and vsync are active low */
337 	},
338 };
339 
340 static struct sh_mobile_lcdc_info lcdc_info = {
341 	.ch[0] = {
342 		.interface_type = RGB18,
343 		.chan = LCDC_CHAN_MAINLCD,
344 		.fourcc = V4L2_PIX_FMT_RGB565,
345 		.panel_cfg = { /* 7.0 inch */
346 			.width = 152,
347 			.height = 91,
348 		},
349 	}
350 };
351 
352 static struct resource lcdc_resources[] = {
353 	[0] = {
354 		.name	= "LCDC",
355 		.start	= 0xfe940000,
356 		.end	= 0xfe942fff,
357 		.flags	= IORESOURCE_MEM,
358 	},
359 	[1] = {
360 		.start	= evt2irq(0xf40),
361 		.flags	= IORESOURCE_IRQ,
362 	},
363 };
364 
365 static struct platform_device lcdc_device = {
366 	.name		= "sh_mobile_lcdc_fb",
367 	.num_resources	= ARRAY_SIZE(lcdc_resources),
368 	.resource	= lcdc_resources,
369 	.dev		= {
370 		.platform_data	= &lcdc_info,
371 	},
372 };
373 
374 static struct gpio_backlight_platform_data gpio_backlight_data = {
375 	.fbdev = &lcdc_device.dev,
376 	.gpio = GPIO_PTR1,
377 	.def_value = 1,
378 	.name = "backlight",
379 };
380 
381 static struct platform_device gpio_backlight_device = {
382 	.name = "gpio-backlight",
383 	.dev = {
384 		.platform_data = &gpio_backlight_data,
385 	},
386 };
387 
388 /* CEU0 */
389 static struct ceu_platform_data ceu0_pdata = {
390 	.num_subdevs			= 2,
391 	.subdevs = {
392 		{ /* [0] = mt9t112  */
393 			.flags		= 0,
394 			.bus_width	= 8,
395 			.bus_shift	= 0,
396 			.i2c_adapter_id	= 0,
397 			.i2c_address	= 0x3c,
398 		},
399 		{ /* [1] = tw9910  */
400 			.flags		= 0,
401 			.bus_width	= 8,
402 			.bus_shift	= 0,
403 			.i2c_adapter_id	= 0,
404 			.i2c_address	= 0x45,
405 		},
406 	},
407 };
408 
409 static struct resource ceu0_resources[] = {
410 	[0] = {
411 		.name	= "CEU0",
412 		.start	= 0xfe910000,
413 		.end	= 0xfe91009f,
414 		.flags	= IORESOURCE_MEM,
415 	},
416 	[1] = {
417 		.start  = evt2irq(0x880),
418 		.flags  = IORESOURCE_IRQ,
419 	},
420 };
421 
422 static struct platform_device ceu0_device = {
423 	.name		= "renesas-ceu",
424 	.id             = 0, /* ceu.0 */
425 	.num_resources	= ARRAY_SIZE(ceu0_resources),
426 	.resource	= ceu0_resources,
427 	.dev	= {
428 		.platform_data	= &ceu0_pdata,
429 	},
430 };
431 
432 /* CEU1 */
433 static struct ceu_platform_data ceu1_pdata = {
434 	.num_subdevs			= 1,
435 	.subdevs = {
436 		{ /* [0] = mt9t112  */
437 			.flags		= 0,
438 			.bus_width	= 8,
439 			.bus_shift	= 0,
440 			.i2c_adapter_id	= 1,
441 			.i2c_address	= 0x3c,
442 		},
443 	},
444 };
445 
446 static struct resource ceu1_resources[] = {
447 	[0] = {
448 		.name	= "CEU1",
449 		.start	= 0xfe914000,
450 		.end	= 0xfe91409f,
451 		.flags	= IORESOURCE_MEM,
452 	},
453 	[1] = {
454 		.start  = evt2irq(0x9e0),
455 		.flags  = IORESOURCE_IRQ,
456 	},
457 };
458 
459 static struct platform_device ceu1_device = {
460 	.name		= "renesas-ceu",
461 	.id             = 1, /* ceu.1 */
462 	.num_resources	= ARRAY_SIZE(ceu1_resources),
463 	.resource	= ceu1_resources,
464 	.dev	= {
465 		.platform_data	= &ceu1_pdata,
466 	},
467 };
468 
469 /* Power up/down GPIOs for camera devices and video decoder */
470 static struct gpiod_lookup_table tw9910_gpios = {
471 	.dev_id		= "0-0045",
472 	.table		= {
473 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTU2, "pdn", GPIO_ACTIVE_HIGH),
474 	},
475 };
476 
477 static struct gpiod_lookup_table mt9t112_0_gpios = {
478 	.dev_id		= "0-003c",
479 	.table		= {
480 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTA3, "standby",
481 			    GPIO_ACTIVE_HIGH),
482 	},
483 };
484 
485 static struct gpiod_lookup_table mt9t112_1_gpios = {
486 	.dev_id		= "1-003c",
487 	.table		= {
488 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTA4, "standby",
489 			    GPIO_ACTIVE_HIGH),
490 	},
491 };
492 
493 /* I2C device */
494 static struct tw9910_video_info tw9910_info = {
495 	.buswidth	= 8,
496 	.mpout		= TW9910_MPO_FIELD,
497 };
498 
499 static struct mt9t112_platform_data mt9t112_0_pdata = {
500 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE,
501 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
502 };
503 
504 static struct mt9t112_platform_data mt9t112_1_pdata = {
505 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE,
506 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
507 };
508 
509 static struct i2c_board_info i2c0_devices[] = {
510 	{
511 		I2C_BOARD_INFO("da7210", 0x1a),
512 	},
513 	{
514 		I2C_BOARD_INFO("tw9910", 0x45),
515 		.platform_data = &tw9910_info,
516 	},
517 	{
518 		/* 1st camera */
519 		I2C_BOARD_INFO("mt9t112", 0x3c),
520 		.platform_data = &mt9t112_0_pdata,
521 	},
522 };
523 
524 static struct i2c_board_info i2c1_devices[] = {
525 	{
526 		I2C_BOARD_INFO("r2025sd", 0x32),
527 	},
528 	{
529 		I2C_BOARD_INFO("lis3lv02d", 0x1c),
530 		.irq = evt2irq(0x620),
531 	},
532 	{
533 		/* 2nd camera */
534 		I2C_BOARD_INFO("mt9t112", 0x3c),
535 		.platform_data = &mt9t112_1_pdata,
536 	},
537 };
538 
539 /* KEYSC */
540 static struct sh_keysc_info keysc_info = {
541 	.mode		= SH_KEYSC_MODE_1,
542 	.scan_timing	= 3,
543 	.delay		= 50,
544 	.kycr2_delay	= 100,
545 	.keycodes	= { KEY_1, 0, 0, 0, 0,
546 			    KEY_2, 0, 0, 0, 0,
547 			    KEY_3, 0, 0, 0, 0,
548 			    KEY_4, 0, 0, 0, 0,
549 			    KEY_5, 0, 0, 0, 0,
550 			    KEY_6, 0, 0, 0, 0, },
551 };
552 
553 static struct resource keysc_resources[] = {
554 	[0] = {
555 		.name	= "KEYSC",
556 		.start  = 0x044b0000,
557 		.end    = 0x044b000f,
558 		.flags  = IORESOURCE_MEM,
559 	},
560 	[1] = {
561 		.start  = evt2irq(0xbe0),
562 		.flags  = IORESOURCE_IRQ,
563 	},
564 };
565 
566 static struct platform_device keysc_device = {
567 	.name           = "sh_keysc",
568 	.id             = 0, /* keysc0 clock */
569 	.num_resources  = ARRAY_SIZE(keysc_resources),
570 	.resource       = keysc_resources,
571 	.dev	= {
572 		.platform_data	= &keysc_info,
573 	},
574 };
575 
576 /* TouchScreen */
577 #define IRQ0 evt2irq(0x600)
578 
579 static int ts_get_pendown_state(struct device *dev)
580 {
581 	int val = 0;
582 	gpio_free(GPIO_FN_INTC_IRQ0);
583 	gpio_request(GPIO_PTZ0, NULL);
584 	gpio_direction_input(GPIO_PTZ0);
585 
586 	val = gpio_get_value(GPIO_PTZ0);
587 
588 	gpio_free(GPIO_PTZ0);
589 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
590 
591 	return val ? 0 : 1;
592 }
593 
594 static int ts_init(void)
595 {
596 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
597 	return 0;
598 }
599 
600 static struct tsc2007_platform_data tsc2007_info = {
601 	.model			= 2007,
602 	.x_plate_ohms		= 180,
603 	.get_pendown_state	= ts_get_pendown_state,
604 	.init_platform_hw	= ts_init,
605 };
606 
607 static struct i2c_board_info ts_i2c_clients = {
608 	I2C_BOARD_INFO("tsc2007", 0x48),
609 	.type		= "tsc2007",
610 	.platform_data	= &tsc2007_info,
611 	.irq		= IRQ0,
612 };
613 
614 static struct regulator_consumer_supply cn12_power_consumers[] =
615 {
616 	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
617 	REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
618 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
619 	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
620 };
621 
622 static struct regulator_init_data cn12_power_init_data = {
623 	.constraints = {
624 		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
625 	},
626 	.num_consumer_supplies  = ARRAY_SIZE(cn12_power_consumers),
627 	.consumer_supplies      = cn12_power_consumers,
628 };
629 
630 static struct fixed_voltage_config cn12_power_info = {
631 	.supply_name = "CN12 SD/MMC Vdd",
632 	.microvolts = 3300000,
633 	.init_data = &cn12_power_init_data,
634 };
635 
636 static struct platform_device cn12_power = {
637 	.name = "reg-fixed-voltage",
638 	.id   = 0,
639 	.dev  = {
640 		.platform_data = &cn12_power_info,
641 	},
642 };
643 
644 static struct gpiod_lookup_table cn12_power_gpiod_table = {
645 	.dev_id = "reg-fixed-voltage.0",
646 	.table = {
647 		/* Offset 7 on port B */
648 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTB7,
649 			    NULL, GPIO_ACTIVE_HIGH),
650 		{ },
651 	},
652 };
653 
654 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
655 /* SDHI0 */
656 static struct regulator_consumer_supply sdhi0_power_consumers[] =
657 {
658 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
659 	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
660 };
661 
662 static struct regulator_init_data sdhi0_power_init_data = {
663 	.constraints = {
664 		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
665 	},
666 	.num_consumer_supplies  = ARRAY_SIZE(sdhi0_power_consumers),
667 	.consumer_supplies      = sdhi0_power_consumers,
668 };
669 
670 static struct fixed_voltage_config sdhi0_power_info = {
671 	.supply_name = "CN11 SD/MMC Vdd",
672 	.microvolts = 3300000,
673 	.init_data = &sdhi0_power_init_data,
674 };
675 
676 static struct platform_device sdhi0_power = {
677 	.name = "reg-fixed-voltage",
678 	.id   = 1,
679 	.dev  = {
680 		.platform_data = &sdhi0_power_info,
681 	},
682 };
683 
684 static struct gpiod_lookup_table sdhi0_power_gpiod_table = {
685 	.dev_id = "reg-fixed-voltage.1",
686 	.table = {
687 		/* Offset 6 on port B */
688 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTB6,
689 			    NULL, GPIO_ACTIVE_HIGH),
690 		{ },
691 	},
692 };
693 
694 static struct gpiod_lookup_table sdhi0_gpio_table = {
695 	.dev_id = "sh_mobile_sdhi.0",
696 	.table = {
697 		/* Card detect */
698 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTY7, "cd", GPIO_ACTIVE_LOW),
699 		{ },
700 	},
701 };
702 
703 static struct tmio_mmc_data sdhi0_info = {
704 	.chan_priv_tx	= (void *)SHDMA_SLAVE_SDHI0_TX,
705 	.chan_priv_rx	= (void *)SHDMA_SLAVE_SDHI0_RX,
706 	.capabilities	= MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
707 			  MMC_CAP_NEEDS_POLL,
708 };
709 
710 static struct resource sdhi0_resources[] = {
711 	[0] = {
712 		.name	= "SDHI0",
713 		.start  = 0x04ce0000,
714 		.end    = 0x04ce00ff,
715 		.flags  = IORESOURCE_MEM,
716 	},
717 	[1] = {
718 		.start  = evt2irq(0xe80),
719 		.flags  = IORESOURCE_IRQ,
720 	},
721 };
722 
723 static struct platform_device sdhi0_device = {
724 	.name           = "sh_mobile_sdhi",
725 	.num_resources  = ARRAY_SIZE(sdhi0_resources),
726 	.resource       = sdhi0_resources,
727 	.id             = 0,
728 	.dev	= {
729 		.platform_data	= &sdhi0_info,
730 	},
731 };
732 
733 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
734 /* SDHI1 */
735 static struct tmio_mmc_data sdhi1_info = {
736 	.chan_priv_tx	= (void *)SHDMA_SLAVE_SDHI1_TX,
737 	.chan_priv_rx	= (void *)SHDMA_SLAVE_SDHI1_RX,
738 	.capabilities	= MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
739 			  MMC_CAP_NEEDS_POLL,
740 };
741 
742 static struct gpiod_lookup_table sdhi1_gpio_table = {
743 	.dev_id = "sh_mobile_sdhi.1",
744 	.table = {
745 		/* Card detect */
746 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTW7, "cd", GPIO_ACTIVE_LOW),
747 		{ },
748 	},
749 };
750 
751 static struct resource sdhi1_resources[] = {
752 	[0] = {
753 		.name	= "SDHI1",
754 		.start  = 0x04cf0000,
755 		.end    = 0x04cf00ff,
756 		.flags  = IORESOURCE_MEM,
757 	},
758 	[1] = {
759 		.start  = evt2irq(0x4e0),
760 		.flags  = IORESOURCE_IRQ,
761 	},
762 };
763 
764 static struct platform_device sdhi1_device = {
765 	.name           = "sh_mobile_sdhi",
766 	.num_resources  = ARRAY_SIZE(sdhi1_resources),
767 	.resource       = sdhi1_resources,
768 	.id             = 1,
769 	.dev	= {
770 		.platform_data	= &sdhi1_info,
771 	},
772 };
773 #endif /* CONFIG_MMC_SH_MMCIF */
774 
775 #else
776 
777 /* MMC SPI */
778 static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
779 {
780 	gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
781 }
782 
783 static struct mmc_spi_platform_data mmc_spi_info = {
784 	.caps = MMC_CAP_NEEDS_POLL,
785 	.caps2 = MMC_CAP2_RO_ACTIVE_HIGH,
786 	.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
787 	.setpower = mmc_spi_setpower,
788 };
789 
790 static struct gpiod_lookup_table mmc_spi_gpio_table = {
791 	.dev_id = "mmc_spi.0", /* device "mmc_spi" @ CS0 */
792 	.table = {
793 		/* Card detect */
794 		GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY7, NULL, 0,
795 				GPIO_ACTIVE_LOW),
796 		/* Write protect */
797 		GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY6, NULL, 1,
798 				GPIO_ACTIVE_HIGH),
799 		{ },
800 	},
801 };
802 
803 static struct spi_board_info spi_bus[] = {
804 	{
805 		.modalias	= "mmc_spi",
806 		.platform_data	= &mmc_spi_info,
807 		.max_speed_hz	= 5000000,
808 		.mode		= SPI_MODE_0,
809 	},
810 };
811 
812 /* MSIOF0 */
813 static struct sh_msiof_spi_info msiof0_data = {
814 	.num_chipselect = 1,
815 };
816 
817 static struct resource msiof0_resources[] = {
818 	[0] = {
819 		.name	= "MSIOF0",
820 		.start	= 0xa4c40000,
821 		.end	= 0xa4c40063,
822 		.flags	= IORESOURCE_MEM,
823 	},
824 	[1] = {
825 		.start	= evt2irq(0xc80),
826 		.flags	= IORESOURCE_IRQ,
827 	},
828 };
829 
830 static struct platform_device msiof0_device = {
831 	.name		= "spi_sh_msiof",
832 	.id		= 0, /* MSIOF0 */
833 	.dev = {
834 		.platform_data = &msiof0_data,
835 	},
836 	.num_resources	= ARRAY_SIZE(msiof0_resources),
837 	.resource	= msiof0_resources,
838 };
839 
840 static struct gpiod_lookup_table msiof_gpio_table = {
841 	.dev_id = "spi_sh_msiof.0",
842 	.table = {
843 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTM4, "cs", GPIO_ACTIVE_HIGH),
844 		{ },
845 	},
846 };
847 
848 #endif
849 
850 /* FSI */
851 static struct resource fsi_resources[] = {
852 	[0] = {
853 		.name	= "FSI",
854 		.start	= 0xFE3C0000,
855 		.end	= 0xFE3C021d,
856 		.flags	= IORESOURCE_MEM,
857 	},
858 	[1] = {
859 		.start  = evt2irq(0xf80),
860 		.flags  = IORESOURCE_IRQ,
861 	},
862 };
863 
864 static struct platform_device fsi_device = {
865 	.name		= "sh_fsi",
866 	.id		= 0,
867 	.num_resources	= ARRAY_SIZE(fsi_resources),
868 	.resource	= fsi_resources,
869 };
870 
871 static struct asoc_simple_card_info fsi_da7210_info = {
872 	.name		= "DA7210",
873 	.card		= "FSIB-DA7210",
874 	.codec		= "da7210.0-001a",
875 	.platform	= "sh_fsi.0",
876 	.daifmt		= SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
877 	.cpu_dai = {
878 		.name	= "fsib-dai",
879 	},
880 	.codec_dai = {
881 		.name	= "da7210-hifi",
882 	},
883 };
884 
885 static struct platform_device fsi_da7210_device = {
886 	.name	= "asoc-simple-card",
887 	.dev	= {
888 		.platform_data	= &fsi_da7210_info,
889 		.coherent_dma_mask = DMA_BIT_MASK(32),
890 		.dma_mask = &fsi_da7210_device.dev.coherent_dma_mask,
891 	},
892 };
893 
894 
895 /* IrDA */
896 static struct resource irda_resources[] = {
897 	[0] = {
898 		.name	= "IrDA",
899 		.start  = 0xA45D0000,
900 		.end    = 0xA45D0049,
901 		.flags  = IORESOURCE_MEM,
902 	},
903 	[1] = {
904 		.start  = evt2irq(0x480),
905 		.flags  = IORESOURCE_IRQ,
906 	},
907 };
908 
909 static struct platform_device irda_device = {
910 	.name           = "sh_sir",
911 	.num_resources  = ARRAY_SIZE(irda_resources),
912 	.resource       = irda_resources,
913 };
914 
915 #include <media/i2c/ak881x.h>
916 #include <media/drv-intf/sh_vou.h>
917 
918 static struct ak881x_pdata ak881x_pdata = {
919 	.flags = AK881X_IF_MODE_SLAVE,
920 };
921 
922 static struct i2c_board_info ak8813 = {
923 	I2C_BOARD_INFO("ak8813", 0x20),
924 	.platform_data = &ak881x_pdata,
925 };
926 
927 static struct sh_vou_pdata sh_vou_pdata = {
928 	.bus_fmt	= SH_VOU_BUS_8BIT,
929 	.flags		= SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
930 	.board_info	= &ak8813,
931 	.i2c_adap	= 0,
932 };
933 
934 static struct resource sh_vou_resources[] = {
935 	[0] = {
936 		.start  = 0xfe960000,
937 		.end    = 0xfe962043,
938 		.flags  = IORESOURCE_MEM,
939 	},
940 	[1] = {
941 		.start  = evt2irq(0x8e0),
942 		.flags  = IORESOURCE_IRQ,
943 	},
944 };
945 
946 static struct platform_device vou_device = {
947 	.name           = "sh-vou",
948 	.id		= -1,
949 	.num_resources  = ARRAY_SIZE(sh_vou_resources),
950 	.resource       = sh_vou_resources,
951 	.dev		= {
952 		.platform_data	= &sh_vou_pdata,
953 	},
954 };
955 
956 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
957 /* SH_MMCIF */
958 static struct resource sh_mmcif_resources[] = {
959 	[0] = {
960 		.name	= "SH_MMCIF",
961 		.start	= 0xA4CA0000,
962 		.end	= 0xA4CA00FF,
963 		.flags	= IORESOURCE_MEM,
964 	},
965 	[1] = {
966 		/* MMC2I */
967 		.start	= evt2irq(0x5a0),
968 		.flags	= IORESOURCE_IRQ,
969 	},
970 	[2] = {
971 		/* MMC3I */
972 		.start	= evt2irq(0x5c0),
973 		.flags	= IORESOURCE_IRQ,
974 	},
975 };
976 
977 static struct sh_mmcif_plat_data sh_mmcif_plat = {
978 	.sup_pclk	= 0, /* SH7724: Max Pclk/2 */
979 	.caps		= MMC_CAP_4_BIT_DATA |
980 			  MMC_CAP_8_BIT_DATA |
981 			  MMC_CAP_NEEDS_POLL,
982 	.ocr		= MMC_VDD_32_33 | MMC_VDD_33_34,
983 };
984 
985 static struct platform_device sh_mmcif_device = {
986 	.name		= "sh_mmcif",
987 	.id		= 0,
988 	.dev		= {
989 		.platform_data		= &sh_mmcif_plat,
990 	},
991 	.num_resources	= ARRAY_SIZE(sh_mmcif_resources),
992 	.resource	= sh_mmcif_resources,
993 };
994 #endif
995 
996 static struct platform_device *ecovec_ceu_devices[] __initdata = {
997 	&ceu0_device,
998 	&ceu1_device,
999 };
1000 
1001 static struct platform_device *ecovec_devices[] __initdata = {
1002 	&heartbeat_device,
1003 	&nor_flash_device,
1004 	&sh_eth_device,
1005 	&usb0_host_device,
1006 	&usb1_common_device,
1007 	&usbhs_device,
1008 	&lcdc_device,
1009 	&gpio_backlight_device,
1010 	&keysc_device,
1011 	&cn12_power,
1012 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1013 	&sdhi0_power,
1014 	&sdhi0_device,
1015 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1016 	&sdhi1_device,
1017 #endif
1018 #else
1019 	&msiof0_device,
1020 #endif
1021 	&fsi_device,
1022 	&fsi_da7210_device,
1023 	&irda_device,
1024 	&vou_device,
1025 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1026 	&sh_mmcif_device,
1027 #endif
1028 };
1029 
1030 #ifdef CONFIG_I2C
1031 #define EEPROM_ADDR 0x50
1032 static u8 mac_read(struct i2c_adapter *a, u8 command)
1033 {
1034 	struct i2c_msg msg[2];
1035 	u8 buf;
1036 	int ret;
1037 
1038 	msg[0].addr  = EEPROM_ADDR;
1039 	msg[0].flags = 0;
1040 	msg[0].len   = 1;
1041 	msg[0].buf   = &command;
1042 
1043 	msg[1].addr  = EEPROM_ADDR;
1044 	msg[1].flags = I2C_M_RD;
1045 	msg[1].len   = 1;
1046 	msg[1].buf   = &buf;
1047 
1048 	ret = i2c_transfer(a, msg, 2);
1049 	if (ret < 0) {
1050 		printk(KERN_ERR "error %d\n", ret);
1051 		buf = 0xff;
1052 	}
1053 
1054 	return buf;
1055 }
1056 
1057 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1058 {
1059 	struct i2c_adapter *a = i2c_get_adapter(1);
1060 	int i;
1061 
1062 	if (!a) {
1063 		pr_err("can not get I2C 1\n");
1064 		return;
1065 	}
1066 
1067 	/* read MAC address from EEPROM */
1068 	for (i = 0; i < sizeof(pd->mac_addr); i++) {
1069 		pd->mac_addr[i] = mac_read(a, 0x10 + i);
1070 		msleep(10);
1071 	}
1072 
1073 	i2c_put_adapter(a);
1074 }
1075 #else
1076 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1077 {
1078 	pr_err("unable to read sh_eth MAC address\n");
1079 }
1080 #endif
1081 
1082 #define PORT_HIZA 0xA4050158
1083 #define IODRIVEA  0xA405018A
1084 
1085 extern char ecovec24_sdram_enter_start;
1086 extern char ecovec24_sdram_enter_end;
1087 extern char ecovec24_sdram_leave_start;
1088 extern char ecovec24_sdram_leave_end;
1089 
1090 static int __init arch_setup(void)
1091 {
1092 	struct clk *clk;
1093 	bool cn12_enabled = false;
1094 
1095 	/* register board specific self-refresh code */
1096 	sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1097 					SUSP_SH_RSTANDBY,
1098 					&ecovec24_sdram_enter_start,
1099 					&ecovec24_sdram_enter_end,
1100 					&ecovec24_sdram_leave_start,
1101 					&ecovec24_sdram_leave_end);
1102 
1103 	/* enable STATUS0, STATUS2 and PDSTATUS */
1104 	gpio_request(GPIO_FN_STATUS0, NULL);
1105 	gpio_request(GPIO_FN_STATUS2, NULL);
1106 	gpio_request(GPIO_FN_PDSTATUS, NULL);
1107 
1108 	/* enable SCIFA0 */
1109 	gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1110 	gpio_request(GPIO_FN_SCIF0_RXD, NULL);
1111 
1112 	/* enable debug LED */
1113 	gpio_request(GPIO_PTG0, NULL);
1114 	gpio_request(GPIO_PTG1, NULL);
1115 	gpio_request(GPIO_PTG2, NULL);
1116 	gpio_request(GPIO_PTG3, NULL);
1117 	gpio_direction_output(GPIO_PTG0, 0);
1118 	gpio_direction_output(GPIO_PTG1, 0);
1119 	gpio_direction_output(GPIO_PTG2, 0);
1120 	gpio_direction_output(GPIO_PTG3, 0);
1121 	__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
1122 
1123 	/* enable SH-Eth */
1124 	gpio_request(GPIO_PTA1, NULL);
1125 	gpio_direction_output(GPIO_PTA1, 1);
1126 	mdelay(20);
1127 
1128 	gpio_request(GPIO_FN_RMII_RXD0,    NULL);
1129 	gpio_request(GPIO_FN_RMII_RXD1,    NULL);
1130 	gpio_request(GPIO_FN_RMII_TXD0,    NULL);
1131 	gpio_request(GPIO_FN_RMII_TXD1,    NULL);
1132 	gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1133 	gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
1134 	gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
1135 	gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
1136 	gpio_request(GPIO_FN_MDIO,         NULL);
1137 	gpio_request(GPIO_FN_MDC,          NULL);
1138 	gpio_request(GPIO_FN_LNKSTA,       NULL);
1139 
1140 	/* enable USB */
1141 	__raw_writew(0x0000, 0xA4D80000);
1142 	__raw_writew(0x0000, 0xA4D90000);
1143 	gpio_request(GPIO_PTB3,  NULL);
1144 	gpio_request(GPIO_PTB4,  NULL);
1145 	gpio_request(GPIO_PTB5,  NULL);
1146 	gpio_direction_input(GPIO_PTB3);
1147 	gpio_direction_output(GPIO_PTB4, 0);
1148 	gpio_direction_output(GPIO_PTB5, 0);
1149 	__raw_writew(0x0600, 0xa40501d4);
1150 	__raw_writew(0x0600, 0xa4050192);
1151 
1152 	if (gpio_get_value(GPIO_PTB3)) {
1153 		printk(KERN_INFO "USB1 function is selected\n");
1154 		usb1_common_device.name = "r8a66597_udc";
1155 	} else {
1156 		printk(KERN_INFO "USB1 host is selected\n");
1157 		usb1_common_device.name = "r8a66597_hcd";
1158 	}
1159 
1160 	/* enable LCDC */
1161 	gpio_request(GPIO_FN_LCDD23,   NULL);
1162 	gpio_request(GPIO_FN_LCDD22,   NULL);
1163 	gpio_request(GPIO_FN_LCDD21,   NULL);
1164 	gpio_request(GPIO_FN_LCDD20,   NULL);
1165 	gpio_request(GPIO_FN_LCDD19,   NULL);
1166 	gpio_request(GPIO_FN_LCDD18,   NULL);
1167 	gpio_request(GPIO_FN_LCDD17,   NULL);
1168 	gpio_request(GPIO_FN_LCDD16,   NULL);
1169 	gpio_request(GPIO_FN_LCDD15,   NULL);
1170 	gpio_request(GPIO_FN_LCDD14,   NULL);
1171 	gpio_request(GPIO_FN_LCDD13,   NULL);
1172 	gpio_request(GPIO_FN_LCDD12,   NULL);
1173 	gpio_request(GPIO_FN_LCDD11,   NULL);
1174 	gpio_request(GPIO_FN_LCDD10,   NULL);
1175 	gpio_request(GPIO_FN_LCDD9,    NULL);
1176 	gpio_request(GPIO_FN_LCDD8,    NULL);
1177 	gpio_request(GPIO_FN_LCDD7,    NULL);
1178 	gpio_request(GPIO_FN_LCDD6,    NULL);
1179 	gpio_request(GPIO_FN_LCDD5,    NULL);
1180 	gpio_request(GPIO_FN_LCDD4,    NULL);
1181 	gpio_request(GPIO_FN_LCDD3,    NULL);
1182 	gpio_request(GPIO_FN_LCDD2,    NULL);
1183 	gpio_request(GPIO_FN_LCDD1,    NULL);
1184 	gpio_request(GPIO_FN_LCDD0,    NULL);
1185 	gpio_request(GPIO_FN_LCDDISP,  NULL);
1186 	gpio_request(GPIO_FN_LCDHSYN,  NULL);
1187 	gpio_request(GPIO_FN_LCDDCK,   NULL);
1188 	gpio_request(GPIO_FN_LCDVSYN,  NULL);
1189 	gpio_request(GPIO_FN_LCDDON,   NULL);
1190 	gpio_request(GPIO_FN_LCDLCLK,  NULL);
1191 	__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
1192 
1193 	gpio_request(GPIO_PTE6, NULL);
1194 	gpio_request(GPIO_PTU1, NULL);
1195 	gpio_request(GPIO_PTA2, NULL);
1196 	gpio_direction_input(GPIO_PTE6);
1197 	gpio_direction_output(GPIO_PTU1, 0);
1198 	gpio_direction_output(GPIO_PTA2, 0);
1199 
1200 	/* I/O buffer drive ability is high */
1201 	__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
1202 
1203 	if (gpio_get_value(GPIO_PTE6)) {
1204 		/* DVI */
1205 		lcdc_info.clock_source			= LCDC_CLK_EXTERNAL;
1206 		lcdc_info.ch[0].clock_divider		= 1;
1207 		lcdc_info.ch[0].lcd_modes		= ecovec_dvi_modes;
1208 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_dvi_modes);
1209 
1210 		/* No backlight */
1211 		gpio_backlight_data.fbdev = NULL;
1212 
1213 		gpio_set_value(GPIO_PTA2, 1);
1214 		gpio_set_value(GPIO_PTU1, 1);
1215 	} else {
1216 		/* Panel */
1217 		lcdc_info.clock_source			= LCDC_CLK_PERIPHERAL;
1218 		lcdc_info.ch[0].clock_divider		= 2;
1219 		lcdc_info.ch[0].lcd_modes		= ecovec_lcd_modes;
1220 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_lcd_modes);
1221 
1222 		/* FIXME
1223 		 *
1224 		 * LCDDON control is needed for Panel,
1225 		 * but current sh_mobile_lcdc driver doesn't control it.
1226 		 * It is temporary correspondence
1227 		 */
1228 		gpio_request(GPIO_PTF4, NULL);
1229 		gpio_direction_output(GPIO_PTF4, 1);
1230 
1231 		/* enable TouchScreen */
1232 		i2c_register_board_info(0, &ts_i2c_clients, 1);
1233 		irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
1234 	}
1235 
1236 	/* enable CEU0 */
1237 	gpio_request(GPIO_FN_VIO0_D15, NULL);
1238 	gpio_request(GPIO_FN_VIO0_D14, NULL);
1239 	gpio_request(GPIO_FN_VIO0_D13, NULL);
1240 	gpio_request(GPIO_FN_VIO0_D12, NULL);
1241 	gpio_request(GPIO_FN_VIO0_D11, NULL);
1242 	gpio_request(GPIO_FN_VIO0_D10, NULL);
1243 	gpio_request(GPIO_FN_VIO0_D9,  NULL);
1244 	gpio_request(GPIO_FN_VIO0_D8,  NULL);
1245 	gpio_request(GPIO_FN_VIO0_D7,  NULL);
1246 	gpio_request(GPIO_FN_VIO0_D6,  NULL);
1247 	gpio_request(GPIO_FN_VIO0_D5,  NULL);
1248 	gpio_request(GPIO_FN_VIO0_D4,  NULL);
1249 	gpio_request(GPIO_FN_VIO0_D3,  NULL);
1250 	gpio_request(GPIO_FN_VIO0_D2,  NULL);
1251 	gpio_request(GPIO_FN_VIO0_D1,  NULL);
1252 	gpio_request(GPIO_FN_VIO0_D0,  NULL);
1253 	gpio_request(GPIO_FN_VIO0_VD,  NULL);
1254 	gpio_request(GPIO_FN_VIO0_CLK, NULL);
1255 	gpio_request(GPIO_FN_VIO0_FLD, NULL);
1256 	gpio_request(GPIO_FN_VIO0_HD,  NULL);
1257 
1258 	/* enable CEU1 */
1259 	gpio_request(GPIO_FN_VIO1_D7,  NULL);
1260 	gpio_request(GPIO_FN_VIO1_D6,  NULL);
1261 	gpio_request(GPIO_FN_VIO1_D5,  NULL);
1262 	gpio_request(GPIO_FN_VIO1_D4,  NULL);
1263 	gpio_request(GPIO_FN_VIO1_D3,  NULL);
1264 	gpio_request(GPIO_FN_VIO1_D2,  NULL);
1265 	gpio_request(GPIO_FN_VIO1_D1,  NULL);
1266 	gpio_request(GPIO_FN_VIO1_D0,  NULL);
1267 	gpio_request(GPIO_FN_VIO1_FLD, NULL);
1268 	gpio_request(GPIO_FN_VIO1_HD,  NULL);
1269 	gpio_request(GPIO_FN_VIO1_VD,  NULL);
1270 	gpio_request(GPIO_FN_VIO1_CLK, NULL);
1271 
1272 	/* enable KEYSC */
1273 	gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1274 	gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1275 	gpio_request(GPIO_FN_KEYOUT3,     NULL);
1276 	gpio_request(GPIO_FN_KEYOUT2,     NULL);
1277 	gpio_request(GPIO_FN_KEYOUT1,     NULL);
1278 	gpio_request(GPIO_FN_KEYOUT0,     NULL);
1279 	gpio_request(GPIO_FN_KEYIN0,      NULL);
1280 
1281 	/* enable user debug switch */
1282 	gpio_request(GPIO_PTR0, NULL);
1283 	gpio_request(GPIO_PTR4, NULL);
1284 	gpio_request(GPIO_PTR5, NULL);
1285 	gpio_request(GPIO_PTR6, NULL);
1286 	gpio_direction_input(GPIO_PTR0);
1287 	gpio_direction_input(GPIO_PTR4);
1288 	gpio_direction_input(GPIO_PTR5);
1289 	gpio_direction_input(GPIO_PTR6);
1290 
1291 	/* SD-card slot CN11 */
1292 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1293 	/* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1294 	gpio_request(GPIO_FN_SDHI0WP,  NULL);
1295 	gpio_request(GPIO_FN_SDHI0CMD, NULL);
1296 	gpio_request(GPIO_FN_SDHI0CLK, NULL);
1297 	gpio_request(GPIO_FN_SDHI0D3,  NULL);
1298 	gpio_request(GPIO_FN_SDHI0D2,  NULL);
1299 	gpio_request(GPIO_FN_SDHI0D1,  NULL);
1300 	gpio_request(GPIO_FN_SDHI0D0,  NULL);
1301 #else
1302 	/* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1303 	gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1304 	gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1305 	gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1306 	gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1307 	gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1308 
1309 	gpiod_add_lookup_table(&mmc_spi_gpio_table);
1310 	gpiod_add_lookup_table(&msiof_gpio_table);
1311 	spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1312 #endif
1313 
1314 	/* MMC/SD-card slot CN12 */
1315 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1316 	/* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1317 	gpio_request(GPIO_FN_MMC_D7, NULL);
1318 	gpio_request(GPIO_FN_MMC_D6, NULL);
1319 	gpio_request(GPIO_FN_MMC_D5, NULL);
1320 	gpio_request(GPIO_FN_MMC_D4, NULL);
1321 	gpio_request(GPIO_FN_MMC_D3, NULL);
1322 	gpio_request(GPIO_FN_MMC_D2, NULL);
1323 	gpio_request(GPIO_FN_MMC_D1, NULL);
1324 	gpio_request(GPIO_FN_MMC_D0, NULL);
1325 	gpio_request(GPIO_FN_MMC_CLK, NULL);
1326 	gpio_request(GPIO_FN_MMC_CMD, NULL);
1327 
1328 	cn12_enabled = true;
1329 #elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1330 	/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1331 	gpio_request(GPIO_FN_SDHI1WP,  NULL);
1332 	gpio_request(GPIO_FN_SDHI1CMD, NULL);
1333 	gpio_request(GPIO_FN_SDHI1CLK, NULL);
1334 	gpio_request(GPIO_FN_SDHI1D3,  NULL);
1335 	gpio_request(GPIO_FN_SDHI1D2,  NULL);
1336 	gpio_request(GPIO_FN_SDHI1D1,  NULL);
1337 	gpio_request(GPIO_FN_SDHI1D0,  NULL);
1338 
1339 	cn12_enabled = true;
1340 #endif
1341 
1342 	if (cn12_enabled)
1343 		/* I/O buffer drive ability is high for CN12 */
1344 		__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
1345 			     IODRIVEA);
1346 
1347 	/* enable FSI */
1348 	gpio_request(GPIO_FN_FSIMCKB,    NULL);
1349 	gpio_request(GPIO_FN_FSIIBSD,    NULL);
1350 	gpio_request(GPIO_FN_FSIOBSD,    NULL);
1351 	gpio_request(GPIO_FN_FSIIBBCK,   NULL);
1352 	gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
1353 	gpio_request(GPIO_FN_FSIOBBCK,   NULL);
1354 	gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
1355 	gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1356 
1357 	/* set SPU2 clock to 83.4 MHz */
1358 	clk = clk_get(NULL, "spu_clk");
1359 	if (!IS_ERR(clk)) {
1360 		clk_set_rate(clk, clk_round_rate(clk, 83333333));
1361 		clk_put(clk);
1362 	}
1363 
1364 	/* change parent of FSI B */
1365 	clk = clk_get(NULL, "fsib_clk");
1366 	if (!IS_ERR(clk)) {
1367 		/* 48kHz dummy clock was used to make sure 1/1 divide */
1368 		clk_set_rate(&sh7724_fsimckb_clk, 48000);
1369 		clk_set_parent(clk, &sh7724_fsimckb_clk);
1370 		clk_set_rate(clk, 48000);
1371 		clk_put(clk);
1372 	}
1373 
1374 	gpio_request(GPIO_PTU0, NULL);
1375 	gpio_direction_output(GPIO_PTU0, 0);
1376 	mdelay(20);
1377 
1378 	/* enable motion sensor */
1379 	gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1380 	gpio_direction_input(GPIO_FN_INTC_IRQ1);
1381 
1382 	/* set VPU clock to 166 MHz */
1383 	clk = clk_get(NULL, "vpu_clk");
1384 	if (!IS_ERR(clk)) {
1385 		clk_set_rate(clk, clk_round_rate(clk, 166000000));
1386 		clk_put(clk);
1387 	}
1388 
1389 	/* enable IrDA */
1390 	gpio_request(GPIO_FN_IRDA_OUT, NULL);
1391 	gpio_request(GPIO_FN_IRDA_IN,  NULL);
1392 	gpio_request(GPIO_PTU5, NULL);
1393 	gpio_direction_output(GPIO_PTU5, 0);
1394 
1395 	/* Register gpio lookup tables for cameras and video decoder */
1396 	gpiod_add_lookup_table(&tw9910_gpios);
1397 	gpiod_add_lookup_table(&mt9t112_0_gpios);
1398 	gpiod_add_lookup_table(&mt9t112_1_gpios);
1399 
1400 	/* enable I2C device */
1401 	i2c_register_board_info(0, i2c0_devices,
1402 				ARRAY_SIZE(i2c0_devices));
1403 
1404 	i2c_register_board_info(1, i2c1_devices,
1405 				ARRAY_SIZE(i2c1_devices));
1406 
1407 #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
1408 	/* VOU */
1409 	gpio_request(GPIO_FN_DV_D15, NULL);
1410 	gpio_request(GPIO_FN_DV_D14, NULL);
1411 	gpio_request(GPIO_FN_DV_D13, NULL);
1412 	gpio_request(GPIO_FN_DV_D12, NULL);
1413 	gpio_request(GPIO_FN_DV_D11, NULL);
1414 	gpio_request(GPIO_FN_DV_D10, NULL);
1415 	gpio_request(GPIO_FN_DV_D9, NULL);
1416 	gpio_request(GPIO_FN_DV_D8, NULL);
1417 	gpio_request(GPIO_FN_DV_CLKI, NULL);
1418 	gpio_request(GPIO_FN_DV_CLK, NULL);
1419 	gpio_request(GPIO_FN_DV_VSYNC, NULL);
1420 	gpio_request(GPIO_FN_DV_HSYNC, NULL);
1421 
1422 	/* AK8813 power / reset sequence */
1423 	gpio_request(GPIO_PTG4, NULL);
1424 	gpio_request(GPIO_PTU3, NULL);
1425 	/* Reset */
1426 	gpio_direction_output(GPIO_PTG4, 0);
1427 	/* Power down */
1428 	gpio_direction_output(GPIO_PTU3, 1);
1429 
1430 	udelay(10);
1431 
1432 	/* Power up, reset */
1433 	gpio_set_value(GPIO_PTU3, 0);
1434 
1435 	udelay(10);
1436 
1437 	/* Remove reset */
1438 	gpio_set_value(GPIO_PTG4, 1);
1439 #endif
1440 
1441 	/* Initialize CEU platform devices separately to map memory first */
1442 	device_initialize(&ecovec_ceu_devices[0]->dev);
1443 	arch_setup_pdev_archdata(ecovec_ceu_devices[0]);
1444 	dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev,
1445 				    ceu0_dma_membase, ceu0_dma_membase,
1446 				    ceu0_dma_membase +
1447 				    CEU_BUFFER_MEMORY_SIZE - 1);
1448 	platform_device_add(ecovec_ceu_devices[0]);
1449 
1450 	device_initialize(&ecovec_ceu_devices[1]->dev);
1451 	arch_setup_pdev_archdata(ecovec_ceu_devices[1]);
1452 	dma_declare_coherent_memory(&ecovec_ceu_devices[1]->dev,
1453 				    ceu1_dma_membase, ceu1_dma_membase,
1454 				    ceu1_dma_membase +
1455 				    CEU_BUFFER_MEMORY_SIZE - 1);
1456 	platform_device_add(ecovec_ceu_devices[1]);
1457 
1458 	gpiod_add_lookup_table(&cn12_power_gpiod_table);
1459 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1460 	gpiod_add_lookup_table(&sdhi0_power_gpiod_table);
1461 	gpiod_add_lookup_table(&sdhi0_gpio_table);
1462 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1463 	gpiod_add_lookup_table(&sdhi1_gpio_table);
1464 #endif
1465 #endif
1466 
1467 	return platform_add_devices(ecovec_devices,
1468 				    ARRAY_SIZE(ecovec_devices));
1469 }
1470 arch_initcall(arch_setup);
1471 
1472 static int __init devices_setup(void)
1473 {
1474 	sh_eth_init(&sh_eth_plat);
1475 	return 0;
1476 }
1477 device_initcall(devices_setup);
1478 
1479 /* Reserve a portion of memory for CEU 0 and CEU 1 buffers */
1480 static void __init ecovec_mv_mem_reserve(void)
1481 {
1482 	phys_addr_t phys;
1483 	phys_addr_t size = CEU_BUFFER_MEMORY_SIZE;
1484 
1485 	phys = memblock_phys_alloc(size, PAGE_SIZE);
1486 	if (!phys)
1487 		panic("Failed to allocate CEU0 memory\n");
1488 
1489 	memblock_free(phys, size);
1490 	memblock_remove(phys, size);
1491 	ceu0_dma_membase = phys;
1492 
1493 	phys = memblock_phys_alloc(size, PAGE_SIZE);
1494 	if (!phys)
1495 		panic("Failed to allocate CEU1 memory\n");
1496 
1497 	memblock_free(phys, size);
1498 	memblock_remove(phys, size);
1499 	ceu1_dma_membase = phys;
1500 }
1501 
1502 static struct sh_machine_vector mv_ecovec __initmv = {
1503 	.mv_name	= "R0P7724 (EcoVec)",
1504 	.mv_mem_reserve	= ecovec_mv_mem_reserve,
1505 };
1506