1 /* 2 * Copyright (C) 2009 Renesas Solutions Corp. 3 * 4 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11 #include <linux/init.h> 12 #include <linux/device.h> 13 #include <linux/platform_device.h> 14 #include <linux/mtd/physmap.h> 15 #include <linux/gpio.h> 16 #include <linux/interrupt.h> 17 #include <linux/io.h> 18 #include <linux/delay.h> 19 #include <linux/usb/r8a66597.h> 20 #include <linux/i2c.h> 21 #include <linux/i2c/tsc2007.h> 22 #include <linux/spi/spi.h> 23 #include <linux/spi/sh_msiof.h> 24 #include <linux/spi/mmc_spi.h> 25 #include <linux/mmc/host.h> 26 #include <linux/input.h> 27 #include <linux/input/sh_keysc.h> 28 #include <linux/mfd/sh_mobile_sdhi.h> 29 #include <video/sh_mobile_lcdc.h> 30 #include <sound/sh_fsi.h> 31 #include <media/sh_mobile_ceu.h> 32 #include <media/tw9910.h> 33 #include <media/mt9t112.h> 34 #include <asm/heartbeat.h> 35 #include <asm/sh_eth.h> 36 #include <asm/clock.h> 37 #include <asm/suspend.h> 38 #include <cpu/sh7724.h> 39 40 /* 41 * Address Interface BusWidth 42 *----------------------------------------- 43 * 0x0000_0000 uboot 16bit 44 * 0x0004_0000 Linux romImage 16bit 45 * 0x0014_0000 MTD for Linux 16bit 46 * 0x0400_0000 Internal I/O 16/32bit 47 * 0x0800_0000 DRAM 32bit 48 * 0x1800_0000 MFI 16bit 49 */ 50 51 /* SWITCH 52 *------------------------------ 53 * DS2[1] = FlashROM write protect ON : write protect 54 * OFF : No write protect 55 * DS2[2] = RMII / TS, SCIF ON : RMII 56 * OFF : TS, SCIF3 57 * DS2[3] = Camera / Video ON : Camera 58 * OFF : NTSC/PAL (IN) 59 * DS2[5] = NTSC_OUT Clock ON : On board OSC 60 * OFF : SH7724 DV_CLK 61 * DS2[6-7] = MMC / SD ON-OFF : SD 62 * OFF-ON : MMC 63 */ 64 65 /* Heartbeat */ 66 static unsigned char led_pos[] = { 0, 1, 2, 3 }; 67 68 static struct heartbeat_data heartbeat_data = { 69 .nr_bits = 4, 70 .bit_pos = led_pos, 71 }; 72 73 static struct resource heartbeat_resource = { 74 .start = 0xA405012C, /* PTG */ 75 .end = 0xA405012E - 1, 76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 77 }; 78 79 static struct platform_device heartbeat_device = { 80 .name = "heartbeat", 81 .id = -1, 82 .dev = { 83 .platform_data = &heartbeat_data, 84 }, 85 .num_resources = 1, 86 .resource = &heartbeat_resource, 87 }; 88 89 /* MTD */ 90 static struct mtd_partition nor_flash_partitions[] = { 91 { 92 .name = "boot loader", 93 .offset = 0, 94 .size = (5 * 1024 * 1024), 95 .mask_flags = MTD_WRITEABLE, /* force read-only */ 96 }, { 97 .name = "free-area", 98 .offset = MTDPART_OFS_APPEND, 99 .size = MTDPART_SIZ_FULL, 100 }, 101 }; 102 103 static struct physmap_flash_data nor_flash_data = { 104 .width = 2, 105 .parts = nor_flash_partitions, 106 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 107 }; 108 109 static struct resource nor_flash_resources[] = { 110 [0] = { 111 .name = "NOR Flash", 112 .start = 0x00000000, 113 .end = 0x03ffffff, 114 .flags = IORESOURCE_MEM, 115 } 116 }; 117 118 static struct platform_device nor_flash_device = { 119 .name = "physmap-flash", 120 .resource = nor_flash_resources, 121 .num_resources = ARRAY_SIZE(nor_flash_resources), 122 .dev = { 123 .platform_data = &nor_flash_data, 124 }, 125 }; 126 127 /* SH Eth */ 128 #define SH_ETH_ADDR (0xA4600000) 129 static struct resource sh_eth_resources[] = { 130 [0] = { 131 .start = SH_ETH_ADDR, 132 .end = SH_ETH_ADDR + 0x1FC, 133 .flags = IORESOURCE_MEM, 134 }, 135 [1] = { 136 .start = 91, 137 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 138 }, 139 }; 140 141 struct sh_eth_plat_data sh_eth_plat = { 142 .phy = 0x1f, /* SMSC LAN8700 */ 143 .edmac_endian = EDMAC_LITTLE_ENDIAN, 144 .ether_link_active_low = 1 145 }; 146 147 static struct platform_device sh_eth_device = { 148 .name = "sh-eth", 149 .id = 0, 150 .dev = { 151 .platform_data = &sh_eth_plat, 152 }, 153 .num_resources = ARRAY_SIZE(sh_eth_resources), 154 .resource = sh_eth_resources, 155 .archdata = { 156 .hwblk_id = HWBLK_ETHER, 157 }, 158 }; 159 160 /* USB0 host */ 161 void usb0_port_power(int port, int power) 162 { 163 gpio_set_value(GPIO_PTB4, power); 164 } 165 166 static struct r8a66597_platdata usb0_host_data = { 167 .on_chip = 1, 168 .port_power = usb0_port_power, 169 }; 170 171 static struct resource usb0_host_resources[] = { 172 [0] = { 173 .start = 0xa4d80000, 174 .end = 0xa4d80124 - 1, 175 .flags = IORESOURCE_MEM, 176 }, 177 [1] = { 178 .start = 65, 179 .end = 65, 180 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 181 }, 182 }; 183 184 static struct platform_device usb0_host_device = { 185 .name = "r8a66597_hcd", 186 .id = 0, 187 .dev = { 188 .dma_mask = NULL, /* not use dma */ 189 .coherent_dma_mask = 0xffffffff, 190 .platform_data = &usb0_host_data, 191 }, 192 .num_resources = ARRAY_SIZE(usb0_host_resources), 193 .resource = usb0_host_resources, 194 }; 195 196 /* USB1 host/function */ 197 void usb1_port_power(int port, int power) 198 { 199 gpio_set_value(GPIO_PTB5, power); 200 } 201 202 static struct r8a66597_platdata usb1_common_data = { 203 .on_chip = 1, 204 .port_power = usb1_port_power, 205 }; 206 207 static struct resource usb1_common_resources[] = { 208 [0] = { 209 .start = 0xa4d90000, 210 .end = 0xa4d90124 - 1, 211 .flags = IORESOURCE_MEM, 212 }, 213 [1] = { 214 .start = 66, 215 .end = 66, 216 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 217 }, 218 }; 219 220 static struct platform_device usb1_common_device = { 221 /* .name will be added in arch_setup */ 222 .id = 1, 223 .dev = { 224 .dma_mask = NULL, /* not use dma */ 225 .coherent_dma_mask = 0xffffffff, 226 .platform_data = &usb1_common_data, 227 }, 228 .num_resources = ARRAY_SIZE(usb1_common_resources), 229 .resource = usb1_common_resources, 230 }; 231 232 /* LCDC */ 233 static struct sh_mobile_lcdc_info lcdc_info = { 234 .ch[0] = { 235 .interface_type = RGB18, 236 .chan = LCDC_CHAN_MAINLCD, 237 .bpp = 16, 238 .lcd_cfg = { 239 .sync = 0, /* hsync and vsync are active low */ 240 }, 241 .lcd_size_cfg = { /* 7.0 inch */ 242 .width = 152, 243 .height = 91, 244 }, 245 .board_cfg = { 246 }, 247 } 248 }; 249 250 static struct resource lcdc_resources[] = { 251 [0] = { 252 .name = "LCDC", 253 .start = 0xfe940000, 254 .end = 0xfe942fff, 255 .flags = IORESOURCE_MEM, 256 }, 257 [1] = { 258 .start = 106, 259 .flags = IORESOURCE_IRQ, 260 }, 261 }; 262 263 static struct platform_device lcdc_device = { 264 .name = "sh_mobile_lcdc_fb", 265 .num_resources = ARRAY_SIZE(lcdc_resources), 266 .resource = lcdc_resources, 267 .dev = { 268 .platform_data = &lcdc_info, 269 }, 270 .archdata = { 271 .hwblk_id = HWBLK_LCDC, 272 }, 273 }; 274 275 /* CEU0 */ 276 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 277 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 278 }; 279 280 static struct resource ceu0_resources[] = { 281 [0] = { 282 .name = "CEU0", 283 .start = 0xfe910000, 284 .end = 0xfe91009f, 285 .flags = IORESOURCE_MEM, 286 }, 287 [1] = { 288 .start = 52, 289 .flags = IORESOURCE_IRQ, 290 }, 291 [2] = { 292 /* place holder for contiguous memory */ 293 }, 294 }; 295 296 static struct platform_device ceu0_device = { 297 .name = "sh_mobile_ceu", 298 .id = 0, /* "ceu0" clock */ 299 .num_resources = ARRAY_SIZE(ceu0_resources), 300 .resource = ceu0_resources, 301 .dev = { 302 .platform_data = &sh_mobile_ceu0_info, 303 }, 304 .archdata = { 305 .hwblk_id = HWBLK_CEU0, 306 }, 307 }; 308 309 /* CEU1 */ 310 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 311 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 312 }; 313 314 static struct resource ceu1_resources[] = { 315 [0] = { 316 .name = "CEU1", 317 .start = 0xfe914000, 318 .end = 0xfe91409f, 319 .flags = IORESOURCE_MEM, 320 }, 321 [1] = { 322 .start = 63, 323 .flags = IORESOURCE_IRQ, 324 }, 325 [2] = { 326 /* place holder for contiguous memory */ 327 }, 328 }; 329 330 static struct platform_device ceu1_device = { 331 .name = "sh_mobile_ceu", 332 .id = 1, /* "ceu1" clock */ 333 .num_resources = ARRAY_SIZE(ceu1_resources), 334 .resource = ceu1_resources, 335 .dev = { 336 .platform_data = &sh_mobile_ceu1_info, 337 }, 338 .archdata = { 339 .hwblk_id = HWBLK_CEU1, 340 }, 341 }; 342 343 /* I2C device */ 344 static struct i2c_board_info i2c0_devices[] = { 345 { 346 I2C_BOARD_INFO("da7210", 0x1a), 347 }, 348 }; 349 350 static struct i2c_board_info i2c1_devices[] = { 351 { 352 I2C_BOARD_INFO("r2025sd", 0x32), 353 }, 354 }; 355 356 /* KEYSC */ 357 static struct sh_keysc_info keysc_info = { 358 .mode = SH_KEYSC_MODE_1, 359 .scan_timing = 3, 360 .delay = 50, 361 .kycr2_delay = 100, 362 .keycodes = { KEY_1, 0, 0, 0, 0, 363 KEY_2, 0, 0, 0, 0, 364 KEY_3, 0, 0, 0, 0, 365 KEY_4, 0, 0, 0, 0, 366 KEY_5, 0, 0, 0, 0, 367 KEY_6, 0, 0, 0, 0, }, 368 }; 369 370 static struct resource keysc_resources[] = { 371 [0] = { 372 .name = "KEYSC", 373 .start = 0x044b0000, 374 .end = 0x044b000f, 375 .flags = IORESOURCE_MEM, 376 }, 377 [1] = { 378 .start = 79, 379 .flags = IORESOURCE_IRQ, 380 }, 381 }; 382 383 static struct platform_device keysc_device = { 384 .name = "sh_keysc", 385 .id = 0, /* keysc0 clock */ 386 .num_resources = ARRAY_SIZE(keysc_resources), 387 .resource = keysc_resources, 388 .dev = { 389 .platform_data = &keysc_info, 390 }, 391 .archdata = { 392 .hwblk_id = HWBLK_KEYSC, 393 }, 394 }; 395 396 /* TouchScreen */ 397 #define IRQ0 32 398 static int ts_get_pendown_state(void) 399 { 400 int val = 0; 401 gpio_free(GPIO_FN_INTC_IRQ0); 402 gpio_request(GPIO_PTZ0, NULL); 403 gpio_direction_input(GPIO_PTZ0); 404 405 val = gpio_get_value(GPIO_PTZ0); 406 407 gpio_free(GPIO_PTZ0); 408 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 409 410 return val ? 0 : 1; 411 } 412 413 static int ts_init(void) 414 { 415 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 416 return 0; 417 } 418 419 struct tsc2007_platform_data tsc2007_info = { 420 .model = 2007, 421 .x_plate_ohms = 180, 422 .get_pendown_state = ts_get_pendown_state, 423 .init_platform_hw = ts_init, 424 }; 425 426 static struct i2c_board_info ts_i2c_clients = { 427 I2C_BOARD_INFO("tsc2007", 0x48), 428 .type = "tsc2007", 429 .platform_data = &tsc2007_info, 430 .irq = IRQ0, 431 }; 432 433 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 434 /* SHDI0 */ 435 static void sdhi0_set_pwr(struct platform_device *pdev, int state) 436 { 437 gpio_set_value(GPIO_PTB6, state); 438 } 439 440 static struct sh_mobile_sdhi_info sdhi0_info = { 441 .set_pwr = sdhi0_set_pwr, 442 }; 443 444 static struct resource sdhi0_resources[] = { 445 [0] = { 446 .name = "SDHI0", 447 .start = 0x04ce0000, 448 .end = 0x04ce01ff, 449 .flags = IORESOURCE_MEM, 450 }, 451 [1] = { 452 .start = 101, 453 .flags = IORESOURCE_IRQ, 454 }, 455 }; 456 457 static struct platform_device sdhi0_device = { 458 .name = "sh_mobile_sdhi", 459 .num_resources = ARRAY_SIZE(sdhi0_resources), 460 .resource = sdhi0_resources, 461 .id = 0, 462 .dev = { 463 .platform_data = &sdhi0_info, 464 }, 465 .archdata = { 466 .hwblk_id = HWBLK_SDHI0, 467 }, 468 }; 469 470 /* SHDI1 */ 471 static void sdhi1_set_pwr(struct platform_device *pdev, int state) 472 { 473 gpio_set_value(GPIO_PTB7, state); 474 } 475 476 static struct sh_mobile_sdhi_info sdhi1_info = { 477 .set_pwr = sdhi1_set_pwr, 478 }; 479 480 static struct resource sdhi1_resources[] = { 481 [0] = { 482 .name = "SDHI1", 483 .start = 0x04cf0000, 484 .end = 0x04cf01ff, 485 .flags = IORESOURCE_MEM, 486 }, 487 [1] = { 488 .start = 24, 489 .flags = IORESOURCE_IRQ, 490 }, 491 }; 492 493 static struct platform_device sdhi1_device = { 494 .name = "sh_mobile_sdhi", 495 .num_resources = ARRAY_SIZE(sdhi1_resources), 496 .resource = sdhi1_resources, 497 .id = 1, 498 .dev = { 499 .platform_data = &sdhi1_info, 500 }, 501 .archdata = { 502 .hwblk_id = HWBLK_SDHI1, 503 }, 504 }; 505 506 #else 507 508 /* MMC SPI */ 509 static int mmc_spi_get_ro(struct device *dev) 510 { 511 return gpio_get_value(GPIO_PTY6); 512 } 513 514 static int mmc_spi_get_cd(struct device *dev) 515 { 516 return !gpio_get_value(GPIO_PTY7); 517 } 518 519 static void mmc_spi_setpower(struct device *dev, unsigned int maskval) 520 { 521 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); 522 } 523 524 static struct mmc_spi_platform_data mmc_spi_info = { 525 .get_ro = mmc_spi_get_ro, 526 .get_cd = mmc_spi_get_cd, 527 .caps = MMC_CAP_NEEDS_POLL, 528 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ 529 .setpower = mmc_spi_setpower, 530 }; 531 532 static struct spi_board_info spi_bus[] = { 533 { 534 .modalias = "mmc_spi", 535 .platform_data = &mmc_spi_info, 536 .max_speed_hz = 5000000, 537 .mode = SPI_MODE_0, 538 .controller_data = (void *) GPIO_PTM4, 539 }, 540 }; 541 542 /* MSIOF0 */ 543 static struct sh_msiof_spi_info msiof0_data = { 544 .num_chipselect = 1, 545 }; 546 547 static struct resource msiof0_resources[] = { 548 [0] = { 549 .name = "MSIOF0", 550 .start = 0xa4c40000, 551 .end = 0xa4c40063, 552 .flags = IORESOURCE_MEM, 553 }, 554 [1] = { 555 .start = 84, 556 .flags = IORESOURCE_IRQ, 557 }, 558 }; 559 560 static struct platform_device msiof0_device = { 561 .name = "spi_sh_msiof", 562 .id = 0, /* MSIOF0 */ 563 .dev = { 564 .platform_data = &msiof0_data, 565 }, 566 .num_resources = ARRAY_SIZE(msiof0_resources), 567 .resource = msiof0_resources, 568 .archdata = { 569 .hwblk_id = HWBLK_MSIOF0, 570 }, 571 }; 572 573 #endif 574 575 /* I2C Video/Camera */ 576 static struct i2c_board_info i2c_camera[] = { 577 { 578 I2C_BOARD_INFO("tw9910", 0x45), 579 }, 580 { 581 /* 1st camera */ 582 I2C_BOARD_INFO("mt9t112", 0x3c), 583 }, 584 { 585 /* 2nd camera */ 586 I2C_BOARD_INFO("mt9t112", 0x3c), 587 }, 588 }; 589 590 /* tw9910 */ 591 static int tw9910_power(struct device *dev, int mode) 592 { 593 int val = mode ? 0 : 1; 594 595 gpio_set_value(GPIO_PTU2, val); 596 if (mode) 597 mdelay(100); 598 599 return 0; 600 } 601 602 static struct tw9910_video_info tw9910_info = { 603 .buswidth = SOCAM_DATAWIDTH_8, 604 .mpout = TW9910_MPO_FIELD, 605 }; 606 607 static struct soc_camera_link tw9910_link = { 608 .i2c_adapter_id = 0, 609 .bus_id = 1, 610 .power = tw9910_power, 611 .board_info = &i2c_camera[0], 612 .module_name = "tw9910", 613 .priv = &tw9910_info, 614 }; 615 616 /* mt9t112 */ 617 static int mt9t112_power1(struct device *dev, int mode) 618 { 619 gpio_set_value(GPIO_PTA3, mode); 620 if (mode) 621 mdelay(100); 622 623 return 0; 624 } 625 626 static struct mt9t112_camera_info mt9t112_info1 = { 627 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 628 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 629 }; 630 631 static struct soc_camera_link mt9t112_link1 = { 632 .i2c_adapter_id = 0, 633 .power = mt9t112_power1, 634 .bus_id = 0, 635 .board_info = &i2c_camera[1], 636 .module_name = "mt9t112", 637 .priv = &mt9t112_info1, 638 }; 639 640 static int mt9t112_power2(struct device *dev, int mode) 641 { 642 gpio_set_value(GPIO_PTA4, mode); 643 if (mode) 644 mdelay(100); 645 646 return 0; 647 } 648 649 static struct mt9t112_camera_info mt9t112_info2 = { 650 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 651 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 652 }; 653 654 static struct soc_camera_link mt9t112_link2 = { 655 .i2c_adapter_id = 1, 656 .power = mt9t112_power2, 657 .bus_id = 1, 658 .board_info = &i2c_camera[2], 659 .module_name = "mt9t112", 660 .priv = &mt9t112_info2, 661 }; 662 663 static struct platform_device camera_devices[] = { 664 { 665 .name = "soc-camera-pdrv", 666 .id = 0, 667 .dev = { 668 .platform_data = &tw9910_link, 669 }, 670 }, 671 { 672 .name = "soc-camera-pdrv", 673 .id = 1, 674 .dev = { 675 .platform_data = &mt9t112_link1, 676 }, 677 }, 678 { 679 .name = "soc-camera-pdrv", 680 .id = 2, 681 .dev = { 682 .platform_data = &mt9t112_link2, 683 }, 684 }, 685 }; 686 687 /* FSI */ 688 /* 689 * FSI-B use external clock which came from da7210. 690 * So, we should change parent of fsi 691 */ 692 #define FCLKBCR 0xa415000c 693 static void fsimck_init(struct clk *clk) 694 { 695 u32 status = ctrl_inl(clk->enable_reg); 696 697 /* use external clock */ 698 status &= ~0x000000ff; 699 status |= 0x00000080; 700 701 ctrl_outl(status, clk->enable_reg); 702 } 703 704 static struct clk_ops fsimck_clk_ops = { 705 .init = fsimck_init, 706 }; 707 708 static struct clk fsimckb_clk = { 709 .name = "fsimckb_clk", 710 .id = -1, 711 .ops = &fsimck_clk_ops, 712 .enable_reg = (void __iomem *)FCLKBCR, 713 .rate = 0, /* unknown */ 714 }; 715 716 struct sh_fsi_platform_info fsi_info = { 717 .portb_flags = SH_FSI_BRS_INV | 718 SH_FSI_OUT_SLAVE_MODE | 719 SH_FSI_IN_SLAVE_MODE | 720 SH_FSI_OFMT(I2S) | 721 SH_FSI_IFMT(I2S), 722 }; 723 724 static struct resource fsi_resources[] = { 725 [0] = { 726 .name = "FSI", 727 .start = 0xFE3C0000, 728 .end = 0xFE3C021d, 729 .flags = IORESOURCE_MEM, 730 }, 731 [1] = { 732 .start = 108, 733 .flags = IORESOURCE_IRQ, 734 }, 735 }; 736 737 static struct platform_device fsi_device = { 738 .name = "sh_fsi", 739 .id = 0, 740 .num_resources = ARRAY_SIZE(fsi_resources), 741 .resource = fsi_resources, 742 .dev = { 743 .platform_data = &fsi_info, 744 }, 745 .archdata = { 746 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */ 747 }, 748 }; 749 750 static struct platform_device *ecovec_devices[] __initdata = { 751 &heartbeat_device, 752 &nor_flash_device, 753 &sh_eth_device, 754 &usb0_host_device, 755 &usb1_common_device, 756 &lcdc_device, 757 &ceu0_device, 758 &ceu1_device, 759 &keysc_device, 760 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 761 &sdhi0_device, 762 &sdhi1_device, 763 #else 764 &msiof0_device, 765 #endif 766 &camera_devices[0], 767 &camera_devices[1], 768 &camera_devices[2], 769 &fsi_device, 770 }; 771 772 #define EEPROM_ADDR 0x50 773 static u8 mac_read(struct i2c_adapter *a, u8 command) 774 { 775 struct i2c_msg msg[2]; 776 u8 buf; 777 int ret; 778 779 msg[0].addr = EEPROM_ADDR; 780 msg[0].flags = 0; 781 msg[0].len = 1; 782 msg[0].buf = &command; 783 784 msg[1].addr = EEPROM_ADDR; 785 msg[1].flags = I2C_M_RD; 786 msg[1].len = 1; 787 msg[1].buf = &buf; 788 789 ret = i2c_transfer(a, msg, 2); 790 if (ret < 0) { 791 printk(KERN_ERR "error %d\n", ret); 792 buf = 0xff; 793 } 794 795 return buf; 796 } 797 798 static void __init sh_eth_init(struct sh_eth_plat_data *pd) 799 { 800 struct i2c_adapter *a = i2c_get_adapter(1); 801 int i; 802 803 if (!a) { 804 pr_err("can not get I2C 1\n"); 805 return; 806 } 807 808 /* read MAC address frome EEPROM */ 809 for (i = 0; i < sizeof(pd->mac_addr); i++) { 810 pd->mac_addr[i] = mac_read(a, 0x10 + i); 811 msleep(10); 812 } 813 } 814 815 #define PORT_HIZA 0xA4050158 816 #define IODRIVEA 0xA405018A 817 818 extern char ecovec24_sdram_enter_start; 819 extern char ecovec24_sdram_enter_end; 820 extern char ecovec24_sdram_leave_start; 821 extern char ecovec24_sdram_leave_end; 822 823 static int __init arch_setup(void) 824 { 825 struct clk *clk; 826 827 /* register board specific self-refresh code */ 828 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, 829 &ecovec24_sdram_enter_start, 830 &ecovec24_sdram_enter_end, 831 &ecovec24_sdram_leave_start, 832 &ecovec24_sdram_leave_end); 833 834 /* enable STATUS0, STATUS2 and PDSTATUS */ 835 gpio_request(GPIO_FN_STATUS0, NULL); 836 gpio_request(GPIO_FN_STATUS2, NULL); 837 gpio_request(GPIO_FN_PDSTATUS, NULL); 838 839 /* enable SCIFA0 */ 840 gpio_request(GPIO_FN_SCIF0_TXD, NULL); 841 gpio_request(GPIO_FN_SCIF0_RXD, NULL); 842 843 /* enable debug LED */ 844 gpio_request(GPIO_PTG0, NULL); 845 gpio_request(GPIO_PTG1, NULL); 846 gpio_request(GPIO_PTG2, NULL); 847 gpio_request(GPIO_PTG3, NULL); 848 gpio_direction_output(GPIO_PTG0, 0); 849 gpio_direction_output(GPIO_PTG1, 0); 850 gpio_direction_output(GPIO_PTG2, 0); 851 gpio_direction_output(GPIO_PTG3, 0); 852 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 853 854 /* enable SH-Eth */ 855 gpio_request(GPIO_PTA1, NULL); 856 gpio_direction_output(GPIO_PTA1, 1); 857 mdelay(20); 858 859 gpio_request(GPIO_FN_RMII_RXD0, NULL); 860 gpio_request(GPIO_FN_RMII_RXD1, NULL); 861 gpio_request(GPIO_FN_RMII_TXD0, NULL); 862 gpio_request(GPIO_FN_RMII_TXD1, NULL); 863 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 864 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 865 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 866 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 867 gpio_request(GPIO_FN_MDIO, NULL); 868 gpio_request(GPIO_FN_MDC, NULL); 869 gpio_request(GPIO_FN_LNKSTA, NULL); 870 871 /* enable USB */ 872 ctrl_outw(0x0000, 0xA4D80000); 873 ctrl_outw(0x0000, 0xA4D90000); 874 gpio_request(GPIO_PTB3, NULL); 875 gpio_request(GPIO_PTB4, NULL); 876 gpio_request(GPIO_PTB5, NULL); 877 gpio_direction_input(GPIO_PTB3); 878 gpio_direction_output(GPIO_PTB4, 0); 879 gpio_direction_output(GPIO_PTB5, 0); 880 ctrl_outw(0x0600, 0xa40501d4); 881 ctrl_outw(0x0600, 0xa4050192); 882 883 if (gpio_get_value(GPIO_PTB3)) { 884 printk(KERN_INFO "USB1 function is selected\n"); 885 usb1_common_device.name = "r8a66597_udc"; 886 } else { 887 printk(KERN_INFO "USB1 host is selected\n"); 888 usb1_common_device.name = "r8a66597_hcd"; 889 } 890 891 /* enable LCDC */ 892 gpio_request(GPIO_FN_LCDD23, NULL); 893 gpio_request(GPIO_FN_LCDD22, NULL); 894 gpio_request(GPIO_FN_LCDD21, NULL); 895 gpio_request(GPIO_FN_LCDD20, NULL); 896 gpio_request(GPIO_FN_LCDD19, NULL); 897 gpio_request(GPIO_FN_LCDD18, NULL); 898 gpio_request(GPIO_FN_LCDD17, NULL); 899 gpio_request(GPIO_FN_LCDD16, NULL); 900 gpio_request(GPIO_FN_LCDD15, NULL); 901 gpio_request(GPIO_FN_LCDD14, NULL); 902 gpio_request(GPIO_FN_LCDD13, NULL); 903 gpio_request(GPIO_FN_LCDD12, NULL); 904 gpio_request(GPIO_FN_LCDD11, NULL); 905 gpio_request(GPIO_FN_LCDD10, NULL); 906 gpio_request(GPIO_FN_LCDD9, NULL); 907 gpio_request(GPIO_FN_LCDD8, NULL); 908 gpio_request(GPIO_FN_LCDD7, NULL); 909 gpio_request(GPIO_FN_LCDD6, NULL); 910 gpio_request(GPIO_FN_LCDD5, NULL); 911 gpio_request(GPIO_FN_LCDD4, NULL); 912 gpio_request(GPIO_FN_LCDD3, NULL); 913 gpio_request(GPIO_FN_LCDD2, NULL); 914 gpio_request(GPIO_FN_LCDD1, NULL); 915 gpio_request(GPIO_FN_LCDD0, NULL); 916 gpio_request(GPIO_FN_LCDDISP, NULL); 917 gpio_request(GPIO_FN_LCDHSYN, NULL); 918 gpio_request(GPIO_FN_LCDDCK, NULL); 919 gpio_request(GPIO_FN_LCDVSYN, NULL); 920 gpio_request(GPIO_FN_LCDDON, NULL); 921 gpio_request(GPIO_FN_LCDLCLK, NULL); 922 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 923 924 gpio_request(GPIO_PTE6, NULL); 925 gpio_request(GPIO_PTU1, NULL); 926 gpio_request(GPIO_PTR1, NULL); 927 gpio_request(GPIO_PTA2, NULL); 928 gpio_direction_input(GPIO_PTE6); 929 gpio_direction_output(GPIO_PTU1, 0); 930 gpio_direction_output(GPIO_PTR1, 0); 931 gpio_direction_output(GPIO_PTA2, 0); 932 933 /* I/O buffer drive ability is high */ 934 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); 935 936 if (gpio_get_value(GPIO_PTE6)) { 937 /* DVI */ 938 lcdc_info.clock_source = LCDC_CLK_EXTERNAL; 939 lcdc_info.ch[0].clock_divider = 1, 940 lcdc_info.ch[0].lcd_cfg.name = "DVI"; 941 lcdc_info.ch[0].lcd_cfg.xres = 1280; 942 lcdc_info.ch[0].lcd_cfg.yres = 720; 943 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 944 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 945 lcdc_info.ch[0].lcd_cfg.hsync_len = 40; 946 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 947 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 948 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 949 950 gpio_set_value(GPIO_PTA2, 1); 951 gpio_set_value(GPIO_PTU1, 1); 952 } else { 953 /* Panel */ 954 955 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; 956 lcdc_info.ch[0].clock_divider = 2, 957 lcdc_info.ch[0].lcd_cfg.name = "Panel"; 958 lcdc_info.ch[0].lcd_cfg.xres = 800; 959 lcdc_info.ch[0].lcd_cfg.yres = 480; 960 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 961 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 962 lcdc_info.ch[0].lcd_cfg.hsync_len = 70; 963 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 964 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 965 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 966 967 gpio_set_value(GPIO_PTR1, 1); 968 969 /* FIXME 970 * 971 * LCDDON control is needed for Panel, 972 * but current sh_mobile_lcdc driver doesn't control it. 973 * It is temporary correspondence 974 */ 975 gpio_request(GPIO_PTF4, NULL); 976 gpio_direction_output(GPIO_PTF4, 1); 977 978 /* enable TouchScreen */ 979 i2c_register_board_info(0, &ts_i2c_clients, 1); 980 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); 981 } 982 983 /* enable CEU0 */ 984 gpio_request(GPIO_FN_VIO0_D15, NULL); 985 gpio_request(GPIO_FN_VIO0_D14, NULL); 986 gpio_request(GPIO_FN_VIO0_D13, NULL); 987 gpio_request(GPIO_FN_VIO0_D12, NULL); 988 gpio_request(GPIO_FN_VIO0_D11, NULL); 989 gpio_request(GPIO_FN_VIO0_D10, NULL); 990 gpio_request(GPIO_FN_VIO0_D9, NULL); 991 gpio_request(GPIO_FN_VIO0_D8, NULL); 992 gpio_request(GPIO_FN_VIO0_D7, NULL); 993 gpio_request(GPIO_FN_VIO0_D6, NULL); 994 gpio_request(GPIO_FN_VIO0_D5, NULL); 995 gpio_request(GPIO_FN_VIO0_D4, NULL); 996 gpio_request(GPIO_FN_VIO0_D3, NULL); 997 gpio_request(GPIO_FN_VIO0_D2, NULL); 998 gpio_request(GPIO_FN_VIO0_D1, NULL); 999 gpio_request(GPIO_FN_VIO0_D0, NULL); 1000 gpio_request(GPIO_FN_VIO0_VD, NULL); 1001 gpio_request(GPIO_FN_VIO0_CLK, NULL); 1002 gpio_request(GPIO_FN_VIO0_FLD, NULL); 1003 gpio_request(GPIO_FN_VIO0_HD, NULL); 1004 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 1005 1006 /* enable CEU1 */ 1007 gpio_request(GPIO_FN_VIO1_D7, NULL); 1008 gpio_request(GPIO_FN_VIO1_D6, NULL); 1009 gpio_request(GPIO_FN_VIO1_D5, NULL); 1010 gpio_request(GPIO_FN_VIO1_D4, NULL); 1011 gpio_request(GPIO_FN_VIO1_D3, NULL); 1012 gpio_request(GPIO_FN_VIO1_D2, NULL); 1013 gpio_request(GPIO_FN_VIO1_D1, NULL); 1014 gpio_request(GPIO_FN_VIO1_D0, NULL); 1015 gpio_request(GPIO_FN_VIO1_FLD, NULL); 1016 gpio_request(GPIO_FN_VIO1_HD, NULL); 1017 gpio_request(GPIO_FN_VIO1_VD, NULL); 1018 gpio_request(GPIO_FN_VIO1_CLK, NULL); 1019 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 1020 1021 /* enable KEYSC */ 1022 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 1023 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 1024 gpio_request(GPIO_FN_KEYOUT3, NULL); 1025 gpio_request(GPIO_FN_KEYOUT2, NULL); 1026 gpio_request(GPIO_FN_KEYOUT1, NULL); 1027 gpio_request(GPIO_FN_KEYOUT0, NULL); 1028 gpio_request(GPIO_FN_KEYIN0, NULL); 1029 1030 /* enable user debug switch */ 1031 gpio_request(GPIO_PTR0, NULL); 1032 gpio_request(GPIO_PTR4, NULL); 1033 gpio_request(GPIO_PTR5, NULL); 1034 gpio_request(GPIO_PTR6, NULL); 1035 gpio_direction_input(GPIO_PTR0); 1036 gpio_direction_input(GPIO_PTR4); 1037 gpio_direction_input(GPIO_PTR5); 1038 gpio_direction_input(GPIO_PTR6); 1039 1040 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 1041 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ 1042 gpio_request(GPIO_FN_SDHI0CD, NULL); 1043 gpio_request(GPIO_FN_SDHI0WP, NULL); 1044 gpio_request(GPIO_FN_SDHI0CMD, NULL); 1045 gpio_request(GPIO_FN_SDHI0CLK, NULL); 1046 gpio_request(GPIO_FN_SDHI0D3, NULL); 1047 gpio_request(GPIO_FN_SDHI0D2, NULL); 1048 gpio_request(GPIO_FN_SDHI0D1, NULL); 1049 gpio_request(GPIO_FN_SDHI0D0, NULL); 1050 gpio_request(GPIO_PTB6, NULL); 1051 gpio_direction_output(GPIO_PTB6, 0); 1052 1053 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ 1054 gpio_request(GPIO_FN_SDHI1CD, NULL); 1055 gpio_request(GPIO_FN_SDHI1WP, NULL); 1056 gpio_request(GPIO_FN_SDHI1CMD, NULL); 1057 gpio_request(GPIO_FN_SDHI1CLK, NULL); 1058 gpio_request(GPIO_FN_SDHI1D3, NULL); 1059 gpio_request(GPIO_FN_SDHI1D2, NULL); 1060 gpio_request(GPIO_FN_SDHI1D1, NULL); 1061 gpio_request(GPIO_FN_SDHI1D0, NULL); 1062 gpio_request(GPIO_PTB7, NULL); 1063 gpio_direction_output(GPIO_PTB7, 0); 1064 1065 /* I/O buffer drive ability is high for SDHI1 */ 1066 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1067 #else 1068 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1069 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1070 gpio_request(GPIO_FN_MSIOF0_RXD, NULL); 1071 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); 1072 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ 1073 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ 1074 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ 1075 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ 1076 gpio_request(GPIO_PTY6, NULL); /* write protect */ 1077 gpio_direction_input(GPIO_PTY6); 1078 gpio_request(GPIO_PTY7, NULL); /* card detect */ 1079 gpio_direction_input(GPIO_PTY7); 1080 1081 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 1082 #endif 1083 1084 /* enable Video */ 1085 gpio_request(GPIO_PTU2, NULL); 1086 gpio_direction_output(GPIO_PTU2, 1); 1087 1088 /* enable Camera */ 1089 gpio_request(GPIO_PTA3, NULL); 1090 gpio_request(GPIO_PTA4, NULL); 1091 gpio_direction_output(GPIO_PTA3, 0); 1092 gpio_direction_output(GPIO_PTA4, 0); 1093 1094 /* enable FSI */ 1095 gpio_request(GPIO_FN_FSIMCKB, NULL); 1096 gpio_request(GPIO_FN_FSIIBSD, NULL); 1097 gpio_request(GPIO_FN_FSIOBSD, NULL); 1098 gpio_request(GPIO_FN_FSIIBBCK, NULL); 1099 gpio_request(GPIO_FN_FSIIBLRCK, NULL); 1100 gpio_request(GPIO_FN_FSIOBBCK, NULL); 1101 gpio_request(GPIO_FN_FSIOBLRCK, NULL); 1102 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 1103 1104 /* change parent of FSI B */ 1105 clk = clk_get(NULL, "fsib_clk"); 1106 clk_register(&fsimckb_clk); 1107 clk_set_parent(clk, &fsimckb_clk); 1108 clk_set_rate(clk, 11000); 1109 clk_set_rate(&fsimckb_clk, 11000); 1110 clk_put(clk); 1111 1112 gpio_request(GPIO_PTU0, NULL); 1113 gpio_direction_output(GPIO_PTU0, 0); 1114 mdelay(20); 1115 1116 /* enable I2C device */ 1117 i2c_register_board_info(0, i2c0_devices, 1118 ARRAY_SIZE(i2c0_devices)); 1119 1120 i2c_register_board_info(1, i2c1_devices, 1121 ARRAY_SIZE(i2c1_devices)); 1122 1123 return platform_add_devices(ecovec_devices, 1124 ARRAY_SIZE(ecovec_devices)); 1125 } 1126 arch_initcall(arch_setup); 1127 1128 static int __init devices_setup(void) 1129 { 1130 sh_eth_init(&sh_eth_plat); 1131 return 0; 1132 } 1133 device_initcall(devices_setup); 1134 1135 static struct sh_machine_vector mv_ecovec __initmv = { 1136 .mv_name = "R0P7724 (EcoVec)", 1137 }; 1138