1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2009 Renesas Solutions Corp.
4  *
5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6  */
7 #include <asm/clock.h>
8 #include <asm/heartbeat.h>
9 #include <asm/suspend.h>
10 #include <cpu/sh7724.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/i2c.h>
14 #include <linux/io.h>
15 #include <linux/init.h>
16 #include <linux/input.h>
17 #include <linux/input/sh_keysc.h>
18 #include <linux/interrupt.h>
19 #include <linux/memblock.h>
20 #include <linux/mfd/tmio.h>
21 #include <linux/mmc/host.h>
22 #include <linux/mmc/sh_mmcif.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/gpio.h>
25 #include <linux/gpio/machine.h>
26 #include <linux/platform_data/gpio_backlight.h>
27 #include <linux/platform_data/tsc2007.h>
28 #include <linux/platform_device.h>
29 #include <linux/regulator/fixed.h>
30 #include <linux/regulator/machine.h>
31 #include <linux/sh_eth.h>
32 #include <linux/sh_intc.h>
33 #include <linux/spi/mmc_spi.h>
34 #include <linux/spi/sh_msiof.h>
35 #include <linux/spi/spi.h>
36 #include <linux/usb/r8a66597.h>
37 #include <linux/usb/renesas_usbhs.h>
38 #include <linux/videodev2.h>
39 
40 #include <media/drv-intf/renesas-ceu.h>
41 #include <media/i2c/mt9t112.h>
42 #include <media/i2c/tw9910.h>
43 
44 #include <sound/sh_fsi.h>
45 #include <sound/simple_card.h>
46 
47 #include <video/sh_mobile_lcdc.h>
48 
49 /*
50  *  Address      Interface        BusWidth
51  *-----------------------------------------
52  *  0x0000_0000  uboot            16bit
53  *  0x0004_0000  Linux romImage   16bit
54  *  0x0014_0000  MTD for Linux    16bit
55  *  0x0400_0000  Internal I/O     16/32bit
56  *  0x0800_0000  DRAM             32bit
57  *  0x1800_0000  MFI              16bit
58  */
59 
60 /* SWITCH
61  *------------------------------
62  * DS2[1] = FlashROM write protect  ON     : write protect
63  *                                  OFF    : No write protect
64  * DS2[2] = RMII / TS, SCIF         ON     : RMII
65  *                                  OFF    : TS, SCIF3
66  * DS2[3] = Camera / Video          ON     : Camera
67  *                                  OFF    : NTSC/PAL (IN)
68  * DS2[5] = NTSC_OUT Clock          ON     : On board OSC
69  *                                  OFF    : SH7724 DV_CLK
70  * DS2[6-7] = MMC / SD              ON-OFF : SD
71  *                                  OFF-ON : MMC
72  */
73 
74 /*
75  * FSI - DA7210
76  *
77  * it needs amixer settings for playing
78  *
79  * amixer set 'HeadPhone' 80
80  * amixer set 'Out Mixer Left DAC Left' on
81  * amixer set 'Out Mixer Right DAC Right' on
82  */
83 
84 #define CEU_BUFFER_MEMORY_SIZE		(4 << 20)
85 static phys_addr_t ceu0_dma_membase;
86 static phys_addr_t ceu1_dma_membase;
87 
88 /* Heartbeat */
89 static unsigned char led_pos[] = { 0, 1, 2, 3 };
90 
91 static struct heartbeat_data heartbeat_data = {
92 	.nr_bits = 4,
93 	.bit_pos = led_pos,
94 };
95 
96 static struct resource heartbeat_resource = {
97 	.start  = 0xA405012C, /* PTG */
98 	.end    = 0xA405012E - 1,
99 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
100 };
101 
102 static struct platform_device heartbeat_device = {
103 	.name           = "heartbeat",
104 	.id             = -1,
105 	.dev = {
106 		.platform_data = &heartbeat_data,
107 	},
108 	.num_resources  = 1,
109 	.resource       = &heartbeat_resource,
110 };
111 
112 /* MTD */
113 static struct mtd_partition nor_flash_partitions[] = {
114 	{
115 		.name = "boot loader",
116 		.offset = 0,
117 		.size = (5 * 1024 * 1024),
118 		.mask_flags = MTD_WRITEABLE,  /* force read-only */
119 	}, {
120 		.name = "free-area",
121 		.offset = MTDPART_OFS_APPEND,
122 		.size = MTDPART_SIZ_FULL,
123 	},
124 };
125 
126 static struct physmap_flash_data nor_flash_data = {
127 	.width		= 2,
128 	.parts		= nor_flash_partitions,
129 	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
130 };
131 
132 static struct resource nor_flash_resources[] = {
133 	[0] = {
134 		.name	= "NOR Flash",
135 		.start	= 0x00000000,
136 		.end	= 0x03ffffff,
137 		.flags	= IORESOURCE_MEM,
138 	}
139 };
140 
141 static struct platform_device nor_flash_device = {
142 	.name		= "physmap-flash",
143 	.resource	= nor_flash_resources,
144 	.num_resources	= ARRAY_SIZE(nor_flash_resources),
145 	.dev		= {
146 		.platform_data = &nor_flash_data,
147 	},
148 };
149 
150 /* SH Eth */
151 #define SH_ETH_ADDR	(0xA4600000)
152 static struct resource sh_eth_resources[] = {
153 	[0] = {
154 		.start = SH_ETH_ADDR,
155 		.end   = SH_ETH_ADDR + 0x1FC,
156 		.flags = IORESOURCE_MEM,
157 	},
158 	[1] = {
159 		.start = evt2irq(0xd60),
160 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
161 	},
162 };
163 
164 static struct sh_eth_plat_data sh_eth_plat = {
165 	.phy = 0x1f, /* SMSC LAN8700 */
166 	.phy_interface = PHY_INTERFACE_MODE_MII,
167 	.ether_link_active_low = 1
168 };
169 
170 static struct platform_device sh_eth_device = {
171 	.name = "sh7724-ether",
172 	.id = 0,
173 	.dev = {
174 		.platform_data = &sh_eth_plat,
175 	},
176 	.num_resources = ARRAY_SIZE(sh_eth_resources),
177 	.resource = sh_eth_resources,
178 };
179 
180 /* USB0 host */
181 static void usb0_port_power(int port, int power)
182 {
183 	gpio_set_value(GPIO_PTB4, power);
184 }
185 
186 static struct r8a66597_platdata usb0_host_data = {
187 	.on_chip = 1,
188 	.port_power = usb0_port_power,
189 };
190 
191 static struct resource usb0_host_resources[] = {
192 	[0] = {
193 		.start	= 0xa4d80000,
194 		.end	= 0xa4d80124 - 1,
195 		.flags	= IORESOURCE_MEM,
196 	},
197 	[1] = {
198 		.start	= evt2irq(0xa20),
199 		.end	= evt2irq(0xa20),
200 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
201 	},
202 };
203 
204 static struct platform_device usb0_host_device = {
205 	.name		= "r8a66597_hcd",
206 	.id		= 0,
207 	.dev = {
208 		.dma_mask		= NULL,         /*  not use dma */
209 		.coherent_dma_mask	= 0xffffffff,
210 		.platform_data		= &usb0_host_data,
211 	},
212 	.num_resources	= ARRAY_SIZE(usb0_host_resources),
213 	.resource	= usb0_host_resources,
214 };
215 
216 /* USB1 host/function */
217 static void usb1_port_power(int port, int power)
218 {
219 	gpio_set_value(GPIO_PTB5, power);
220 }
221 
222 static struct r8a66597_platdata usb1_common_data = {
223 	.on_chip = 1,
224 	.port_power = usb1_port_power,
225 };
226 
227 static struct resource usb1_common_resources[] = {
228 	[0] = {
229 		.start	= 0xa4d90000,
230 		.end	= 0xa4d90124 - 1,
231 		.flags	= IORESOURCE_MEM,
232 	},
233 	[1] = {
234 		.start	= evt2irq(0xa40),
235 		.end	= evt2irq(0xa40),
236 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
237 	},
238 };
239 
240 static struct platform_device usb1_common_device = {
241 	/* .name will be added in arch_setup */
242 	.id		= 1,
243 	.dev = {
244 		.dma_mask		= NULL,         /*  not use dma */
245 		.coherent_dma_mask	= 0xffffffff,
246 		.platform_data		= &usb1_common_data,
247 	},
248 	.num_resources	= ARRAY_SIZE(usb1_common_resources),
249 	.resource	= usb1_common_resources,
250 };
251 
252 /*
253  * USBHS
254  */
255 static int usbhs_get_id(struct platform_device *pdev)
256 {
257 	return gpio_get_value(GPIO_PTB3);
258 }
259 
260 static int usbhs_phy_reset(struct platform_device *pdev)
261 {
262 	/* enable vbus if HOST */
263 	if (!gpio_get_value(GPIO_PTB3))
264 		gpio_set_value(GPIO_PTB5, 1);
265 
266 	return 0;
267 }
268 
269 static struct renesas_usbhs_platform_info usbhs_info = {
270 	.platform_callback = {
271 		.get_id		= usbhs_get_id,
272 		.phy_reset	= usbhs_phy_reset,
273 	},
274 	.driver_param = {
275 		.buswait_bwait		= 4,
276 		.detection_delay	= 5,
277 		.d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
278 		.d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
279 		.d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
280 		.d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
281 	},
282 };
283 
284 static struct resource usbhs_resources[] = {
285 	[0] = {
286 		.start	= 0xa4d90000,
287 		.end	= 0xa4d90124 - 1,
288 		.flags	= IORESOURCE_MEM,
289 	},
290 	[1] = {
291 		.start	= evt2irq(0xa40),
292 		.end	= evt2irq(0xa40),
293 		.flags	= IORESOURCE_IRQ,
294 	},
295 };
296 
297 static struct platform_device usbhs_device = {
298 	.name	= "renesas_usbhs",
299 	.id	= 1,
300 	.dev = {
301 		.dma_mask		= NULL,         /*  not use dma */
302 		.coherent_dma_mask	= 0xffffffff,
303 		.platform_data		= &usbhs_info,
304 	},
305 	.num_resources	= ARRAY_SIZE(usbhs_resources),
306 	.resource	= usbhs_resources,
307 };
308 
309 /* LCDC and backlight */
310 static const struct fb_videomode ecovec_lcd_modes[] = {
311 	{
312 		.name		= "Panel",
313 		.xres		= 800,
314 		.yres		= 480,
315 		.left_margin	= 220,
316 		.right_margin	= 110,
317 		.hsync_len	= 70,
318 		.upper_margin	= 20,
319 		.lower_margin	= 5,
320 		.vsync_len	= 5,
321 		.sync		= 0, /* hsync and vsync are active low */
322 	},
323 };
324 
325 static const struct fb_videomode ecovec_dvi_modes[] = {
326 	{
327 		.name		= "DVI",
328 		.xres		= 1280,
329 		.yres		= 720,
330 		.left_margin	= 220,
331 		.right_margin	= 110,
332 		.hsync_len	= 40,
333 		.upper_margin	= 20,
334 		.lower_margin	= 5,
335 		.vsync_len	= 5,
336 		.sync = 0, /* hsync and vsync are active low */
337 	},
338 };
339 
340 static struct sh_mobile_lcdc_info lcdc_info = {
341 	.ch[0] = {
342 		.interface_type = RGB18,
343 		.chan = LCDC_CHAN_MAINLCD,
344 		.fourcc = V4L2_PIX_FMT_RGB565,
345 		.panel_cfg = { /* 7.0 inch */
346 			.width = 152,
347 			.height = 91,
348 		},
349 	}
350 };
351 
352 static struct resource lcdc_resources[] = {
353 	[0] = {
354 		.name	= "LCDC",
355 		.start	= 0xfe940000,
356 		.end	= 0xfe942fff,
357 		.flags	= IORESOURCE_MEM,
358 	},
359 	[1] = {
360 		.start	= evt2irq(0xf40),
361 		.flags	= IORESOURCE_IRQ,
362 	},
363 };
364 
365 static struct platform_device lcdc_device = {
366 	.name		= "sh_mobile_lcdc_fb",
367 	.num_resources	= ARRAY_SIZE(lcdc_resources),
368 	.resource	= lcdc_resources,
369 	.dev		= {
370 		.platform_data	= &lcdc_info,
371 	},
372 };
373 
374 static struct gpiod_lookup_table gpio_backlight_lookup = {
375 	.dev_id		= "gpio-backlight.0",
376 	.table = {
377 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTR1, NULL, GPIO_ACTIVE_HIGH),
378 		{ }
379 	},
380 };
381 
382 static struct property_entry gpio_backlight_props[] = {
383 	PROPERTY_ENTRY_BOOL("default-on"),
384 	{ }
385 };
386 
387 static struct gpio_backlight_platform_data gpio_backlight_data = {
388 	.fbdev = &lcdc_device.dev,
389 };
390 
391 static const struct platform_device_info gpio_backlight_device_info = {
392 	.name = "gpio-backlight",
393 	.data = &gpio_backlight_data,
394 	.size_data = sizeof(gpio_backlight_data),
395 	.properties = gpio_backlight_props,
396 };
397 
398 static struct platform_device *gpio_backlight_device;
399 
400 /* CEU0 */
401 static struct ceu_platform_data ceu0_pdata = {
402 	.num_subdevs			= 2,
403 	.subdevs = {
404 		{ /* [0] = mt9t112  */
405 			.flags		= 0,
406 			.bus_width	= 8,
407 			.bus_shift	= 0,
408 			.i2c_adapter_id	= 0,
409 			.i2c_address	= 0x3c,
410 		},
411 		{ /* [1] = tw9910  */
412 			.flags		= 0,
413 			.bus_width	= 8,
414 			.bus_shift	= 0,
415 			.i2c_adapter_id	= 0,
416 			.i2c_address	= 0x45,
417 		},
418 	},
419 };
420 
421 static struct resource ceu0_resources[] = {
422 	[0] = {
423 		.name	= "CEU0",
424 		.start	= 0xfe910000,
425 		.end	= 0xfe91009f,
426 		.flags	= IORESOURCE_MEM,
427 	},
428 	[1] = {
429 		.start  = evt2irq(0x880),
430 		.flags  = IORESOURCE_IRQ,
431 	},
432 };
433 
434 static struct platform_device ceu0_device = {
435 	.name		= "renesas-ceu",
436 	.id             = 0, /* ceu.0 */
437 	.num_resources	= ARRAY_SIZE(ceu0_resources),
438 	.resource	= ceu0_resources,
439 	.dev	= {
440 		.platform_data	= &ceu0_pdata,
441 	},
442 };
443 
444 /* CEU1 */
445 static struct ceu_platform_data ceu1_pdata = {
446 	.num_subdevs			= 1,
447 	.subdevs = {
448 		{ /* [0] = mt9t112  */
449 			.flags		= 0,
450 			.bus_width	= 8,
451 			.bus_shift	= 0,
452 			.i2c_adapter_id	= 1,
453 			.i2c_address	= 0x3c,
454 		},
455 	},
456 };
457 
458 static struct resource ceu1_resources[] = {
459 	[0] = {
460 		.name	= "CEU1",
461 		.start	= 0xfe914000,
462 		.end	= 0xfe91409f,
463 		.flags	= IORESOURCE_MEM,
464 	},
465 	[1] = {
466 		.start  = evt2irq(0x9e0),
467 		.flags  = IORESOURCE_IRQ,
468 	},
469 };
470 
471 static struct platform_device ceu1_device = {
472 	.name		= "renesas-ceu",
473 	.id             = 1, /* ceu.1 */
474 	.num_resources	= ARRAY_SIZE(ceu1_resources),
475 	.resource	= ceu1_resources,
476 	.dev	= {
477 		.platform_data	= &ceu1_pdata,
478 	},
479 };
480 
481 /* Power up/down GPIOs for camera devices and video decoder */
482 static struct gpiod_lookup_table tw9910_gpios = {
483 	.dev_id		= "0-0045",
484 	.table		= {
485 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTU2, "pdn", GPIO_ACTIVE_HIGH),
486 	},
487 };
488 
489 static struct gpiod_lookup_table mt9t112_0_gpios = {
490 	.dev_id		= "0-003c",
491 	.table		= {
492 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTA3, "standby",
493 			    GPIO_ACTIVE_HIGH),
494 	},
495 };
496 
497 static struct gpiod_lookup_table mt9t112_1_gpios = {
498 	.dev_id		= "1-003c",
499 	.table		= {
500 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTA4, "standby",
501 			    GPIO_ACTIVE_HIGH),
502 	},
503 };
504 
505 /* I2C device */
506 static struct tw9910_video_info tw9910_info = {
507 	.buswidth	= 8,
508 	.mpout		= TW9910_MPO_FIELD,
509 };
510 
511 static struct mt9t112_platform_data mt9t112_0_pdata = {
512 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE,
513 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
514 };
515 
516 static struct mt9t112_platform_data mt9t112_1_pdata = {
517 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE,
518 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
519 };
520 
521 static struct i2c_board_info i2c0_devices[] = {
522 	{
523 		I2C_BOARD_INFO("da7210", 0x1a),
524 	},
525 	{
526 		I2C_BOARD_INFO("tw9910", 0x45),
527 		.platform_data = &tw9910_info,
528 	},
529 	{
530 		/* 1st camera */
531 		I2C_BOARD_INFO("mt9t112", 0x3c),
532 		.platform_data = &mt9t112_0_pdata,
533 	},
534 };
535 
536 static struct i2c_board_info i2c1_devices[] = {
537 	{
538 		I2C_BOARD_INFO("r2025sd", 0x32),
539 	},
540 	{
541 		I2C_BOARD_INFO("lis3lv02d", 0x1c),
542 		.irq = evt2irq(0x620),
543 	},
544 	{
545 		/* 2nd camera */
546 		I2C_BOARD_INFO("mt9t112", 0x3c),
547 		.platform_data = &mt9t112_1_pdata,
548 	},
549 };
550 
551 /* KEYSC */
552 static struct sh_keysc_info keysc_info = {
553 	.mode		= SH_KEYSC_MODE_1,
554 	.scan_timing	= 3,
555 	.delay		= 50,
556 	.kycr2_delay	= 100,
557 	.keycodes	= { KEY_1, 0, 0, 0, 0,
558 			    KEY_2, 0, 0, 0, 0,
559 			    KEY_3, 0, 0, 0, 0,
560 			    KEY_4, 0, 0, 0, 0,
561 			    KEY_5, 0, 0, 0, 0,
562 			    KEY_6, 0, 0, 0, 0, },
563 };
564 
565 static struct resource keysc_resources[] = {
566 	[0] = {
567 		.name	= "KEYSC",
568 		.start  = 0x044b0000,
569 		.end    = 0x044b000f,
570 		.flags  = IORESOURCE_MEM,
571 	},
572 	[1] = {
573 		.start  = evt2irq(0xbe0),
574 		.flags  = IORESOURCE_IRQ,
575 	},
576 };
577 
578 static struct platform_device keysc_device = {
579 	.name           = "sh_keysc",
580 	.id             = 0, /* keysc0 clock */
581 	.num_resources  = ARRAY_SIZE(keysc_resources),
582 	.resource       = keysc_resources,
583 	.dev	= {
584 		.platform_data	= &keysc_info,
585 	},
586 };
587 
588 /* TouchScreen */
589 #define IRQ0 evt2irq(0x600)
590 
591 static int ts_get_pendown_state(struct device *dev)
592 {
593 	int val = 0;
594 	gpio_free(GPIO_FN_INTC_IRQ0);
595 	gpio_request(GPIO_PTZ0, NULL);
596 	gpio_direction_input(GPIO_PTZ0);
597 
598 	val = gpio_get_value(GPIO_PTZ0);
599 
600 	gpio_free(GPIO_PTZ0);
601 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
602 
603 	return val ? 0 : 1;
604 }
605 
606 static int ts_init(void)
607 {
608 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
609 	return 0;
610 }
611 
612 static struct tsc2007_platform_data tsc2007_info = {
613 	.model			= 2007,
614 	.x_plate_ohms		= 180,
615 	.get_pendown_state	= ts_get_pendown_state,
616 	.init_platform_hw	= ts_init,
617 };
618 
619 static struct i2c_board_info ts_i2c_clients = {
620 	I2C_BOARD_INFO("tsc2007", 0x48),
621 	.type		= "tsc2007",
622 	.platform_data	= &tsc2007_info,
623 	.irq		= IRQ0,
624 };
625 
626 static struct regulator_consumer_supply cn12_power_consumers[] =
627 {
628 	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
629 	REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
630 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
631 	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
632 };
633 
634 static struct regulator_init_data cn12_power_init_data = {
635 	.constraints = {
636 		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
637 	},
638 	.num_consumer_supplies  = ARRAY_SIZE(cn12_power_consumers),
639 	.consumer_supplies      = cn12_power_consumers,
640 };
641 
642 static struct fixed_voltage_config cn12_power_info = {
643 	.supply_name = "CN12 SD/MMC Vdd",
644 	.microvolts = 3300000,
645 	.init_data = &cn12_power_init_data,
646 };
647 
648 static struct platform_device cn12_power = {
649 	.name = "reg-fixed-voltage",
650 	.id   = 0,
651 	.dev  = {
652 		.platform_data = &cn12_power_info,
653 	},
654 };
655 
656 static struct gpiod_lookup_table cn12_power_gpiod_table = {
657 	.dev_id = "reg-fixed-voltage.0",
658 	.table = {
659 		/* Offset 7 on port B */
660 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTB7,
661 			    NULL, GPIO_ACTIVE_HIGH),
662 		{ },
663 	},
664 };
665 
666 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
667 /* SDHI0 */
668 static struct regulator_consumer_supply sdhi0_power_consumers[] =
669 {
670 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
671 	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
672 };
673 
674 static struct regulator_init_data sdhi0_power_init_data = {
675 	.constraints = {
676 		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
677 	},
678 	.num_consumer_supplies  = ARRAY_SIZE(sdhi0_power_consumers),
679 	.consumer_supplies      = sdhi0_power_consumers,
680 };
681 
682 static struct fixed_voltage_config sdhi0_power_info = {
683 	.supply_name = "CN11 SD/MMC Vdd",
684 	.microvolts = 3300000,
685 	.init_data = &sdhi0_power_init_data,
686 };
687 
688 static struct platform_device sdhi0_power = {
689 	.name = "reg-fixed-voltage",
690 	.id   = 1,
691 	.dev  = {
692 		.platform_data = &sdhi0_power_info,
693 	},
694 };
695 
696 static struct gpiod_lookup_table sdhi0_power_gpiod_table = {
697 	.dev_id = "reg-fixed-voltage.1",
698 	.table = {
699 		/* Offset 6 on port B */
700 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTB6,
701 			    NULL, GPIO_ACTIVE_HIGH),
702 		{ },
703 	},
704 };
705 
706 static struct gpiod_lookup_table sdhi0_gpio_table = {
707 	.dev_id = "sh_mobile_sdhi.0",
708 	.table = {
709 		/* Card detect */
710 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTY7, "cd", GPIO_ACTIVE_LOW),
711 		{ },
712 	},
713 };
714 
715 static struct tmio_mmc_data sdhi0_info = {
716 	.chan_priv_tx	= (void *)SHDMA_SLAVE_SDHI0_TX,
717 	.chan_priv_rx	= (void *)SHDMA_SLAVE_SDHI0_RX,
718 	.capabilities	= MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
719 			  MMC_CAP_NEEDS_POLL,
720 };
721 
722 static struct resource sdhi0_resources[] = {
723 	[0] = {
724 		.name	= "SDHI0",
725 		.start  = 0x04ce0000,
726 		.end    = 0x04ce00ff,
727 		.flags  = IORESOURCE_MEM,
728 	},
729 	[1] = {
730 		.start  = evt2irq(0xe80),
731 		.flags  = IORESOURCE_IRQ,
732 	},
733 };
734 
735 static struct platform_device sdhi0_device = {
736 	.name           = "sh_mobile_sdhi",
737 	.num_resources  = ARRAY_SIZE(sdhi0_resources),
738 	.resource       = sdhi0_resources,
739 	.id             = 0,
740 	.dev	= {
741 		.platform_data	= &sdhi0_info,
742 	},
743 };
744 
745 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
746 /* SDHI1 */
747 static struct tmio_mmc_data sdhi1_info = {
748 	.chan_priv_tx	= (void *)SHDMA_SLAVE_SDHI1_TX,
749 	.chan_priv_rx	= (void *)SHDMA_SLAVE_SDHI1_RX,
750 	.capabilities	= MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
751 			  MMC_CAP_NEEDS_POLL,
752 };
753 
754 static struct gpiod_lookup_table sdhi1_gpio_table = {
755 	.dev_id = "sh_mobile_sdhi.1",
756 	.table = {
757 		/* Card detect */
758 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTW7, "cd", GPIO_ACTIVE_LOW),
759 		{ },
760 	},
761 };
762 
763 static struct resource sdhi1_resources[] = {
764 	[0] = {
765 		.name	= "SDHI1",
766 		.start  = 0x04cf0000,
767 		.end    = 0x04cf00ff,
768 		.flags  = IORESOURCE_MEM,
769 	},
770 	[1] = {
771 		.start  = evt2irq(0x4e0),
772 		.flags  = IORESOURCE_IRQ,
773 	},
774 };
775 
776 static struct platform_device sdhi1_device = {
777 	.name           = "sh_mobile_sdhi",
778 	.num_resources  = ARRAY_SIZE(sdhi1_resources),
779 	.resource       = sdhi1_resources,
780 	.id             = 1,
781 	.dev	= {
782 		.platform_data	= &sdhi1_info,
783 	},
784 };
785 #endif /* CONFIG_MMC_SH_MMCIF */
786 
787 #else
788 
789 /* MMC SPI */
790 static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
791 {
792 	gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
793 }
794 
795 static struct mmc_spi_platform_data mmc_spi_info = {
796 	.caps = MMC_CAP_NEEDS_POLL,
797 	.caps2 = MMC_CAP2_RO_ACTIVE_HIGH,
798 	.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
799 	.setpower = mmc_spi_setpower,
800 };
801 
802 static struct gpiod_lookup_table mmc_spi_gpio_table = {
803 	.dev_id = "mmc_spi.0", /* device "mmc_spi" @ CS0 */
804 	.table = {
805 		/* Card detect */
806 		GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY7, NULL, 0,
807 				GPIO_ACTIVE_LOW),
808 		/* Write protect */
809 		GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY6, NULL, 1,
810 				GPIO_ACTIVE_HIGH),
811 		{ },
812 	},
813 };
814 
815 static struct spi_board_info spi_bus[] = {
816 	{
817 		.modalias	= "mmc_spi",
818 		.platform_data	= &mmc_spi_info,
819 		.max_speed_hz	= 5000000,
820 		.mode		= SPI_MODE_0,
821 	},
822 };
823 
824 /* MSIOF0 */
825 static struct sh_msiof_spi_info msiof0_data = {
826 	.num_chipselect = 1,
827 };
828 
829 static struct resource msiof0_resources[] = {
830 	[0] = {
831 		.name	= "MSIOF0",
832 		.start	= 0xa4c40000,
833 		.end	= 0xa4c40063,
834 		.flags	= IORESOURCE_MEM,
835 	},
836 	[1] = {
837 		.start	= evt2irq(0xc80),
838 		.flags	= IORESOURCE_IRQ,
839 	},
840 };
841 
842 static struct platform_device msiof0_device = {
843 	.name		= "spi_sh_msiof",
844 	.id		= 0, /* MSIOF0 */
845 	.dev = {
846 		.platform_data = &msiof0_data,
847 	},
848 	.num_resources	= ARRAY_SIZE(msiof0_resources),
849 	.resource	= msiof0_resources,
850 };
851 
852 static struct gpiod_lookup_table msiof_gpio_table = {
853 	.dev_id = "spi_sh_msiof.0",
854 	.table = {
855 		GPIO_LOOKUP("sh7724_pfc", GPIO_PTM4, "cs", GPIO_ACTIVE_HIGH),
856 		{ },
857 	},
858 };
859 
860 #endif
861 
862 /* FSI */
863 static struct resource fsi_resources[] = {
864 	[0] = {
865 		.name	= "FSI",
866 		.start	= 0xFE3C0000,
867 		.end	= 0xFE3C021d,
868 		.flags	= IORESOURCE_MEM,
869 	},
870 	[1] = {
871 		.start  = evt2irq(0xf80),
872 		.flags  = IORESOURCE_IRQ,
873 	},
874 };
875 
876 static struct platform_device fsi_device = {
877 	.name		= "sh_fsi",
878 	.id		= 0,
879 	.num_resources	= ARRAY_SIZE(fsi_resources),
880 	.resource	= fsi_resources,
881 };
882 
883 static struct asoc_simple_card_info fsi_da7210_info = {
884 	.name		= "DA7210",
885 	.card		= "FSIB-DA7210",
886 	.codec		= "da7210.0-001a",
887 	.platform	= "sh_fsi.0",
888 	.daifmt		= SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
889 	.cpu_dai = {
890 		.name	= "fsib-dai",
891 	},
892 	.codec_dai = {
893 		.name	= "da7210-hifi",
894 	},
895 };
896 
897 static struct platform_device fsi_da7210_device = {
898 	.name	= "asoc-simple-card",
899 	.dev	= {
900 		.platform_data	= &fsi_da7210_info,
901 		.coherent_dma_mask = DMA_BIT_MASK(32),
902 		.dma_mask = &fsi_da7210_device.dev.coherent_dma_mask,
903 	},
904 };
905 
906 
907 /* IrDA */
908 static struct resource irda_resources[] = {
909 	[0] = {
910 		.name	= "IrDA",
911 		.start  = 0xA45D0000,
912 		.end    = 0xA45D0049,
913 		.flags  = IORESOURCE_MEM,
914 	},
915 	[1] = {
916 		.start  = evt2irq(0x480),
917 		.flags  = IORESOURCE_IRQ,
918 	},
919 };
920 
921 static struct platform_device irda_device = {
922 	.name           = "sh_sir",
923 	.num_resources  = ARRAY_SIZE(irda_resources),
924 	.resource       = irda_resources,
925 };
926 
927 #include <media/i2c/ak881x.h>
928 #include <media/drv-intf/sh_vou.h>
929 
930 static struct ak881x_pdata ak881x_pdata = {
931 	.flags = AK881X_IF_MODE_SLAVE,
932 };
933 
934 static struct i2c_board_info ak8813 = {
935 	I2C_BOARD_INFO("ak8813", 0x20),
936 	.platform_data = &ak881x_pdata,
937 };
938 
939 static struct sh_vou_pdata sh_vou_pdata = {
940 	.bus_fmt	= SH_VOU_BUS_8BIT,
941 	.flags		= SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
942 	.board_info	= &ak8813,
943 	.i2c_adap	= 0,
944 };
945 
946 static struct resource sh_vou_resources[] = {
947 	[0] = {
948 		.start  = 0xfe960000,
949 		.end    = 0xfe962043,
950 		.flags  = IORESOURCE_MEM,
951 	},
952 	[1] = {
953 		.start  = evt2irq(0x8e0),
954 		.flags  = IORESOURCE_IRQ,
955 	},
956 };
957 
958 static struct platform_device vou_device = {
959 	.name           = "sh-vou",
960 	.id		= -1,
961 	.num_resources  = ARRAY_SIZE(sh_vou_resources),
962 	.resource       = sh_vou_resources,
963 	.dev		= {
964 		.platform_data	= &sh_vou_pdata,
965 	},
966 };
967 
968 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
969 /* SH_MMCIF */
970 static struct resource sh_mmcif_resources[] = {
971 	[0] = {
972 		.name	= "SH_MMCIF",
973 		.start	= 0xA4CA0000,
974 		.end	= 0xA4CA00FF,
975 		.flags	= IORESOURCE_MEM,
976 	},
977 	[1] = {
978 		/* MMC2I */
979 		.start	= evt2irq(0x5a0),
980 		.flags	= IORESOURCE_IRQ,
981 	},
982 	[2] = {
983 		/* MMC3I */
984 		.start	= evt2irq(0x5c0),
985 		.flags	= IORESOURCE_IRQ,
986 	},
987 };
988 
989 static struct sh_mmcif_plat_data sh_mmcif_plat = {
990 	.sup_pclk	= 0, /* SH7724: Max Pclk/2 */
991 	.caps		= MMC_CAP_4_BIT_DATA |
992 			  MMC_CAP_8_BIT_DATA |
993 			  MMC_CAP_NEEDS_POLL,
994 	.ocr		= MMC_VDD_32_33 | MMC_VDD_33_34,
995 };
996 
997 static struct platform_device sh_mmcif_device = {
998 	.name		= "sh_mmcif",
999 	.id		= 0,
1000 	.dev		= {
1001 		.platform_data		= &sh_mmcif_plat,
1002 	},
1003 	.num_resources	= ARRAY_SIZE(sh_mmcif_resources),
1004 	.resource	= sh_mmcif_resources,
1005 };
1006 #endif
1007 
1008 static struct platform_device *ecovec_ceu_devices[] __initdata = {
1009 	&ceu0_device,
1010 	&ceu1_device,
1011 };
1012 
1013 static struct platform_device *ecovec_devices[] __initdata = {
1014 	&heartbeat_device,
1015 	&nor_flash_device,
1016 	&sh_eth_device,
1017 	&usb0_host_device,
1018 	&usb1_common_device,
1019 	&usbhs_device,
1020 	&lcdc_device,
1021 	&keysc_device,
1022 	&cn12_power,
1023 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1024 	&sdhi0_power,
1025 	&sdhi0_device,
1026 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1027 	&sdhi1_device,
1028 #endif
1029 #else
1030 	&msiof0_device,
1031 #endif
1032 	&fsi_device,
1033 	&fsi_da7210_device,
1034 	&irda_device,
1035 	&vou_device,
1036 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1037 	&sh_mmcif_device,
1038 #endif
1039 };
1040 
1041 #ifdef CONFIG_I2C
1042 #define EEPROM_ADDR 0x50
1043 static u8 mac_read(struct i2c_adapter *a, u8 command)
1044 {
1045 	struct i2c_msg msg[2];
1046 	u8 buf;
1047 	int ret;
1048 
1049 	msg[0].addr  = EEPROM_ADDR;
1050 	msg[0].flags = 0;
1051 	msg[0].len   = 1;
1052 	msg[0].buf   = &command;
1053 
1054 	msg[1].addr  = EEPROM_ADDR;
1055 	msg[1].flags = I2C_M_RD;
1056 	msg[1].len   = 1;
1057 	msg[1].buf   = &buf;
1058 
1059 	ret = i2c_transfer(a, msg, 2);
1060 	if (ret < 0) {
1061 		printk(KERN_ERR "error %d\n", ret);
1062 		buf = 0xff;
1063 	}
1064 
1065 	return buf;
1066 }
1067 
1068 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1069 {
1070 	struct i2c_adapter *a = i2c_get_adapter(1);
1071 	int i;
1072 
1073 	if (!a) {
1074 		pr_err("can not get I2C 1\n");
1075 		return;
1076 	}
1077 
1078 	/* read MAC address from EEPROM */
1079 	for (i = 0; i < sizeof(pd->mac_addr); i++) {
1080 		pd->mac_addr[i] = mac_read(a, 0x10 + i);
1081 		msleep(10);
1082 	}
1083 
1084 	i2c_put_adapter(a);
1085 }
1086 #else
1087 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
1088 {
1089 	pr_err("unable to read sh_eth MAC address\n");
1090 }
1091 #endif
1092 
1093 #define PORT_HIZA 0xA4050158
1094 #define IODRIVEA  0xA405018A
1095 
1096 extern char ecovec24_sdram_enter_start;
1097 extern char ecovec24_sdram_enter_end;
1098 extern char ecovec24_sdram_leave_start;
1099 extern char ecovec24_sdram_leave_end;
1100 
1101 static int __init arch_setup(void)
1102 {
1103 	struct clk *clk;
1104 	bool cn12_enabled = false;
1105 
1106 	/* register board specific self-refresh code */
1107 	sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1108 					SUSP_SH_RSTANDBY,
1109 					&ecovec24_sdram_enter_start,
1110 					&ecovec24_sdram_enter_end,
1111 					&ecovec24_sdram_leave_start,
1112 					&ecovec24_sdram_leave_end);
1113 
1114 	/* enable STATUS0, STATUS2 and PDSTATUS */
1115 	gpio_request(GPIO_FN_STATUS0, NULL);
1116 	gpio_request(GPIO_FN_STATUS2, NULL);
1117 	gpio_request(GPIO_FN_PDSTATUS, NULL);
1118 
1119 	/* enable SCIFA0 */
1120 	gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1121 	gpio_request(GPIO_FN_SCIF0_RXD, NULL);
1122 
1123 	/* enable debug LED */
1124 	gpio_request(GPIO_PTG0, NULL);
1125 	gpio_request(GPIO_PTG1, NULL);
1126 	gpio_request(GPIO_PTG2, NULL);
1127 	gpio_request(GPIO_PTG3, NULL);
1128 	gpio_direction_output(GPIO_PTG0, 0);
1129 	gpio_direction_output(GPIO_PTG1, 0);
1130 	gpio_direction_output(GPIO_PTG2, 0);
1131 	gpio_direction_output(GPIO_PTG3, 0);
1132 	__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
1133 
1134 	/* enable SH-Eth */
1135 	gpio_request(GPIO_PTA1, NULL);
1136 	gpio_direction_output(GPIO_PTA1, 1);
1137 	mdelay(20);
1138 
1139 	gpio_request(GPIO_FN_RMII_RXD0,    NULL);
1140 	gpio_request(GPIO_FN_RMII_RXD1,    NULL);
1141 	gpio_request(GPIO_FN_RMII_TXD0,    NULL);
1142 	gpio_request(GPIO_FN_RMII_TXD1,    NULL);
1143 	gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1144 	gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
1145 	gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
1146 	gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
1147 	gpio_request(GPIO_FN_MDIO,         NULL);
1148 	gpio_request(GPIO_FN_MDC,          NULL);
1149 	gpio_request(GPIO_FN_LNKSTA,       NULL);
1150 
1151 	/* enable USB */
1152 	__raw_writew(0x0000, 0xA4D80000);
1153 	__raw_writew(0x0000, 0xA4D90000);
1154 	gpio_request(GPIO_PTB3,  NULL);
1155 	gpio_request(GPIO_PTB4,  NULL);
1156 	gpio_request(GPIO_PTB5,  NULL);
1157 	gpio_direction_input(GPIO_PTB3);
1158 	gpio_direction_output(GPIO_PTB4, 0);
1159 	gpio_direction_output(GPIO_PTB5, 0);
1160 	__raw_writew(0x0600, 0xa40501d4);
1161 	__raw_writew(0x0600, 0xa4050192);
1162 
1163 	if (gpio_get_value(GPIO_PTB3)) {
1164 		printk(KERN_INFO "USB1 function is selected\n");
1165 		usb1_common_device.name = "r8a66597_udc";
1166 	} else {
1167 		printk(KERN_INFO "USB1 host is selected\n");
1168 		usb1_common_device.name = "r8a66597_hcd";
1169 	}
1170 
1171 	/* enable LCDC */
1172 	gpio_request(GPIO_FN_LCDD23,   NULL);
1173 	gpio_request(GPIO_FN_LCDD22,   NULL);
1174 	gpio_request(GPIO_FN_LCDD21,   NULL);
1175 	gpio_request(GPIO_FN_LCDD20,   NULL);
1176 	gpio_request(GPIO_FN_LCDD19,   NULL);
1177 	gpio_request(GPIO_FN_LCDD18,   NULL);
1178 	gpio_request(GPIO_FN_LCDD17,   NULL);
1179 	gpio_request(GPIO_FN_LCDD16,   NULL);
1180 	gpio_request(GPIO_FN_LCDD15,   NULL);
1181 	gpio_request(GPIO_FN_LCDD14,   NULL);
1182 	gpio_request(GPIO_FN_LCDD13,   NULL);
1183 	gpio_request(GPIO_FN_LCDD12,   NULL);
1184 	gpio_request(GPIO_FN_LCDD11,   NULL);
1185 	gpio_request(GPIO_FN_LCDD10,   NULL);
1186 	gpio_request(GPIO_FN_LCDD9,    NULL);
1187 	gpio_request(GPIO_FN_LCDD8,    NULL);
1188 	gpio_request(GPIO_FN_LCDD7,    NULL);
1189 	gpio_request(GPIO_FN_LCDD6,    NULL);
1190 	gpio_request(GPIO_FN_LCDD5,    NULL);
1191 	gpio_request(GPIO_FN_LCDD4,    NULL);
1192 	gpio_request(GPIO_FN_LCDD3,    NULL);
1193 	gpio_request(GPIO_FN_LCDD2,    NULL);
1194 	gpio_request(GPIO_FN_LCDD1,    NULL);
1195 	gpio_request(GPIO_FN_LCDD0,    NULL);
1196 	gpio_request(GPIO_FN_LCDDISP,  NULL);
1197 	gpio_request(GPIO_FN_LCDHSYN,  NULL);
1198 	gpio_request(GPIO_FN_LCDDCK,   NULL);
1199 	gpio_request(GPIO_FN_LCDVSYN,  NULL);
1200 	gpio_request(GPIO_FN_LCDDON,   NULL);
1201 	gpio_request(GPIO_FN_LCDLCLK,  NULL);
1202 	__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
1203 
1204 	gpio_request(GPIO_PTE6, NULL);
1205 	gpio_request(GPIO_PTU1, NULL);
1206 	gpio_request(GPIO_PTA2, NULL);
1207 	gpio_direction_input(GPIO_PTE6);
1208 	gpio_direction_output(GPIO_PTU1, 0);
1209 	gpio_direction_output(GPIO_PTA2, 0);
1210 
1211 	/* I/O buffer drive ability is high */
1212 	__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
1213 
1214 	if (gpio_get_value(GPIO_PTE6)) {
1215 		/* DVI */
1216 		lcdc_info.clock_source			= LCDC_CLK_EXTERNAL;
1217 		lcdc_info.ch[0].clock_divider		= 1;
1218 		lcdc_info.ch[0].lcd_modes		= ecovec_dvi_modes;
1219 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_dvi_modes);
1220 
1221 		/* No backlight */
1222 		gpio_backlight_data.fbdev = NULL;
1223 
1224 		gpio_set_value(GPIO_PTA2, 1);
1225 		gpio_set_value(GPIO_PTU1, 1);
1226 	} else {
1227 		/* Panel */
1228 		lcdc_info.clock_source			= LCDC_CLK_PERIPHERAL;
1229 		lcdc_info.ch[0].clock_divider		= 2;
1230 		lcdc_info.ch[0].lcd_modes		= ecovec_lcd_modes;
1231 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_lcd_modes);
1232 
1233 		/* FIXME
1234 		 *
1235 		 * LCDDON control is needed for Panel,
1236 		 * but current sh_mobile_lcdc driver doesn't control it.
1237 		 * It is temporary correspondence
1238 		 */
1239 		gpio_request(GPIO_PTF4, NULL);
1240 		gpio_direction_output(GPIO_PTF4, 1);
1241 
1242 		/* enable TouchScreen */
1243 		i2c_register_board_info(0, &ts_i2c_clients, 1);
1244 		irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
1245 	}
1246 
1247 	/* enable CEU0 */
1248 	gpio_request(GPIO_FN_VIO0_D15, NULL);
1249 	gpio_request(GPIO_FN_VIO0_D14, NULL);
1250 	gpio_request(GPIO_FN_VIO0_D13, NULL);
1251 	gpio_request(GPIO_FN_VIO0_D12, NULL);
1252 	gpio_request(GPIO_FN_VIO0_D11, NULL);
1253 	gpio_request(GPIO_FN_VIO0_D10, NULL);
1254 	gpio_request(GPIO_FN_VIO0_D9,  NULL);
1255 	gpio_request(GPIO_FN_VIO0_D8,  NULL);
1256 	gpio_request(GPIO_FN_VIO0_D7,  NULL);
1257 	gpio_request(GPIO_FN_VIO0_D6,  NULL);
1258 	gpio_request(GPIO_FN_VIO0_D5,  NULL);
1259 	gpio_request(GPIO_FN_VIO0_D4,  NULL);
1260 	gpio_request(GPIO_FN_VIO0_D3,  NULL);
1261 	gpio_request(GPIO_FN_VIO0_D2,  NULL);
1262 	gpio_request(GPIO_FN_VIO0_D1,  NULL);
1263 	gpio_request(GPIO_FN_VIO0_D0,  NULL);
1264 	gpio_request(GPIO_FN_VIO0_VD,  NULL);
1265 	gpio_request(GPIO_FN_VIO0_CLK, NULL);
1266 	gpio_request(GPIO_FN_VIO0_FLD, NULL);
1267 	gpio_request(GPIO_FN_VIO0_HD,  NULL);
1268 
1269 	/* enable CEU1 */
1270 	gpio_request(GPIO_FN_VIO1_D7,  NULL);
1271 	gpio_request(GPIO_FN_VIO1_D6,  NULL);
1272 	gpio_request(GPIO_FN_VIO1_D5,  NULL);
1273 	gpio_request(GPIO_FN_VIO1_D4,  NULL);
1274 	gpio_request(GPIO_FN_VIO1_D3,  NULL);
1275 	gpio_request(GPIO_FN_VIO1_D2,  NULL);
1276 	gpio_request(GPIO_FN_VIO1_D1,  NULL);
1277 	gpio_request(GPIO_FN_VIO1_D0,  NULL);
1278 	gpio_request(GPIO_FN_VIO1_FLD, NULL);
1279 	gpio_request(GPIO_FN_VIO1_HD,  NULL);
1280 	gpio_request(GPIO_FN_VIO1_VD,  NULL);
1281 	gpio_request(GPIO_FN_VIO1_CLK, NULL);
1282 
1283 	/* enable KEYSC */
1284 	gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1285 	gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1286 	gpio_request(GPIO_FN_KEYOUT3,     NULL);
1287 	gpio_request(GPIO_FN_KEYOUT2,     NULL);
1288 	gpio_request(GPIO_FN_KEYOUT1,     NULL);
1289 	gpio_request(GPIO_FN_KEYOUT0,     NULL);
1290 	gpio_request(GPIO_FN_KEYIN0,      NULL);
1291 
1292 	/* enable user debug switch */
1293 	gpio_request(GPIO_PTR0, NULL);
1294 	gpio_request(GPIO_PTR4, NULL);
1295 	gpio_request(GPIO_PTR5, NULL);
1296 	gpio_request(GPIO_PTR6, NULL);
1297 	gpio_direction_input(GPIO_PTR0);
1298 	gpio_direction_input(GPIO_PTR4);
1299 	gpio_direction_input(GPIO_PTR5);
1300 	gpio_direction_input(GPIO_PTR6);
1301 
1302 	/* SD-card slot CN11 */
1303 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1304 	/* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1305 	gpio_request(GPIO_FN_SDHI0WP,  NULL);
1306 	gpio_request(GPIO_FN_SDHI0CMD, NULL);
1307 	gpio_request(GPIO_FN_SDHI0CLK, NULL);
1308 	gpio_request(GPIO_FN_SDHI0D3,  NULL);
1309 	gpio_request(GPIO_FN_SDHI0D2,  NULL);
1310 	gpio_request(GPIO_FN_SDHI0D1,  NULL);
1311 	gpio_request(GPIO_FN_SDHI0D0,  NULL);
1312 #else
1313 	/* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1314 	gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1315 	gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1316 	gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1317 	gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1318 	gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1319 
1320 	gpiod_add_lookup_table(&mmc_spi_gpio_table);
1321 	gpiod_add_lookup_table(&msiof_gpio_table);
1322 	spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1323 #endif
1324 
1325 	/* MMC/SD-card slot CN12 */
1326 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1327 	/* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1328 	gpio_request(GPIO_FN_MMC_D7, NULL);
1329 	gpio_request(GPIO_FN_MMC_D6, NULL);
1330 	gpio_request(GPIO_FN_MMC_D5, NULL);
1331 	gpio_request(GPIO_FN_MMC_D4, NULL);
1332 	gpio_request(GPIO_FN_MMC_D3, NULL);
1333 	gpio_request(GPIO_FN_MMC_D2, NULL);
1334 	gpio_request(GPIO_FN_MMC_D1, NULL);
1335 	gpio_request(GPIO_FN_MMC_D0, NULL);
1336 	gpio_request(GPIO_FN_MMC_CLK, NULL);
1337 	gpio_request(GPIO_FN_MMC_CMD, NULL);
1338 
1339 	cn12_enabled = true;
1340 #elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1341 	/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1342 	gpio_request(GPIO_FN_SDHI1WP,  NULL);
1343 	gpio_request(GPIO_FN_SDHI1CMD, NULL);
1344 	gpio_request(GPIO_FN_SDHI1CLK, NULL);
1345 	gpio_request(GPIO_FN_SDHI1D3,  NULL);
1346 	gpio_request(GPIO_FN_SDHI1D2,  NULL);
1347 	gpio_request(GPIO_FN_SDHI1D1,  NULL);
1348 	gpio_request(GPIO_FN_SDHI1D0,  NULL);
1349 
1350 	cn12_enabled = true;
1351 #endif
1352 
1353 	if (cn12_enabled)
1354 		/* I/O buffer drive ability is high for CN12 */
1355 		__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
1356 			     IODRIVEA);
1357 
1358 	/* enable FSI */
1359 	gpio_request(GPIO_FN_FSIMCKB,    NULL);
1360 	gpio_request(GPIO_FN_FSIIBSD,    NULL);
1361 	gpio_request(GPIO_FN_FSIOBSD,    NULL);
1362 	gpio_request(GPIO_FN_FSIIBBCK,   NULL);
1363 	gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
1364 	gpio_request(GPIO_FN_FSIOBBCK,   NULL);
1365 	gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
1366 	gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1367 
1368 	/* set SPU2 clock to 83.4 MHz */
1369 	clk = clk_get(NULL, "spu_clk");
1370 	if (!IS_ERR(clk)) {
1371 		clk_set_rate(clk, clk_round_rate(clk, 83333333));
1372 		clk_put(clk);
1373 	}
1374 
1375 	/* change parent of FSI B */
1376 	clk = clk_get(NULL, "fsib_clk");
1377 	if (!IS_ERR(clk)) {
1378 		/* 48kHz dummy clock was used to make sure 1/1 divide */
1379 		clk_set_rate(&sh7724_fsimckb_clk, 48000);
1380 		clk_set_parent(clk, &sh7724_fsimckb_clk);
1381 		clk_set_rate(clk, 48000);
1382 		clk_put(clk);
1383 	}
1384 
1385 	gpio_request(GPIO_PTU0, NULL);
1386 	gpio_direction_output(GPIO_PTU0, 0);
1387 	mdelay(20);
1388 
1389 	/* enable motion sensor */
1390 	gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1391 	gpio_direction_input(GPIO_FN_INTC_IRQ1);
1392 
1393 	/* set VPU clock to 166 MHz */
1394 	clk = clk_get(NULL, "vpu_clk");
1395 	if (!IS_ERR(clk)) {
1396 		clk_set_rate(clk, clk_round_rate(clk, 166000000));
1397 		clk_put(clk);
1398 	}
1399 
1400 	/* enable IrDA */
1401 	gpio_request(GPIO_FN_IRDA_OUT, NULL);
1402 	gpio_request(GPIO_FN_IRDA_IN,  NULL);
1403 	gpio_request(GPIO_PTU5, NULL);
1404 	gpio_direction_output(GPIO_PTU5, 0);
1405 
1406 	/* Register gpio lookup tables for cameras and video decoder */
1407 	gpiod_add_lookup_table(&tw9910_gpios);
1408 	gpiod_add_lookup_table(&mt9t112_0_gpios);
1409 	gpiod_add_lookup_table(&mt9t112_1_gpios);
1410 
1411 	/* enable I2C device */
1412 	i2c_register_board_info(0, i2c0_devices,
1413 				ARRAY_SIZE(i2c0_devices));
1414 
1415 	i2c_register_board_info(1, i2c1_devices,
1416 				ARRAY_SIZE(i2c1_devices));
1417 
1418 #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
1419 	/* VOU */
1420 	gpio_request(GPIO_FN_DV_D15, NULL);
1421 	gpio_request(GPIO_FN_DV_D14, NULL);
1422 	gpio_request(GPIO_FN_DV_D13, NULL);
1423 	gpio_request(GPIO_FN_DV_D12, NULL);
1424 	gpio_request(GPIO_FN_DV_D11, NULL);
1425 	gpio_request(GPIO_FN_DV_D10, NULL);
1426 	gpio_request(GPIO_FN_DV_D9, NULL);
1427 	gpio_request(GPIO_FN_DV_D8, NULL);
1428 	gpio_request(GPIO_FN_DV_CLKI, NULL);
1429 	gpio_request(GPIO_FN_DV_CLK, NULL);
1430 	gpio_request(GPIO_FN_DV_VSYNC, NULL);
1431 	gpio_request(GPIO_FN_DV_HSYNC, NULL);
1432 
1433 	/* AK8813 power / reset sequence */
1434 	gpio_request(GPIO_PTG4, NULL);
1435 	gpio_request(GPIO_PTU3, NULL);
1436 	/* Reset */
1437 	gpio_direction_output(GPIO_PTG4, 0);
1438 	/* Power down */
1439 	gpio_direction_output(GPIO_PTU3, 1);
1440 
1441 	udelay(10);
1442 
1443 	/* Power up, reset */
1444 	gpio_set_value(GPIO_PTU3, 0);
1445 
1446 	udelay(10);
1447 
1448 	/* Remove reset */
1449 	gpio_set_value(GPIO_PTG4, 1);
1450 #endif
1451 
1452 	/* Initialize CEU platform devices separately to map memory first */
1453 	device_initialize(&ecovec_ceu_devices[0]->dev);
1454 	dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev,
1455 				    ceu0_dma_membase, ceu0_dma_membase,
1456 				    ceu0_dma_membase +
1457 				    CEU_BUFFER_MEMORY_SIZE - 1);
1458 	platform_device_add(ecovec_ceu_devices[0]);
1459 
1460 	device_initialize(&ecovec_ceu_devices[1]->dev);
1461 	dma_declare_coherent_memory(&ecovec_ceu_devices[1]->dev,
1462 				    ceu1_dma_membase, ceu1_dma_membase,
1463 				    ceu1_dma_membase +
1464 				    CEU_BUFFER_MEMORY_SIZE - 1);
1465 	platform_device_add(ecovec_ceu_devices[1]);
1466 
1467 	gpiod_add_lookup_table(&cn12_power_gpiod_table);
1468 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1469 	gpiod_add_lookup_table(&sdhi0_power_gpiod_table);
1470 	gpiod_add_lookup_table(&sdhi0_gpio_table);
1471 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1472 	gpiod_add_lookup_table(&sdhi1_gpio_table);
1473 #endif
1474 #endif
1475 
1476 	gpiod_add_lookup_table(&gpio_backlight_lookup);
1477 	gpio_backlight_device = platform_device_register_full(
1478 					&gpio_backlight_device_info);
1479 	if (IS_ERR(gpio_backlight_device))
1480 		return PTR_ERR(gpio_backlight_device);
1481 
1482 	return platform_add_devices(ecovec_devices,
1483 				    ARRAY_SIZE(ecovec_devices));
1484 }
1485 arch_initcall(arch_setup);
1486 
1487 static int __init devices_setup(void)
1488 {
1489 	sh_eth_init(&sh_eth_plat);
1490 	return 0;
1491 }
1492 device_initcall(devices_setup);
1493 
1494 /* Reserve a portion of memory for CEU 0 and CEU 1 buffers */
1495 static void __init ecovec_mv_mem_reserve(void)
1496 {
1497 	phys_addr_t phys;
1498 	phys_addr_t size = CEU_BUFFER_MEMORY_SIZE;
1499 
1500 	phys = memblock_phys_alloc(size, PAGE_SIZE);
1501 	if (!phys)
1502 		panic("Failed to allocate CEU0 memory\n");
1503 
1504 	memblock_free(phys, size);
1505 	memblock_remove(phys, size);
1506 	ceu0_dma_membase = phys;
1507 
1508 	phys = memblock_phys_alloc(size, PAGE_SIZE);
1509 	if (!phys)
1510 		panic("Failed to allocate CEU1 memory\n");
1511 
1512 	memblock_free(phys, size);
1513 	memblock_remove(phys, size);
1514 	ceu1_dma_membase = phys;
1515 }
1516 
1517 static struct sh_machine_vector mv_ecovec __initmv = {
1518 	.mv_name	= "R0P7724 (EcoVec)",
1519 	.mv_mem_reserve	= ecovec_mv_mem_reserve,
1520 };
1521