1 /* 2 * Copyright (C) 2009 Renesas Solutions Corp. 3 * 4 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11 #include <linux/init.h> 12 #include <linux/device.h> 13 #include <linux/platform_device.h> 14 #include <linux/mfd/sh_mobile_sdhi.h> 15 #include <linux/mmc/host.h> 16 #include <linux/mmc/sh_mmcif.h> 17 #include <linux/mtd/physmap.h> 18 #include <linux/gpio.h> 19 #include <linux/interrupt.h> 20 #include <linux/io.h> 21 #include <linux/delay.h> 22 #include <linux/usb/r8a66597.h> 23 #include <linux/i2c.h> 24 #include <linux/i2c/tsc2007.h> 25 #include <linux/spi/spi.h> 26 #include <linux/spi/sh_msiof.h> 27 #include <linux/spi/mmc_spi.h> 28 #include <linux/mmc/host.h> 29 #include <linux/input.h> 30 #include <linux/input/sh_keysc.h> 31 #include <video/sh_mobile_lcdc.h> 32 #include <sound/sh_fsi.h> 33 #include <media/sh_mobile_ceu.h> 34 #include <media/tw9910.h> 35 #include <media/mt9t112.h> 36 #include <asm/heartbeat.h> 37 #include <asm/sh_eth.h> 38 #include <asm/clock.h> 39 #include <asm/suspend.h> 40 #include <cpu/sh7724.h> 41 42 /* 43 * Address Interface BusWidth 44 *----------------------------------------- 45 * 0x0000_0000 uboot 16bit 46 * 0x0004_0000 Linux romImage 16bit 47 * 0x0014_0000 MTD for Linux 16bit 48 * 0x0400_0000 Internal I/O 16/32bit 49 * 0x0800_0000 DRAM 32bit 50 * 0x1800_0000 MFI 16bit 51 */ 52 53 /* SWITCH 54 *------------------------------ 55 * DS2[1] = FlashROM write protect ON : write protect 56 * OFF : No write protect 57 * DS2[2] = RMII / TS, SCIF ON : RMII 58 * OFF : TS, SCIF3 59 * DS2[3] = Camera / Video ON : Camera 60 * OFF : NTSC/PAL (IN) 61 * DS2[5] = NTSC_OUT Clock ON : On board OSC 62 * OFF : SH7724 DV_CLK 63 * DS2[6-7] = MMC / SD ON-OFF : SD 64 * OFF-ON : MMC 65 */ 66 67 /* Heartbeat */ 68 static unsigned char led_pos[] = { 0, 1, 2, 3 }; 69 70 static struct heartbeat_data heartbeat_data = { 71 .nr_bits = 4, 72 .bit_pos = led_pos, 73 }; 74 75 static struct resource heartbeat_resource = { 76 .start = 0xA405012C, /* PTG */ 77 .end = 0xA405012E - 1, 78 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 79 }; 80 81 static struct platform_device heartbeat_device = { 82 .name = "heartbeat", 83 .id = -1, 84 .dev = { 85 .platform_data = &heartbeat_data, 86 }, 87 .num_resources = 1, 88 .resource = &heartbeat_resource, 89 }; 90 91 /* MTD */ 92 static struct mtd_partition nor_flash_partitions[] = { 93 { 94 .name = "boot loader", 95 .offset = 0, 96 .size = (5 * 1024 * 1024), 97 .mask_flags = MTD_WRITEABLE, /* force read-only */ 98 }, { 99 .name = "free-area", 100 .offset = MTDPART_OFS_APPEND, 101 .size = MTDPART_SIZ_FULL, 102 }, 103 }; 104 105 static struct physmap_flash_data nor_flash_data = { 106 .width = 2, 107 .parts = nor_flash_partitions, 108 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 109 }; 110 111 static struct resource nor_flash_resources[] = { 112 [0] = { 113 .name = "NOR Flash", 114 .start = 0x00000000, 115 .end = 0x03ffffff, 116 .flags = IORESOURCE_MEM, 117 } 118 }; 119 120 static struct platform_device nor_flash_device = { 121 .name = "physmap-flash", 122 .resource = nor_flash_resources, 123 .num_resources = ARRAY_SIZE(nor_flash_resources), 124 .dev = { 125 .platform_data = &nor_flash_data, 126 }, 127 }; 128 129 /* SH Eth */ 130 #define SH_ETH_ADDR (0xA4600000) 131 static struct resource sh_eth_resources[] = { 132 [0] = { 133 .start = SH_ETH_ADDR, 134 .end = SH_ETH_ADDR + 0x1FC, 135 .flags = IORESOURCE_MEM, 136 }, 137 [1] = { 138 .start = 91, 139 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 140 }, 141 }; 142 143 static struct sh_eth_plat_data sh_eth_plat = { 144 .phy = 0x1f, /* SMSC LAN8700 */ 145 .edmac_endian = EDMAC_LITTLE_ENDIAN, 146 .ether_link_active_low = 1 147 }; 148 149 static struct platform_device sh_eth_device = { 150 .name = "sh-eth", 151 .id = 0, 152 .dev = { 153 .platform_data = &sh_eth_plat, 154 }, 155 .num_resources = ARRAY_SIZE(sh_eth_resources), 156 .resource = sh_eth_resources, 157 .archdata = { 158 .hwblk_id = HWBLK_ETHER, 159 }, 160 }; 161 162 /* USB0 host */ 163 static void usb0_port_power(int port, int power) 164 { 165 gpio_set_value(GPIO_PTB4, power); 166 } 167 168 static struct r8a66597_platdata usb0_host_data = { 169 .on_chip = 1, 170 .port_power = usb0_port_power, 171 }; 172 173 static struct resource usb0_host_resources[] = { 174 [0] = { 175 .start = 0xa4d80000, 176 .end = 0xa4d80124 - 1, 177 .flags = IORESOURCE_MEM, 178 }, 179 [1] = { 180 .start = 65, 181 .end = 65, 182 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 183 }, 184 }; 185 186 static struct platform_device usb0_host_device = { 187 .name = "r8a66597_hcd", 188 .id = 0, 189 .dev = { 190 .dma_mask = NULL, /* not use dma */ 191 .coherent_dma_mask = 0xffffffff, 192 .platform_data = &usb0_host_data, 193 }, 194 .num_resources = ARRAY_SIZE(usb0_host_resources), 195 .resource = usb0_host_resources, 196 }; 197 198 /* USB1 host/function */ 199 static void usb1_port_power(int port, int power) 200 { 201 gpio_set_value(GPIO_PTB5, power); 202 } 203 204 static struct r8a66597_platdata usb1_common_data = { 205 .on_chip = 1, 206 .port_power = usb1_port_power, 207 }; 208 209 static struct resource usb1_common_resources[] = { 210 [0] = { 211 .start = 0xa4d90000, 212 .end = 0xa4d90124 - 1, 213 .flags = IORESOURCE_MEM, 214 }, 215 [1] = { 216 .start = 66, 217 .end = 66, 218 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 219 }, 220 }; 221 222 static struct platform_device usb1_common_device = { 223 /* .name will be added in arch_setup */ 224 .id = 1, 225 .dev = { 226 .dma_mask = NULL, /* not use dma */ 227 .coherent_dma_mask = 0xffffffff, 228 .platform_data = &usb1_common_data, 229 }, 230 .num_resources = ARRAY_SIZE(usb1_common_resources), 231 .resource = usb1_common_resources, 232 }; 233 234 /* LCDC */ 235 static struct sh_mobile_lcdc_info lcdc_info = { 236 .ch[0] = { 237 .interface_type = RGB18, 238 .chan = LCDC_CHAN_MAINLCD, 239 .bpp = 16, 240 .lcd_cfg = { 241 .sync = 0, /* hsync and vsync are active low */ 242 }, 243 .lcd_size_cfg = { /* 7.0 inch */ 244 .width = 152, 245 .height = 91, 246 }, 247 .board_cfg = { 248 }, 249 } 250 }; 251 252 static struct resource lcdc_resources[] = { 253 [0] = { 254 .name = "LCDC", 255 .start = 0xfe940000, 256 .end = 0xfe942fff, 257 .flags = IORESOURCE_MEM, 258 }, 259 [1] = { 260 .start = 106, 261 .flags = IORESOURCE_IRQ, 262 }, 263 }; 264 265 static struct platform_device lcdc_device = { 266 .name = "sh_mobile_lcdc_fb", 267 .num_resources = ARRAY_SIZE(lcdc_resources), 268 .resource = lcdc_resources, 269 .dev = { 270 .platform_data = &lcdc_info, 271 }, 272 .archdata = { 273 .hwblk_id = HWBLK_LCDC, 274 }, 275 }; 276 277 /* CEU0 */ 278 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 279 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 280 }; 281 282 static struct resource ceu0_resources[] = { 283 [0] = { 284 .name = "CEU0", 285 .start = 0xfe910000, 286 .end = 0xfe91009f, 287 .flags = IORESOURCE_MEM, 288 }, 289 [1] = { 290 .start = 52, 291 .flags = IORESOURCE_IRQ, 292 }, 293 [2] = { 294 /* place holder for contiguous memory */ 295 }, 296 }; 297 298 static struct platform_device ceu0_device = { 299 .name = "sh_mobile_ceu", 300 .id = 0, /* "ceu0" clock */ 301 .num_resources = ARRAY_SIZE(ceu0_resources), 302 .resource = ceu0_resources, 303 .dev = { 304 .platform_data = &sh_mobile_ceu0_info, 305 }, 306 .archdata = { 307 .hwblk_id = HWBLK_CEU0, 308 }, 309 }; 310 311 /* CEU1 */ 312 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 313 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 314 }; 315 316 static struct resource ceu1_resources[] = { 317 [0] = { 318 .name = "CEU1", 319 .start = 0xfe914000, 320 .end = 0xfe91409f, 321 .flags = IORESOURCE_MEM, 322 }, 323 [1] = { 324 .start = 63, 325 .flags = IORESOURCE_IRQ, 326 }, 327 [2] = { 328 /* place holder for contiguous memory */ 329 }, 330 }; 331 332 static struct platform_device ceu1_device = { 333 .name = "sh_mobile_ceu", 334 .id = 1, /* "ceu1" clock */ 335 .num_resources = ARRAY_SIZE(ceu1_resources), 336 .resource = ceu1_resources, 337 .dev = { 338 .platform_data = &sh_mobile_ceu1_info, 339 }, 340 .archdata = { 341 .hwblk_id = HWBLK_CEU1, 342 }, 343 }; 344 345 /* I2C device */ 346 static struct i2c_board_info i2c0_devices[] = { 347 { 348 I2C_BOARD_INFO("da7210", 0x1a), 349 }, 350 }; 351 352 static struct i2c_board_info i2c1_devices[] = { 353 { 354 I2C_BOARD_INFO("r2025sd", 0x32), 355 }, 356 { 357 I2C_BOARD_INFO("lis3lv02d", 0x1c), 358 .irq = 33, 359 } 360 }; 361 362 /* KEYSC */ 363 static struct sh_keysc_info keysc_info = { 364 .mode = SH_KEYSC_MODE_1, 365 .scan_timing = 3, 366 .delay = 50, 367 .kycr2_delay = 100, 368 .keycodes = { KEY_1, 0, 0, 0, 0, 369 KEY_2, 0, 0, 0, 0, 370 KEY_3, 0, 0, 0, 0, 371 KEY_4, 0, 0, 0, 0, 372 KEY_5, 0, 0, 0, 0, 373 KEY_6, 0, 0, 0, 0, }, 374 }; 375 376 static struct resource keysc_resources[] = { 377 [0] = { 378 .name = "KEYSC", 379 .start = 0x044b0000, 380 .end = 0x044b000f, 381 .flags = IORESOURCE_MEM, 382 }, 383 [1] = { 384 .start = 79, 385 .flags = IORESOURCE_IRQ, 386 }, 387 }; 388 389 static struct platform_device keysc_device = { 390 .name = "sh_keysc", 391 .id = 0, /* keysc0 clock */ 392 .num_resources = ARRAY_SIZE(keysc_resources), 393 .resource = keysc_resources, 394 .dev = { 395 .platform_data = &keysc_info, 396 }, 397 .archdata = { 398 .hwblk_id = HWBLK_KEYSC, 399 }, 400 }; 401 402 /* TouchScreen */ 403 #define IRQ0 32 404 static int ts_get_pendown_state(void) 405 { 406 int val = 0; 407 gpio_free(GPIO_FN_INTC_IRQ0); 408 gpio_request(GPIO_PTZ0, NULL); 409 gpio_direction_input(GPIO_PTZ0); 410 411 val = gpio_get_value(GPIO_PTZ0); 412 413 gpio_free(GPIO_PTZ0); 414 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 415 416 return val ? 0 : 1; 417 } 418 419 static int ts_init(void) 420 { 421 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 422 return 0; 423 } 424 425 static struct tsc2007_platform_data tsc2007_info = { 426 .model = 2007, 427 .x_plate_ohms = 180, 428 .get_pendown_state = ts_get_pendown_state, 429 .init_platform_hw = ts_init, 430 }; 431 432 static struct i2c_board_info ts_i2c_clients = { 433 I2C_BOARD_INFO("tsc2007", 0x48), 434 .type = "tsc2007", 435 .platform_data = &tsc2007_info, 436 .irq = IRQ0, 437 }; 438 439 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 440 /* SDHI0 */ 441 static void sdhi0_set_pwr(struct platform_device *pdev, int state) 442 { 443 gpio_set_value(GPIO_PTB6, state); 444 } 445 446 static struct sh_mobile_sdhi_info sdhi0_info = { 447 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 448 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 449 .set_pwr = sdhi0_set_pwr, 450 }; 451 452 static struct resource sdhi0_resources[] = { 453 [0] = { 454 .name = "SDHI0", 455 .start = 0x04ce0000, 456 .end = 0x04ce01ff, 457 .flags = IORESOURCE_MEM, 458 }, 459 [1] = { 460 .start = 100, 461 .flags = IORESOURCE_IRQ, 462 }, 463 }; 464 465 static struct platform_device sdhi0_device = { 466 .name = "sh_mobile_sdhi", 467 .num_resources = ARRAY_SIZE(sdhi0_resources), 468 .resource = sdhi0_resources, 469 .id = 0, 470 .dev = { 471 .platform_data = &sdhi0_info, 472 }, 473 .archdata = { 474 .hwblk_id = HWBLK_SDHI0, 475 }, 476 }; 477 478 #if !defined(CONFIG_MMC_SH_MMCIF) 479 /* SDHI1 */ 480 static void sdhi1_set_pwr(struct platform_device *pdev, int state) 481 { 482 gpio_set_value(GPIO_PTB7, state); 483 } 484 485 static struct sh_mobile_sdhi_info sdhi1_info = { 486 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 487 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 488 .set_pwr = sdhi1_set_pwr, 489 }; 490 491 static struct resource sdhi1_resources[] = { 492 [0] = { 493 .name = "SDHI1", 494 .start = 0x04cf0000, 495 .end = 0x04cf01ff, 496 .flags = IORESOURCE_MEM, 497 }, 498 [1] = { 499 .start = 23, 500 .flags = IORESOURCE_IRQ, 501 }, 502 }; 503 504 static struct platform_device sdhi1_device = { 505 .name = "sh_mobile_sdhi", 506 .num_resources = ARRAY_SIZE(sdhi1_resources), 507 .resource = sdhi1_resources, 508 .id = 1, 509 .dev = { 510 .platform_data = &sdhi1_info, 511 }, 512 .archdata = { 513 .hwblk_id = HWBLK_SDHI1, 514 }, 515 }; 516 #endif /* CONFIG_MMC_SH_MMCIF */ 517 518 #else 519 520 /* MMC SPI */ 521 static int mmc_spi_get_ro(struct device *dev) 522 { 523 return gpio_get_value(GPIO_PTY6); 524 } 525 526 static int mmc_spi_get_cd(struct device *dev) 527 { 528 return !gpio_get_value(GPIO_PTY7); 529 } 530 531 static void mmc_spi_setpower(struct device *dev, unsigned int maskval) 532 { 533 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); 534 } 535 536 static struct mmc_spi_platform_data mmc_spi_info = { 537 .get_ro = mmc_spi_get_ro, 538 .get_cd = mmc_spi_get_cd, 539 .caps = MMC_CAP_NEEDS_POLL, 540 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ 541 .setpower = mmc_spi_setpower, 542 }; 543 544 static struct spi_board_info spi_bus[] = { 545 { 546 .modalias = "mmc_spi", 547 .platform_data = &mmc_spi_info, 548 .max_speed_hz = 5000000, 549 .mode = SPI_MODE_0, 550 .controller_data = (void *) GPIO_PTM4, 551 }, 552 }; 553 554 /* MSIOF0 */ 555 static struct sh_msiof_spi_info msiof0_data = { 556 .num_chipselect = 1, 557 }; 558 559 static struct resource msiof0_resources[] = { 560 [0] = { 561 .name = "MSIOF0", 562 .start = 0xa4c40000, 563 .end = 0xa4c40063, 564 .flags = IORESOURCE_MEM, 565 }, 566 [1] = { 567 .start = 84, 568 .flags = IORESOURCE_IRQ, 569 }, 570 }; 571 572 static struct platform_device msiof0_device = { 573 .name = "spi_sh_msiof", 574 .id = 0, /* MSIOF0 */ 575 .dev = { 576 .platform_data = &msiof0_data, 577 }, 578 .num_resources = ARRAY_SIZE(msiof0_resources), 579 .resource = msiof0_resources, 580 .archdata = { 581 .hwblk_id = HWBLK_MSIOF0, 582 }, 583 }; 584 585 #endif 586 587 /* I2C Video/Camera */ 588 static struct i2c_board_info i2c_camera[] = { 589 { 590 I2C_BOARD_INFO("tw9910", 0x45), 591 }, 592 { 593 /* 1st camera */ 594 I2C_BOARD_INFO("mt9t112", 0x3c), 595 }, 596 { 597 /* 2nd camera */ 598 I2C_BOARD_INFO("mt9t112", 0x3c), 599 }, 600 }; 601 602 /* tw9910 */ 603 static int tw9910_power(struct device *dev, int mode) 604 { 605 int val = mode ? 0 : 1; 606 607 gpio_set_value(GPIO_PTU2, val); 608 if (mode) 609 mdelay(100); 610 611 return 0; 612 } 613 614 static struct tw9910_video_info tw9910_info = { 615 .buswidth = SOCAM_DATAWIDTH_8, 616 .mpout = TW9910_MPO_FIELD, 617 }; 618 619 static struct soc_camera_link tw9910_link = { 620 .i2c_adapter_id = 0, 621 .bus_id = 1, 622 .power = tw9910_power, 623 .board_info = &i2c_camera[0], 624 .module_name = "tw9910", 625 .priv = &tw9910_info, 626 }; 627 628 /* mt9t112 */ 629 static int mt9t112_power1(struct device *dev, int mode) 630 { 631 gpio_set_value(GPIO_PTA3, mode); 632 if (mode) 633 mdelay(100); 634 635 return 0; 636 } 637 638 static struct mt9t112_camera_info mt9t112_info1 = { 639 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 640 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 641 }; 642 643 static struct soc_camera_link mt9t112_link1 = { 644 .i2c_adapter_id = 0, 645 .power = mt9t112_power1, 646 .bus_id = 0, 647 .board_info = &i2c_camera[1], 648 .module_name = "mt9t112", 649 .priv = &mt9t112_info1, 650 }; 651 652 static int mt9t112_power2(struct device *dev, int mode) 653 { 654 gpio_set_value(GPIO_PTA4, mode); 655 if (mode) 656 mdelay(100); 657 658 return 0; 659 } 660 661 static struct mt9t112_camera_info mt9t112_info2 = { 662 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 663 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 664 }; 665 666 static struct soc_camera_link mt9t112_link2 = { 667 .i2c_adapter_id = 1, 668 .power = mt9t112_power2, 669 .bus_id = 1, 670 .board_info = &i2c_camera[2], 671 .module_name = "mt9t112", 672 .priv = &mt9t112_info2, 673 }; 674 675 static struct platform_device camera_devices[] = { 676 { 677 .name = "soc-camera-pdrv", 678 .id = 0, 679 .dev = { 680 .platform_data = &tw9910_link, 681 }, 682 }, 683 { 684 .name = "soc-camera-pdrv", 685 .id = 1, 686 .dev = { 687 .platform_data = &mt9t112_link1, 688 }, 689 }, 690 { 691 .name = "soc-camera-pdrv", 692 .id = 2, 693 .dev = { 694 .platform_data = &mt9t112_link2, 695 }, 696 }, 697 }; 698 699 /* FSI */ 700 /* 701 * FSI-B use external clock which came from da7210. 702 * So, we should change parent of fsi 703 */ 704 #define FCLKBCR 0xa415000c 705 static void fsimck_init(struct clk *clk) 706 { 707 u32 status = __raw_readl(clk->enable_reg); 708 709 /* use external clock */ 710 status &= ~0x000000ff; 711 status |= 0x00000080; 712 713 __raw_writel(status, clk->enable_reg); 714 } 715 716 static struct clk_ops fsimck_clk_ops = { 717 .init = fsimck_init, 718 }; 719 720 static struct clk fsimckb_clk = { 721 .ops = &fsimck_clk_ops, 722 .enable_reg = (void __iomem *)FCLKBCR, 723 .rate = 0, /* unknown */ 724 }; 725 726 static struct sh_fsi_platform_info fsi_info = { 727 .portb_flags = SH_FSI_BRS_INV | 728 SH_FSI_OUT_SLAVE_MODE | 729 SH_FSI_IN_SLAVE_MODE | 730 SH_FSI_OFMT(I2S) | 731 SH_FSI_IFMT(I2S), 732 }; 733 734 static struct resource fsi_resources[] = { 735 [0] = { 736 .name = "FSI", 737 .start = 0xFE3C0000, 738 .end = 0xFE3C021d, 739 .flags = IORESOURCE_MEM, 740 }, 741 [1] = { 742 .start = 108, 743 .flags = IORESOURCE_IRQ, 744 }, 745 }; 746 747 static struct platform_device fsi_device = { 748 .name = "sh_fsi", 749 .id = 0, 750 .num_resources = ARRAY_SIZE(fsi_resources), 751 .resource = fsi_resources, 752 .dev = { 753 .platform_data = &fsi_info, 754 }, 755 .archdata = { 756 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */ 757 }, 758 }; 759 760 /* IrDA */ 761 static struct resource irda_resources[] = { 762 [0] = { 763 .name = "IrDA", 764 .start = 0xA45D0000, 765 .end = 0xA45D0049, 766 .flags = IORESOURCE_MEM, 767 }, 768 [1] = { 769 .start = 20, 770 .flags = IORESOURCE_IRQ, 771 }, 772 }; 773 774 static struct platform_device irda_device = { 775 .name = "sh_sir", 776 .num_resources = ARRAY_SIZE(irda_resources), 777 .resource = irda_resources, 778 }; 779 780 #include <media/ak881x.h> 781 #include <media/sh_vou.h> 782 783 static struct ak881x_pdata ak881x_pdata = { 784 .flags = AK881X_IF_MODE_SLAVE, 785 }; 786 787 static struct i2c_board_info ak8813 = { 788 I2C_BOARD_INFO("ak8813", 0x20), 789 .platform_data = &ak881x_pdata, 790 }; 791 792 static struct sh_vou_pdata sh_vou_pdata = { 793 .bus_fmt = SH_VOU_BUS_8BIT, 794 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, 795 .board_info = &ak8813, 796 .i2c_adap = 0, 797 .module_name = "ak881x", 798 }; 799 800 static struct resource sh_vou_resources[] = { 801 [0] = { 802 .start = 0xfe960000, 803 .end = 0xfe962043, 804 .flags = IORESOURCE_MEM, 805 }, 806 [1] = { 807 .start = 55, 808 .flags = IORESOURCE_IRQ, 809 }, 810 }; 811 812 static struct platform_device vou_device = { 813 .name = "sh-vou", 814 .id = -1, 815 .num_resources = ARRAY_SIZE(sh_vou_resources), 816 .resource = sh_vou_resources, 817 .dev = { 818 .platform_data = &sh_vou_pdata, 819 }, 820 .archdata = { 821 .hwblk_id = HWBLK_VOU, 822 }, 823 }; 824 825 #if defined(CONFIG_MMC_SH_MMCIF) 826 /* SH_MMCIF */ 827 static void mmcif_set_pwr(struct platform_device *pdev, int state) 828 { 829 gpio_set_value(GPIO_PTB7, state); 830 } 831 832 static void mmcif_down_pwr(struct platform_device *pdev) 833 { 834 gpio_set_value(GPIO_PTB7, 0); 835 } 836 837 static struct resource sh_mmcif_resources[] = { 838 [0] = { 839 .name = "SH_MMCIF", 840 .start = 0xA4CA0000, 841 .end = 0xA4CA00FF, 842 .flags = IORESOURCE_MEM, 843 }, 844 [1] = { 845 /* MMC2I */ 846 .start = 29, 847 .flags = IORESOURCE_IRQ, 848 }, 849 [2] = { 850 /* MMC3I */ 851 .start = 30, 852 .flags = IORESOURCE_IRQ, 853 }, 854 }; 855 856 static struct sh_mmcif_plat_data sh_mmcif_plat = { 857 .set_pwr = mmcif_set_pwr, 858 .down_pwr = mmcif_down_pwr, 859 .sup_pclk = 0, /* SH7724: Max Pclk/2 */ 860 .caps = MMC_CAP_4_BIT_DATA | 861 MMC_CAP_8_BIT_DATA | 862 MMC_CAP_NEEDS_POLL, 863 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, 864 }; 865 866 static struct platform_device sh_mmcif_device = { 867 .name = "sh_mmcif", 868 .id = 0, 869 .dev = { 870 .platform_data = &sh_mmcif_plat, 871 }, 872 .num_resources = ARRAY_SIZE(sh_mmcif_resources), 873 .resource = sh_mmcif_resources, 874 }; 875 #endif 876 877 static struct platform_device *ecovec_devices[] __initdata = { 878 &heartbeat_device, 879 &nor_flash_device, 880 &sh_eth_device, 881 &usb0_host_device, 882 &usb1_common_device, 883 &lcdc_device, 884 &ceu0_device, 885 &ceu1_device, 886 &keysc_device, 887 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 888 &sdhi0_device, 889 #if !defined(CONFIG_MMC_SH_MMCIF) 890 &sdhi1_device, 891 #endif 892 #else 893 &msiof0_device, 894 #endif 895 &camera_devices[0], 896 &camera_devices[1], 897 &camera_devices[2], 898 &fsi_device, 899 &irda_device, 900 &vou_device, 901 #if defined(CONFIG_MMC_SH_MMCIF) 902 &sh_mmcif_device, 903 #endif 904 }; 905 906 #ifdef CONFIG_I2C 907 #define EEPROM_ADDR 0x50 908 static u8 mac_read(struct i2c_adapter *a, u8 command) 909 { 910 struct i2c_msg msg[2]; 911 u8 buf; 912 int ret; 913 914 msg[0].addr = EEPROM_ADDR; 915 msg[0].flags = 0; 916 msg[0].len = 1; 917 msg[0].buf = &command; 918 919 msg[1].addr = EEPROM_ADDR; 920 msg[1].flags = I2C_M_RD; 921 msg[1].len = 1; 922 msg[1].buf = &buf; 923 924 ret = i2c_transfer(a, msg, 2); 925 if (ret < 0) { 926 printk(KERN_ERR "error %d\n", ret); 927 buf = 0xff; 928 } 929 930 return buf; 931 } 932 933 static void __init sh_eth_init(struct sh_eth_plat_data *pd) 934 { 935 struct i2c_adapter *a = i2c_get_adapter(1); 936 int i; 937 938 if (!a) { 939 pr_err("can not get I2C 1\n"); 940 return; 941 } 942 943 /* read MAC address frome EEPROM */ 944 for (i = 0; i < sizeof(pd->mac_addr); i++) { 945 pd->mac_addr[i] = mac_read(a, 0x10 + i); 946 msleep(10); 947 } 948 949 i2c_put_adapter(a); 950 } 951 #else 952 static void __init sh_eth_init(struct sh_eth_plat_data *pd) 953 { 954 pr_err("unable to read sh_eth MAC address\n"); 955 } 956 #endif 957 958 #define PORT_HIZA 0xA4050158 959 #define IODRIVEA 0xA405018A 960 961 extern char ecovec24_sdram_enter_start; 962 extern char ecovec24_sdram_enter_end; 963 extern char ecovec24_sdram_leave_start; 964 extern char ecovec24_sdram_leave_end; 965 966 static int __init arch_setup(void) 967 { 968 struct clk *clk; 969 970 /* register board specific self-refresh code */ 971 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | 972 SUSP_SH_RSTANDBY, 973 &ecovec24_sdram_enter_start, 974 &ecovec24_sdram_enter_end, 975 &ecovec24_sdram_leave_start, 976 &ecovec24_sdram_leave_end); 977 978 /* enable STATUS0, STATUS2 and PDSTATUS */ 979 gpio_request(GPIO_FN_STATUS0, NULL); 980 gpio_request(GPIO_FN_STATUS2, NULL); 981 gpio_request(GPIO_FN_PDSTATUS, NULL); 982 983 /* enable SCIFA0 */ 984 gpio_request(GPIO_FN_SCIF0_TXD, NULL); 985 gpio_request(GPIO_FN_SCIF0_RXD, NULL); 986 987 /* enable debug LED */ 988 gpio_request(GPIO_PTG0, NULL); 989 gpio_request(GPIO_PTG1, NULL); 990 gpio_request(GPIO_PTG2, NULL); 991 gpio_request(GPIO_PTG3, NULL); 992 gpio_direction_output(GPIO_PTG0, 0); 993 gpio_direction_output(GPIO_PTG1, 0); 994 gpio_direction_output(GPIO_PTG2, 0); 995 gpio_direction_output(GPIO_PTG3, 0); 996 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 997 998 /* enable SH-Eth */ 999 gpio_request(GPIO_PTA1, NULL); 1000 gpio_direction_output(GPIO_PTA1, 1); 1001 mdelay(20); 1002 1003 gpio_request(GPIO_FN_RMII_RXD0, NULL); 1004 gpio_request(GPIO_FN_RMII_RXD1, NULL); 1005 gpio_request(GPIO_FN_RMII_TXD0, NULL); 1006 gpio_request(GPIO_FN_RMII_TXD1, NULL); 1007 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 1008 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 1009 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 1010 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 1011 gpio_request(GPIO_FN_MDIO, NULL); 1012 gpio_request(GPIO_FN_MDC, NULL); 1013 gpio_request(GPIO_FN_LNKSTA, NULL); 1014 1015 /* enable USB */ 1016 __raw_writew(0x0000, 0xA4D80000); 1017 __raw_writew(0x0000, 0xA4D90000); 1018 gpio_request(GPIO_PTB3, NULL); 1019 gpio_request(GPIO_PTB4, NULL); 1020 gpio_request(GPIO_PTB5, NULL); 1021 gpio_direction_input(GPIO_PTB3); 1022 gpio_direction_output(GPIO_PTB4, 0); 1023 gpio_direction_output(GPIO_PTB5, 0); 1024 __raw_writew(0x0600, 0xa40501d4); 1025 __raw_writew(0x0600, 0xa4050192); 1026 1027 if (gpio_get_value(GPIO_PTB3)) { 1028 printk(KERN_INFO "USB1 function is selected\n"); 1029 usb1_common_device.name = "r8a66597_udc"; 1030 } else { 1031 printk(KERN_INFO "USB1 host is selected\n"); 1032 usb1_common_device.name = "r8a66597_hcd"; 1033 } 1034 1035 /* enable LCDC */ 1036 gpio_request(GPIO_FN_LCDD23, NULL); 1037 gpio_request(GPIO_FN_LCDD22, NULL); 1038 gpio_request(GPIO_FN_LCDD21, NULL); 1039 gpio_request(GPIO_FN_LCDD20, NULL); 1040 gpio_request(GPIO_FN_LCDD19, NULL); 1041 gpio_request(GPIO_FN_LCDD18, NULL); 1042 gpio_request(GPIO_FN_LCDD17, NULL); 1043 gpio_request(GPIO_FN_LCDD16, NULL); 1044 gpio_request(GPIO_FN_LCDD15, NULL); 1045 gpio_request(GPIO_FN_LCDD14, NULL); 1046 gpio_request(GPIO_FN_LCDD13, NULL); 1047 gpio_request(GPIO_FN_LCDD12, NULL); 1048 gpio_request(GPIO_FN_LCDD11, NULL); 1049 gpio_request(GPIO_FN_LCDD10, NULL); 1050 gpio_request(GPIO_FN_LCDD9, NULL); 1051 gpio_request(GPIO_FN_LCDD8, NULL); 1052 gpio_request(GPIO_FN_LCDD7, NULL); 1053 gpio_request(GPIO_FN_LCDD6, NULL); 1054 gpio_request(GPIO_FN_LCDD5, NULL); 1055 gpio_request(GPIO_FN_LCDD4, NULL); 1056 gpio_request(GPIO_FN_LCDD3, NULL); 1057 gpio_request(GPIO_FN_LCDD2, NULL); 1058 gpio_request(GPIO_FN_LCDD1, NULL); 1059 gpio_request(GPIO_FN_LCDD0, NULL); 1060 gpio_request(GPIO_FN_LCDDISP, NULL); 1061 gpio_request(GPIO_FN_LCDHSYN, NULL); 1062 gpio_request(GPIO_FN_LCDDCK, NULL); 1063 gpio_request(GPIO_FN_LCDVSYN, NULL); 1064 gpio_request(GPIO_FN_LCDDON, NULL); 1065 gpio_request(GPIO_FN_LCDLCLK, NULL); 1066 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); 1067 1068 gpio_request(GPIO_PTE6, NULL); 1069 gpio_request(GPIO_PTU1, NULL); 1070 gpio_request(GPIO_PTR1, NULL); 1071 gpio_request(GPIO_PTA2, NULL); 1072 gpio_direction_input(GPIO_PTE6); 1073 gpio_direction_output(GPIO_PTU1, 0); 1074 gpio_direction_output(GPIO_PTR1, 0); 1075 gpio_direction_output(GPIO_PTA2, 0); 1076 1077 /* I/O buffer drive ability is high */ 1078 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); 1079 1080 if (gpio_get_value(GPIO_PTE6)) { 1081 /* DVI */ 1082 lcdc_info.clock_source = LCDC_CLK_EXTERNAL; 1083 lcdc_info.ch[0].clock_divider = 1, 1084 lcdc_info.ch[0].lcd_cfg.name = "DVI"; 1085 lcdc_info.ch[0].lcd_cfg.xres = 1280; 1086 lcdc_info.ch[0].lcd_cfg.yres = 720; 1087 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 1088 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 1089 lcdc_info.ch[0].lcd_cfg.hsync_len = 40; 1090 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 1091 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 1092 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 1093 1094 gpio_set_value(GPIO_PTA2, 1); 1095 gpio_set_value(GPIO_PTU1, 1); 1096 } else { 1097 /* Panel */ 1098 1099 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; 1100 lcdc_info.ch[0].clock_divider = 2, 1101 lcdc_info.ch[0].lcd_cfg.name = "Panel"; 1102 lcdc_info.ch[0].lcd_cfg.xres = 800; 1103 lcdc_info.ch[0].lcd_cfg.yres = 480; 1104 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 1105 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 1106 lcdc_info.ch[0].lcd_cfg.hsync_len = 70; 1107 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 1108 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 1109 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 1110 1111 gpio_set_value(GPIO_PTR1, 1); 1112 1113 /* FIXME 1114 * 1115 * LCDDON control is needed for Panel, 1116 * but current sh_mobile_lcdc driver doesn't control it. 1117 * It is temporary correspondence 1118 */ 1119 gpio_request(GPIO_PTF4, NULL); 1120 gpio_direction_output(GPIO_PTF4, 1); 1121 1122 /* enable TouchScreen */ 1123 i2c_register_board_info(0, &ts_i2c_clients, 1); 1124 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); 1125 } 1126 1127 /* enable CEU0 */ 1128 gpio_request(GPIO_FN_VIO0_D15, NULL); 1129 gpio_request(GPIO_FN_VIO0_D14, NULL); 1130 gpio_request(GPIO_FN_VIO0_D13, NULL); 1131 gpio_request(GPIO_FN_VIO0_D12, NULL); 1132 gpio_request(GPIO_FN_VIO0_D11, NULL); 1133 gpio_request(GPIO_FN_VIO0_D10, NULL); 1134 gpio_request(GPIO_FN_VIO0_D9, NULL); 1135 gpio_request(GPIO_FN_VIO0_D8, NULL); 1136 gpio_request(GPIO_FN_VIO0_D7, NULL); 1137 gpio_request(GPIO_FN_VIO0_D6, NULL); 1138 gpio_request(GPIO_FN_VIO0_D5, NULL); 1139 gpio_request(GPIO_FN_VIO0_D4, NULL); 1140 gpio_request(GPIO_FN_VIO0_D3, NULL); 1141 gpio_request(GPIO_FN_VIO0_D2, NULL); 1142 gpio_request(GPIO_FN_VIO0_D1, NULL); 1143 gpio_request(GPIO_FN_VIO0_D0, NULL); 1144 gpio_request(GPIO_FN_VIO0_VD, NULL); 1145 gpio_request(GPIO_FN_VIO0_CLK, NULL); 1146 gpio_request(GPIO_FN_VIO0_FLD, NULL); 1147 gpio_request(GPIO_FN_VIO0_HD, NULL); 1148 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 1149 1150 /* enable CEU1 */ 1151 gpio_request(GPIO_FN_VIO1_D7, NULL); 1152 gpio_request(GPIO_FN_VIO1_D6, NULL); 1153 gpio_request(GPIO_FN_VIO1_D5, NULL); 1154 gpio_request(GPIO_FN_VIO1_D4, NULL); 1155 gpio_request(GPIO_FN_VIO1_D3, NULL); 1156 gpio_request(GPIO_FN_VIO1_D2, NULL); 1157 gpio_request(GPIO_FN_VIO1_D1, NULL); 1158 gpio_request(GPIO_FN_VIO1_D0, NULL); 1159 gpio_request(GPIO_FN_VIO1_FLD, NULL); 1160 gpio_request(GPIO_FN_VIO1_HD, NULL); 1161 gpio_request(GPIO_FN_VIO1_VD, NULL); 1162 gpio_request(GPIO_FN_VIO1_CLK, NULL); 1163 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 1164 1165 /* enable KEYSC */ 1166 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 1167 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 1168 gpio_request(GPIO_FN_KEYOUT3, NULL); 1169 gpio_request(GPIO_FN_KEYOUT2, NULL); 1170 gpio_request(GPIO_FN_KEYOUT1, NULL); 1171 gpio_request(GPIO_FN_KEYOUT0, NULL); 1172 gpio_request(GPIO_FN_KEYIN0, NULL); 1173 1174 /* enable user debug switch */ 1175 gpio_request(GPIO_PTR0, NULL); 1176 gpio_request(GPIO_PTR4, NULL); 1177 gpio_request(GPIO_PTR5, NULL); 1178 gpio_request(GPIO_PTR6, NULL); 1179 gpio_direction_input(GPIO_PTR0); 1180 gpio_direction_input(GPIO_PTR4); 1181 gpio_direction_input(GPIO_PTR5); 1182 gpio_direction_input(GPIO_PTR6); 1183 1184 #ifdef CONFIG_MFD_SH_MOBILE_SDHI 1185 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ 1186 gpio_request(GPIO_FN_SDHI0CD, NULL); 1187 gpio_request(GPIO_FN_SDHI0WP, NULL); 1188 gpio_request(GPIO_FN_SDHI0CMD, NULL); 1189 gpio_request(GPIO_FN_SDHI0CLK, NULL); 1190 gpio_request(GPIO_FN_SDHI0D3, NULL); 1191 gpio_request(GPIO_FN_SDHI0D2, NULL); 1192 gpio_request(GPIO_FN_SDHI0D1, NULL); 1193 gpio_request(GPIO_FN_SDHI0D0, NULL); 1194 gpio_request(GPIO_PTB6, NULL); 1195 gpio_direction_output(GPIO_PTB6, 0); 1196 1197 #if !defined(CONFIG_MMC_SH_MMCIF) 1198 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ 1199 gpio_request(GPIO_FN_SDHI1CD, NULL); 1200 gpio_request(GPIO_FN_SDHI1WP, NULL); 1201 gpio_request(GPIO_FN_SDHI1CMD, NULL); 1202 gpio_request(GPIO_FN_SDHI1CLK, NULL); 1203 gpio_request(GPIO_FN_SDHI1D3, NULL); 1204 gpio_request(GPIO_FN_SDHI1D2, NULL); 1205 gpio_request(GPIO_FN_SDHI1D1, NULL); 1206 gpio_request(GPIO_FN_SDHI1D0, NULL); 1207 gpio_request(GPIO_PTB7, NULL); 1208 gpio_direction_output(GPIO_PTB7, 0); 1209 1210 /* I/O buffer drive ability is high for SDHI1 */ 1211 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1212 #endif /* CONFIG_MMC_SH_MMCIF */ 1213 #else 1214 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1215 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1216 gpio_request(GPIO_FN_MSIOF0_RXD, NULL); 1217 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); 1218 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ 1219 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ 1220 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ 1221 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ 1222 gpio_request(GPIO_PTY6, NULL); /* write protect */ 1223 gpio_direction_input(GPIO_PTY6); 1224 gpio_request(GPIO_PTY7, NULL); /* card detect */ 1225 gpio_direction_input(GPIO_PTY7); 1226 1227 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 1228 #endif 1229 1230 /* enable Video */ 1231 gpio_request(GPIO_PTU2, NULL); 1232 gpio_direction_output(GPIO_PTU2, 1); 1233 1234 /* enable Camera */ 1235 gpio_request(GPIO_PTA3, NULL); 1236 gpio_request(GPIO_PTA4, NULL); 1237 gpio_direction_output(GPIO_PTA3, 0); 1238 gpio_direction_output(GPIO_PTA4, 0); 1239 1240 /* enable FSI */ 1241 gpio_request(GPIO_FN_FSIMCKB, NULL); 1242 gpio_request(GPIO_FN_FSIIBSD, NULL); 1243 gpio_request(GPIO_FN_FSIOBSD, NULL); 1244 gpio_request(GPIO_FN_FSIIBBCK, NULL); 1245 gpio_request(GPIO_FN_FSIIBLRCK, NULL); 1246 gpio_request(GPIO_FN_FSIOBBCK, NULL); 1247 gpio_request(GPIO_FN_FSIOBLRCK, NULL); 1248 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 1249 1250 /* set SPU2 clock to 83.4 MHz */ 1251 clk = clk_get(NULL, "spu_clk"); 1252 if (clk) { 1253 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 1254 clk_put(clk); 1255 } 1256 1257 /* change parent of FSI B */ 1258 clk = clk_get(NULL, "fsib_clk"); 1259 if (clk) { 1260 clk_register(&fsimckb_clk); 1261 clk_set_parent(clk, &fsimckb_clk); 1262 clk_set_rate(clk, 11000); 1263 clk_set_rate(&fsimckb_clk, 11000); 1264 clk_put(clk); 1265 } 1266 1267 gpio_request(GPIO_PTU0, NULL); 1268 gpio_direction_output(GPIO_PTU0, 0); 1269 mdelay(20); 1270 1271 /* enable motion sensor */ 1272 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 1273 gpio_direction_input(GPIO_FN_INTC_IRQ1); 1274 1275 /* set VPU clock to 166 MHz */ 1276 clk = clk_get(NULL, "vpu_clk"); 1277 if (clk) { 1278 clk_set_rate(clk, clk_round_rate(clk, 166000000)); 1279 clk_put(clk); 1280 } 1281 1282 /* enable IrDA */ 1283 gpio_request(GPIO_FN_IRDA_OUT, NULL); 1284 gpio_request(GPIO_FN_IRDA_IN, NULL); 1285 gpio_request(GPIO_PTU5, NULL); 1286 gpio_direction_output(GPIO_PTU5, 0); 1287 1288 #if defined(CONFIG_MMC_SH_MMCIF) 1289 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ 1290 gpio_request(GPIO_FN_MMC_D7, NULL); 1291 gpio_request(GPIO_FN_MMC_D6, NULL); 1292 gpio_request(GPIO_FN_MMC_D5, NULL); 1293 gpio_request(GPIO_FN_MMC_D4, NULL); 1294 gpio_request(GPIO_FN_MMC_D3, NULL); 1295 gpio_request(GPIO_FN_MMC_D2, NULL); 1296 gpio_request(GPIO_FN_MMC_D1, NULL); 1297 gpio_request(GPIO_FN_MMC_D0, NULL); 1298 gpio_request(GPIO_FN_MMC_CLK, NULL); 1299 gpio_request(GPIO_FN_MMC_CMD, NULL); 1300 gpio_request(GPIO_PTB7, NULL); 1301 gpio_direction_output(GPIO_PTB7, 0); 1302 1303 /* I/O buffer drive ability is high for MMCIF */ 1304 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1305 #endif 1306 1307 /* enable I2C device */ 1308 i2c_register_board_info(0, i2c0_devices, 1309 ARRAY_SIZE(i2c0_devices)); 1310 1311 i2c_register_board_info(1, i2c1_devices, 1312 ARRAY_SIZE(i2c1_devices)); 1313 1314 /* VOU */ 1315 gpio_request(GPIO_FN_DV_D15, NULL); 1316 gpio_request(GPIO_FN_DV_D14, NULL); 1317 gpio_request(GPIO_FN_DV_D13, NULL); 1318 gpio_request(GPIO_FN_DV_D12, NULL); 1319 gpio_request(GPIO_FN_DV_D11, NULL); 1320 gpio_request(GPIO_FN_DV_D10, NULL); 1321 gpio_request(GPIO_FN_DV_D9, NULL); 1322 gpio_request(GPIO_FN_DV_D8, NULL); 1323 gpio_request(GPIO_FN_DV_CLKI, NULL); 1324 gpio_request(GPIO_FN_DV_CLK, NULL); 1325 gpio_request(GPIO_FN_DV_VSYNC, NULL); 1326 gpio_request(GPIO_FN_DV_HSYNC, NULL); 1327 1328 /* AK8813 power / reset sequence */ 1329 gpio_request(GPIO_PTG4, NULL); 1330 gpio_request(GPIO_PTU3, NULL); 1331 /* Reset */ 1332 gpio_direction_output(GPIO_PTG4, 0); 1333 /* Power down */ 1334 gpio_direction_output(GPIO_PTU3, 1); 1335 1336 udelay(10); 1337 1338 /* Power up, reset */ 1339 gpio_set_value(GPIO_PTU3, 0); 1340 1341 udelay(10); 1342 1343 /* Remove reset */ 1344 gpio_set_value(GPIO_PTG4, 1); 1345 1346 return platform_add_devices(ecovec_devices, 1347 ARRAY_SIZE(ecovec_devices)); 1348 } 1349 arch_initcall(arch_setup); 1350 1351 static int __init devices_setup(void) 1352 { 1353 sh_eth_init(&sh_eth_plat); 1354 return 0; 1355 } 1356 device_initcall(devices_setup); 1357 1358 static struct sh_machine_vector mv_ecovec __initmv = { 1359 .mv_name = "R0P7724 (EcoVec)", 1360 }; 1361