1 /*
2  * Copyright (C) 2009 Renesas Solutions Corp.
3  *
4  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 
11 #include <linux/init.h>
12 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mmc/host.h>
15 #include <linux/mmc/sh_mmcif.h>
16 #include <linux/mmc/sh_mobile_sdhi.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/gpio.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/delay.h>
22 #include <linux/usb/r8a66597.h>
23 #include <linux/usb/renesas_usbhs.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/tsc2007.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/sh_msiof.h>
28 #include <linux/spi/mmc_spi.h>
29 #include <linux/input.h>
30 #include <linux/input/sh_keysc.h>
31 #include <linux/sh_eth.h>
32 #include <linux/videodev2.h>
33 #include <video/sh_mobile_lcdc.h>
34 #include <sound/sh_fsi.h>
35 #include <media/sh_mobile_ceu.h>
36 #include <media/soc_camera.h>
37 #include <media/tw9910.h>
38 #include <media/mt9t112.h>
39 #include <asm/heartbeat.h>
40 #include <asm/clock.h>
41 #include <asm/suspend.h>
42 #include <cpu/sh7724.h>
43 
44 /*
45  *  Address      Interface        BusWidth
46  *-----------------------------------------
47  *  0x0000_0000  uboot            16bit
48  *  0x0004_0000  Linux romImage   16bit
49  *  0x0014_0000  MTD for Linux    16bit
50  *  0x0400_0000  Internal I/O     16/32bit
51  *  0x0800_0000  DRAM             32bit
52  *  0x1800_0000  MFI              16bit
53  */
54 
55 /* SWITCH
56  *------------------------------
57  * DS2[1] = FlashROM write protect  ON     : write protect
58  *                                  OFF    : No write protect
59  * DS2[2] = RMII / TS, SCIF         ON     : RMII
60  *                                  OFF    : TS, SCIF3
61  * DS2[3] = Camera / Video          ON     : Camera
62  *                                  OFF    : NTSC/PAL (IN)
63  * DS2[5] = NTSC_OUT Clock          ON     : On board OSC
64  *                                  OFF    : SH7724 DV_CLK
65  * DS2[6-7] = MMC / SD              ON-OFF : SD
66  *                                  OFF-ON : MMC
67  */
68 
69 /* Heartbeat */
70 static unsigned char led_pos[] = { 0, 1, 2, 3 };
71 
72 static struct heartbeat_data heartbeat_data = {
73 	.nr_bits = 4,
74 	.bit_pos = led_pos,
75 };
76 
77 static struct resource heartbeat_resource = {
78 	.start  = 0xA405012C, /* PTG */
79 	.end    = 0xA405012E - 1,
80 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
81 };
82 
83 static struct platform_device heartbeat_device = {
84 	.name           = "heartbeat",
85 	.id             = -1,
86 	.dev = {
87 		.platform_data = &heartbeat_data,
88 	},
89 	.num_resources  = 1,
90 	.resource       = &heartbeat_resource,
91 };
92 
93 /* MTD */
94 static struct mtd_partition nor_flash_partitions[] = {
95 	{
96 		.name = "boot loader",
97 		.offset = 0,
98 		.size = (5 * 1024 * 1024),
99 		.mask_flags = MTD_WRITEABLE,  /* force read-only */
100 	}, {
101 		.name = "free-area",
102 		.offset = MTDPART_OFS_APPEND,
103 		.size = MTDPART_SIZ_FULL,
104 	},
105 };
106 
107 static struct physmap_flash_data nor_flash_data = {
108 	.width		= 2,
109 	.parts		= nor_flash_partitions,
110 	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
111 };
112 
113 static struct resource nor_flash_resources[] = {
114 	[0] = {
115 		.name	= "NOR Flash",
116 		.start	= 0x00000000,
117 		.end	= 0x03ffffff,
118 		.flags	= IORESOURCE_MEM,
119 	}
120 };
121 
122 static struct platform_device nor_flash_device = {
123 	.name		= "physmap-flash",
124 	.resource	= nor_flash_resources,
125 	.num_resources	= ARRAY_SIZE(nor_flash_resources),
126 	.dev		= {
127 		.platform_data = &nor_flash_data,
128 	},
129 };
130 
131 /* SH Eth */
132 #define SH_ETH_ADDR	(0xA4600000)
133 static struct resource sh_eth_resources[] = {
134 	[0] = {
135 		.start = SH_ETH_ADDR,
136 		.end   = SH_ETH_ADDR + 0x1FC,
137 		.flags = IORESOURCE_MEM,
138 	},
139 	[1] = {
140 		.start = 91,
141 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
142 	},
143 };
144 
145 static struct sh_eth_plat_data sh_eth_plat = {
146 	.phy = 0x1f, /* SMSC LAN8700 */
147 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
148 	.register_type = SH_ETH_REG_FAST_SH4,
149 	.phy_interface = PHY_INTERFACE_MODE_MII,
150 	.ether_link_active_low = 1
151 };
152 
153 static struct platform_device sh_eth_device = {
154 	.name = "sh-eth",
155 	.id	= 0,
156 	.dev = {
157 		.platform_data = &sh_eth_plat,
158 	},
159 	.num_resources = ARRAY_SIZE(sh_eth_resources),
160 	.resource = sh_eth_resources,
161 };
162 
163 /* USB0 host */
164 static void usb0_port_power(int port, int power)
165 {
166 	gpio_set_value(GPIO_PTB4, power);
167 }
168 
169 static struct r8a66597_platdata usb0_host_data = {
170 	.on_chip = 1,
171 	.port_power = usb0_port_power,
172 };
173 
174 static struct resource usb0_host_resources[] = {
175 	[0] = {
176 		.start	= 0xa4d80000,
177 		.end	= 0xa4d80124 - 1,
178 		.flags	= IORESOURCE_MEM,
179 	},
180 	[1] = {
181 		.start	= 65,
182 		.end	= 65,
183 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
184 	},
185 };
186 
187 static struct platform_device usb0_host_device = {
188 	.name		= "r8a66597_hcd",
189 	.id		= 0,
190 	.dev = {
191 		.dma_mask		= NULL,         /*  not use dma */
192 		.coherent_dma_mask	= 0xffffffff,
193 		.platform_data		= &usb0_host_data,
194 	},
195 	.num_resources	= ARRAY_SIZE(usb0_host_resources),
196 	.resource	= usb0_host_resources,
197 };
198 
199 /* USB1 host/function */
200 static void usb1_port_power(int port, int power)
201 {
202 	gpio_set_value(GPIO_PTB5, power);
203 }
204 
205 static struct r8a66597_platdata usb1_common_data = {
206 	.on_chip = 1,
207 	.port_power = usb1_port_power,
208 };
209 
210 static struct resource usb1_common_resources[] = {
211 	[0] = {
212 		.start	= 0xa4d90000,
213 		.end	= 0xa4d90124 - 1,
214 		.flags	= IORESOURCE_MEM,
215 	},
216 	[1] = {
217 		.start	= 66,
218 		.end	= 66,
219 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
220 	},
221 };
222 
223 static struct platform_device usb1_common_device = {
224 	/* .name will be added in arch_setup */
225 	.id		= 1,
226 	.dev = {
227 		.dma_mask		= NULL,         /*  not use dma */
228 		.coherent_dma_mask	= 0xffffffff,
229 		.platform_data		= &usb1_common_data,
230 	},
231 	.num_resources	= ARRAY_SIZE(usb1_common_resources),
232 	.resource	= usb1_common_resources,
233 };
234 
235 /*
236  * USBHS
237  */
238 static int usbhs_get_id(struct platform_device *pdev)
239 {
240 	return gpio_get_value(GPIO_PTB3);
241 }
242 
243 static struct renesas_usbhs_platform_info usbhs_info = {
244 	.platform_callback = {
245 		.get_id		= usbhs_get_id,
246 	},
247 	.driver_param = {
248 		.buswait_bwait		= 4,
249 		.detection_delay	= 5,
250 		.d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
251 		.d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
252 		.d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
253 		.d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
254 	},
255 };
256 
257 static struct resource usbhs_resources[] = {
258 	[0] = {
259 		.start	= 0xa4d90000,
260 		.end	= 0xa4d90124 - 1,
261 		.flags	= IORESOURCE_MEM,
262 	},
263 	[1] = {
264 		.start	= 66,
265 		.end	= 66,
266 		.flags	= IORESOURCE_IRQ,
267 	},
268 };
269 
270 static struct platform_device usbhs_device = {
271 	.name	= "renesas_usbhs",
272 	.id	= 1,
273 	.dev = {
274 		.dma_mask		= NULL,         /*  not use dma */
275 		.coherent_dma_mask	= 0xffffffff,
276 		.platform_data		= &usbhs_info,
277 	},
278 	.num_resources	= ARRAY_SIZE(usbhs_resources),
279 	.resource	= usbhs_resources,
280 };
281 
282 /* LCDC */
283 static const struct fb_videomode ecovec_lcd_modes[] = {
284 	{
285 		.name		= "Panel",
286 		.xres		= 800,
287 		.yres		= 480,
288 		.left_margin	= 220,
289 		.right_margin	= 110,
290 		.hsync_len	= 70,
291 		.upper_margin	= 20,
292 		.lower_margin	= 5,
293 		.vsync_len	= 5,
294 		.sync		= 0, /* hsync and vsync are active low */
295 	},
296 };
297 
298 static const struct fb_videomode ecovec_dvi_modes[] = {
299 	{
300 		.name		= "DVI",
301 		.xres		= 1280,
302 		.yres		= 720,
303 		.left_margin	= 220,
304 		.right_margin	= 110,
305 		.hsync_len	= 40,
306 		.upper_margin	= 20,
307 		.lower_margin	= 5,
308 		.vsync_len	= 5,
309 		.sync = 0, /* hsync and vsync are active low */
310 	},
311 };
312 
313 static int ecovec24_set_brightness(int brightness)
314 {
315 	gpio_set_value(GPIO_PTR1, brightness);
316 
317 	return 0;
318 }
319 
320 static int ecovec24_get_brightness(void)
321 {
322 	return gpio_get_value(GPIO_PTR1);
323 }
324 
325 static struct sh_mobile_lcdc_info lcdc_info = {
326 	.ch[0] = {
327 		.interface_type = RGB18,
328 		.chan = LCDC_CHAN_MAINLCD,
329 		.fourcc = V4L2_PIX_FMT_RGB565,
330 		.panel_cfg = { /* 7.0 inch */
331 			.width = 152,
332 			.height = 91,
333 		},
334 		.bl_info = {
335 			.name = "sh_mobile_lcdc_bl",
336 			.max_brightness = 1,
337 			.set_brightness = ecovec24_set_brightness,
338 			.get_brightness = ecovec24_get_brightness,
339 		},
340 	}
341 };
342 
343 static struct resource lcdc_resources[] = {
344 	[0] = {
345 		.name	= "LCDC",
346 		.start	= 0xfe940000,
347 		.end	= 0xfe942fff,
348 		.flags	= IORESOURCE_MEM,
349 	},
350 	[1] = {
351 		.start	= 106,
352 		.flags	= IORESOURCE_IRQ,
353 	},
354 };
355 
356 static struct platform_device lcdc_device = {
357 	.name		= "sh_mobile_lcdc_fb",
358 	.num_resources	= ARRAY_SIZE(lcdc_resources),
359 	.resource	= lcdc_resources,
360 	.dev		= {
361 		.platform_data	= &lcdc_info,
362 	},
363 };
364 
365 /* CEU0 */
366 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
367 	.flags = SH_CEU_FLAG_USE_8BIT_BUS,
368 };
369 
370 static struct resource ceu0_resources[] = {
371 	[0] = {
372 		.name	= "CEU0",
373 		.start	= 0xfe910000,
374 		.end	= 0xfe91009f,
375 		.flags	= IORESOURCE_MEM,
376 	},
377 	[1] = {
378 		.start  = 52,
379 		.flags  = IORESOURCE_IRQ,
380 	},
381 	[2] = {
382 		/* place holder for contiguous memory */
383 	},
384 };
385 
386 static struct platform_device ceu0_device = {
387 	.name		= "sh_mobile_ceu",
388 	.id             = 0, /* "ceu0" clock */
389 	.num_resources	= ARRAY_SIZE(ceu0_resources),
390 	.resource	= ceu0_resources,
391 	.dev	= {
392 		.platform_data	= &sh_mobile_ceu0_info,
393 	},
394 };
395 
396 /* CEU1 */
397 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
398 	.flags = SH_CEU_FLAG_USE_8BIT_BUS,
399 };
400 
401 static struct resource ceu1_resources[] = {
402 	[0] = {
403 		.name	= "CEU1",
404 		.start	= 0xfe914000,
405 		.end	= 0xfe91409f,
406 		.flags	= IORESOURCE_MEM,
407 	},
408 	[1] = {
409 		.start  = 63,
410 		.flags  = IORESOURCE_IRQ,
411 	},
412 	[2] = {
413 		/* place holder for contiguous memory */
414 	},
415 };
416 
417 static struct platform_device ceu1_device = {
418 	.name		= "sh_mobile_ceu",
419 	.id             = 1, /* "ceu1" clock */
420 	.num_resources	= ARRAY_SIZE(ceu1_resources),
421 	.resource	= ceu1_resources,
422 	.dev	= {
423 		.platform_data	= &sh_mobile_ceu1_info,
424 	},
425 };
426 
427 /* I2C device */
428 static struct i2c_board_info i2c0_devices[] = {
429 	{
430 		I2C_BOARD_INFO("da7210", 0x1a),
431 	},
432 };
433 
434 static struct i2c_board_info i2c1_devices[] = {
435 	{
436 		I2C_BOARD_INFO("r2025sd", 0x32),
437 	},
438 	{
439 		I2C_BOARD_INFO("lis3lv02d", 0x1c),
440 		.irq = 33,
441 	}
442 };
443 
444 /* KEYSC */
445 static struct sh_keysc_info keysc_info = {
446 	.mode		= SH_KEYSC_MODE_1,
447 	.scan_timing	= 3,
448 	.delay		= 50,
449 	.kycr2_delay	= 100,
450 	.keycodes	= { KEY_1, 0, 0, 0, 0,
451 			    KEY_2, 0, 0, 0, 0,
452 			    KEY_3, 0, 0, 0, 0,
453 			    KEY_4, 0, 0, 0, 0,
454 			    KEY_5, 0, 0, 0, 0,
455 			    KEY_6, 0, 0, 0, 0, },
456 };
457 
458 static struct resource keysc_resources[] = {
459 	[0] = {
460 		.name	= "KEYSC",
461 		.start  = 0x044b0000,
462 		.end    = 0x044b000f,
463 		.flags  = IORESOURCE_MEM,
464 	},
465 	[1] = {
466 		.start  = 79,
467 		.flags  = IORESOURCE_IRQ,
468 	},
469 };
470 
471 static struct platform_device keysc_device = {
472 	.name           = "sh_keysc",
473 	.id             = 0, /* keysc0 clock */
474 	.num_resources  = ARRAY_SIZE(keysc_resources),
475 	.resource       = keysc_resources,
476 	.dev	= {
477 		.platform_data	= &keysc_info,
478 	},
479 };
480 
481 /* TouchScreen */
482 #define IRQ0 32
483 static int ts_get_pendown_state(void)
484 {
485 	int val = 0;
486 	gpio_free(GPIO_FN_INTC_IRQ0);
487 	gpio_request(GPIO_PTZ0, NULL);
488 	gpio_direction_input(GPIO_PTZ0);
489 
490 	val = gpio_get_value(GPIO_PTZ0);
491 
492 	gpio_free(GPIO_PTZ0);
493 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
494 
495 	return val ? 0 : 1;
496 }
497 
498 static int ts_init(void)
499 {
500 	gpio_request(GPIO_FN_INTC_IRQ0, NULL);
501 	return 0;
502 }
503 
504 static struct tsc2007_platform_data tsc2007_info = {
505 	.model			= 2007,
506 	.x_plate_ohms		= 180,
507 	.get_pendown_state	= ts_get_pendown_state,
508 	.init_platform_hw	= ts_init,
509 };
510 
511 static struct i2c_board_info ts_i2c_clients = {
512 	I2C_BOARD_INFO("tsc2007", 0x48),
513 	.type		= "tsc2007",
514 	.platform_data	= &tsc2007_info,
515 	.irq		= IRQ0,
516 };
517 
518 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
519 /* SDHI0 */
520 static void sdhi0_set_pwr(struct platform_device *pdev, int state)
521 {
522 	gpio_set_value(GPIO_PTB6, state);
523 }
524 
525 static struct sh_mobile_sdhi_info sdhi0_info = {
526 	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,
527 	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,
528 	.set_pwr	= sdhi0_set_pwr,
529 	.tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
530 };
531 
532 static struct resource sdhi0_resources[] = {
533 	[0] = {
534 		.name	= "SDHI0",
535 		.start  = 0x04ce0000,
536 		.end    = 0x04ce00ff,
537 		.flags  = IORESOURCE_MEM,
538 	},
539 	[1] = {
540 		.start  = 100,
541 		.flags  = IORESOURCE_IRQ,
542 	},
543 };
544 
545 static struct platform_device sdhi0_device = {
546 	.name           = "sh_mobile_sdhi",
547 	.num_resources  = ARRAY_SIZE(sdhi0_resources),
548 	.resource       = sdhi0_resources,
549 	.id             = 0,
550 	.dev	= {
551 		.platform_data	= &sdhi0_info,
552 	},
553 };
554 
555 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
556 /* SDHI1 */
557 static void sdhi1_set_pwr(struct platform_device *pdev, int state)
558 {
559 	gpio_set_value(GPIO_PTB7, state);
560 }
561 
562 static struct sh_mobile_sdhi_info sdhi1_info = {
563 	.dma_slave_tx	= SHDMA_SLAVE_SDHI1_TX,
564 	.dma_slave_rx	= SHDMA_SLAVE_SDHI1_RX,
565 	.tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
566 	.set_pwr	= sdhi1_set_pwr,
567 };
568 
569 static struct resource sdhi1_resources[] = {
570 	[0] = {
571 		.name	= "SDHI1",
572 		.start  = 0x04cf0000,
573 		.end    = 0x04cf00ff,
574 		.flags  = IORESOURCE_MEM,
575 	},
576 	[1] = {
577 		.start  = 23,
578 		.flags  = IORESOURCE_IRQ,
579 	},
580 };
581 
582 static struct platform_device sdhi1_device = {
583 	.name           = "sh_mobile_sdhi",
584 	.num_resources  = ARRAY_SIZE(sdhi1_resources),
585 	.resource       = sdhi1_resources,
586 	.id             = 1,
587 	.dev	= {
588 		.platform_data	= &sdhi1_info,
589 	},
590 };
591 #endif /* CONFIG_MMC_SH_MMCIF */
592 
593 #else
594 
595 /* MMC SPI */
596 static int mmc_spi_get_ro(struct device *dev)
597 {
598 	return gpio_get_value(GPIO_PTY6);
599 }
600 
601 static int mmc_spi_get_cd(struct device *dev)
602 {
603 	return !gpio_get_value(GPIO_PTY7);
604 }
605 
606 static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
607 {
608 	gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
609 }
610 
611 static struct mmc_spi_platform_data mmc_spi_info = {
612 	.get_ro = mmc_spi_get_ro,
613 	.get_cd = mmc_spi_get_cd,
614 	.caps = MMC_CAP_NEEDS_POLL,
615 	.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
616 	.setpower = mmc_spi_setpower,
617 };
618 
619 static struct spi_board_info spi_bus[] = {
620 	{
621 		.modalias	= "mmc_spi",
622 		.platform_data	= &mmc_spi_info,
623 		.max_speed_hz	= 5000000,
624 		.mode		= SPI_MODE_0,
625 		.controller_data = (void *) GPIO_PTM4,
626 	},
627 };
628 
629 /* MSIOF0 */
630 static struct sh_msiof_spi_info msiof0_data = {
631 	.num_chipselect = 1,
632 };
633 
634 static struct resource msiof0_resources[] = {
635 	[0] = {
636 		.name	= "MSIOF0",
637 		.start	= 0xa4c40000,
638 		.end	= 0xa4c40063,
639 		.flags	= IORESOURCE_MEM,
640 	},
641 	[1] = {
642 		.start	= 84,
643 		.flags	= IORESOURCE_IRQ,
644 	},
645 };
646 
647 static struct platform_device msiof0_device = {
648 	.name		= "spi_sh_msiof",
649 	.id		= 0, /* MSIOF0 */
650 	.dev = {
651 		.platform_data = &msiof0_data,
652 	},
653 	.num_resources	= ARRAY_SIZE(msiof0_resources),
654 	.resource	= msiof0_resources,
655 };
656 
657 #endif
658 
659 /* I2C Video/Camera */
660 static struct i2c_board_info i2c_camera[] = {
661 	{
662 		I2C_BOARD_INFO("tw9910", 0x45),
663 	},
664 	{
665 		/* 1st camera */
666 		I2C_BOARD_INFO("mt9t112", 0x3c),
667 	},
668 	{
669 		/* 2nd camera */
670 		I2C_BOARD_INFO("mt9t112", 0x3c),
671 	},
672 };
673 
674 /* tw9910 */
675 static int tw9910_power(struct device *dev, int mode)
676 {
677 	int val = mode ? 0 : 1;
678 
679 	gpio_set_value(GPIO_PTU2, val);
680 	if (mode)
681 		mdelay(100);
682 
683 	return 0;
684 }
685 
686 static struct tw9910_video_info tw9910_info = {
687 	.buswidth	= SOCAM_DATAWIDTH_8,
688 	.mpout		= TW9910_MPO_FIELD,
689 };
690 
691 static struct soc_camera_link tw9910_link = {
692 	.i2c_adapter_id	= 0,
693 	.bus_id		= 1,
694 	.power		= tw9910_power,
695 	.board_info	= &i2c_camera[0],
696 	.priv		= &tw9910_info,
697 };
698 
699 /* mt9t112 */
700 static int mt9t112_power1(struct device *dev, int mode)
701 {
702 	gpio_set_value(GPIO_PTA3, mode);
703 	if (mode)
704 		mdelay(100);
705 
706 	return 0;
707 }
708 
709 static struct mt9t112_camera_info mt9t112_info1 = {
710 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
711 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
712 };
713 
714 static struct soc_camera_link mt9t112_link1 = {
715 	.i2c_adapter_id	= 0,
716 	.power		= mt9t112_power1,
717 	.bus_id		= 0,
718 	.board_info	= &i2c_camera[1],
719 	.priv		= &mt9t112_info1,
720 };
721 
722 static int mt9t112_power2(struct device *dev, int mode)
723 {
724 	gpio_set_value(GPIO_PTA4, mode);
725 	if (mode)
726 		mdelay(100);
727 
728 	return 0;
729 }
730 
731 static struct mt9t112_camera_info mt9t112_info2 = {
732 	.flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
733 	.divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
734 };
735 
736 static struct soc_camera_link mt9t112_link2 = {
737 	.i2c_adapter_id	= 1,
738 	.power		= mt9t112_power2,
739 	.bus_id		= 1,
740 	.board_info	= &i2c_camera[2],
741 	.priv		= &mt9t112_info2,
742 };
743 
744 static struct platform_device camera_devices[] = {
745 	{
746 		.name	= "soc-camera-pdrv",
747 		.id	= 0,
748 		.dev	= {
749 			.platform_data = &tw9910_link,
750 		},
751 	},
752 	{
753 		.name	= "soc-camera-pdrv",
754 		.id	= 1,
755 		.dev	= {
756 			.platform_data = &mt9t112_link1,
757 		},
758 	},
759 	{
760 		.name	= "soc-camera-pdrv",
761 		.id	= 2,
762 		.dev	= {
763 			.platform_data = &mt9t112_link2,
764 		},
765 	},
766 };
767 
768 /* FSI */
769 static struct sh_fsi_platform_info fsi_info = {
770 	.port_b = {
771 		.flags = SH_FSI_BRS_INV,
772 	},
773 };
774 
775 static struct resource fsi_resources[] = {
776 	[0] = {
777 		.name	= "FSI",
778 		.start	= 0xFE3C0000,
779 		.end	= 0xFE3C021d,
780 		.flags	= IORESOURCE_MEM,
781 	},
782 	[1] = {
783 		.start  = 108,
784 		.flags  = IORESOURCE_IRQ,
785 	},
786 };
787 
788 static struct platform_device fsi_device = {
789 	.name		= "sh_fsi",
790 	.id		= 0,
791 	.num_resources	= ARRAY_SIZE(fsi_resources),
792 	.resource	= fsi_resources,
793 	.dev	= {
794 		.platform_data	= &fsi_info,
795 	},
796 };
797 
798 /* IrDA */
799 static struct resource irda_resources[] = {
800 	[0] = {
801 		.name	= "IrDA",
802 		.start  = 0xA45D0000,
803 		.end    = 0xA45D0049,
804 		.flags  = IORESOURCE_MEM,
805 	},
806 	[1] = {
807 		.start  = 20,
808 		.flags  = IORESOURCE_IRQ,
809 	},
810 };
811 
812 static struct platform_device irda_device = {
813 	.name           = "sh_sir",
814 	.num_resources  = ARRAY_SIZE(irda_resources),
815 	.resource       = irda_resources,
816 };
817 
818 #include <media/ak881x.h>
819 #include <media/sh_vou.h>
820 
821 static struct ak881x_pdata ak881x_pdata = {
822 	.flags = AK881X_IF_MODE_SLAVE,
823 };
824 
825 static struct i2c_board_info ak8813 = {
826 	I2C_BOARD_INFO("ak8813", 0x20),
827 	.platform_data = &ak881x_pdata,
828 };
829 
830 static struct sh_vou_pdata sh_vou_pdata = {
831 	.bus_fmt	= SH_VOU_BUS_8BIT,
832 	.flags		= SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
833 	.board_info	= &ak8813,
834 	.i2c_adap	= 0,
835 };
836 
837 static struct resource sh_vou_resources[] = {
838 	[0] = {
839 		.start  = 0xfe960000,
840 		.end    = 0xfe962043,
841 		.flags  = IORESOURCE_MEM,
842 	},
843 	[1] = {
844 		.start  = 55,
845 		.flags  = IORESOURCE_IRQ,
846 	},
847 };
848 
849 static struct platform_device vou_device = {
850 	.name           = "sh-vou",
851 	.id		= -1,
852 	.num_resources  = ARRAY_SIZE(sh_vou_resources),
853 	.resource       = sh_vou_resources,
854 	.dev		= {
855 		.platform_data	= &sh_vou_pdata,
856 	},
857 };
858 
859 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
860 /* SH_MMCIF */
861 static void mmcif_set_pwr(struct platform_device *pdev, int state)
862 {
863 	gpio_set_value(GPIO_PTB7, state);
864 }
865 
866 static void mmcif_down_pwr(struct platform_device *pdev)
867 {
868 	gpio_set_value(GPIO_PTB7, 0);
869 }
870 
871 static struct resource sh_mmcif_resources[] = {
872 	[0] = {
873 		.name	= "SH_MMCIF",
874 		.start	= 0xA4CA0000,
875 		.end	= 0xA4CA00FF,
876 		.flags	= IORESOURCE_MEM,
877 	},
878 	[1] = {
879 		/* MMC2I */
880 		.start	= 29,
881 		.flags	= IORESOURCE_IRQ,
882 	},
883 	[2] = {
884 		/* MMC3I */
885 		.start	= 30,
886 		.flags	= IORESOURCE_IRQ,
887 	},
888 };
889 
890 static struct sh_mmcif_plat_data sh_mmcif_plat = {
891 	.set_pwr	= mmcif_set_pwr,
892 	.down_pwr	= mmcif_down_pwr,
893 	.sup_pclk	= 0, /* SH7724: Max Pclk/2 */
894 	.caps		= MMC_CAP_4_BIT_DATA |
895 			  MMC_CAP_8_BIT_DATA |
896 			  MMC_CAP_NEEDS_POLL,
897 	.ocr		= MMC_VDD_32_33 | MMC_VDD_33_34,
898 };
899 
900 static struct platform_device sh_mmcif_device = {
901 	.name		= "sh_mmcif",
902 	.id		= 0,
903 	.dev		= {
904 		.platform_data		= &sh_mmcif_plat,
905 	},
906 	.num_resources	= ARRAY_SIZE(sh_mmcif_resources),
907 	.resource	= sh_mmcif_resources,
908 };
909 #endif
910 
911 static struct platform_device *ecovec_devices[] __initdata = {
912 	&heartbeat_device,
913 	&nor_flash_device,
914 	&sh_eth_device,
915 	&usb0_host_device,
916 	&usb1_common_device,
917 	&usbhs_device,
918 	&lcdc_device,
919 	&ceu0_device,
920 	&ceu1_device,
921 	&keysc_device,
922 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
923 	&sdhi0_device,
924 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
925 	&sdhi1_device,
926 #endif
927 #else
928 	&msiof0_device,
929 #endif
930 	&camera_devices[0],
931 	&camera_devices[1],
932 	&camera_devices[2],
933 	&fsi_device,
934 	&irda_device,
935 	&vou_device,
936 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
937 	&sh_mmcif_device,
938 #endif
939 };
940 
941 #ifdef CONFIG_I2C
942 #define EEPROM_ADDR 0x50
943 static u8 mac_read(struct i2c_adapter *a, u8 command)
944 {
945 	struct i2c_msg msg[2];
946 	u8 buf;
947 	int ret;
948 
949 	msg[0].addr  = EEPROM_ADDR;
950 	msg[0].flags = 0;
951 	msg[0].len   = 1;
952 	msg[0].buf   = &command;
953 
954 	msg[1].addr  = EEPROM_ADDR;
955 	msg[1].flags = I2C_M_RD;
956 	msg[1].len   = 1;
957 	msg[1].buf   = &buf;
958 
959 	ret = i2c_transfer(a, msg, 2);
960 	if (ret < 0) {
961 		printk(KERN_ERR "error %d\n", ret);
962 		buf = 0xff;
963 	}
964 
965 	return buf;
966 }
967 
968 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
969 {
970 	struct i2c_adapter *a = i2c_get_adapter(1);
971 	int i;
972 
973 	if (!a) {
974 		pr_err("can not get I2C 1\n");
975 		return;
976 	}
977 
978 	/* read MAC address from EEPROM */
979 	for (i = 0; i < sizeof(pd->mac_addr); i++) {
980 		pd->mac_addr[i] = mac_read(a, 0x10 + i);
981 		msleep(10);
982 	}
983 
984 	i2c_put_adapter(a);
985 }
986 #else
987 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
988 {
989 	pr_err("unable to read sh_eth MAC address\n");
990 }
991 #endif
992 
993 #define PORT_HIZA 0xA4050158
994 #define IODRIVEA  0xA405018A
995 
996 extern char ecovec24_sdram_enter_start;
997 extern char ecovec24_sdram_enter_end;
998 extern char ecovec24_sdram_leave_start;
999 extern char ecovec24_sdram_leave_end;
1000 
1001 static int __init arch_setup(void)
1002 {
1003 	struct clk *clk;
1004 
1005 	/* register board specific self-refresh code */
1006 	sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
1007 					SUSP_SH_RSTANDBY,
1008 					&ecovec24_sdram_enter_start,
1009 					&ecovec24_sdram_enter_end,
1010 					&ecovec24_sdram_leave_start,
1011 					&ecovec24_sdram_leave_end);
1012 
1013 	/* enable STATUS0, STATUS2 and PDSTATUS */
1014 	gpio_request(GPIO_FN_STATUS0, NULL);
1015 	gpio_request(GPIO_FN_STATUS2, NULL);
1016 	gpio_request(GPIO_FN_PDSTATUS, NULL);
1017 
1018 	/* enable SCIFA0 */
1019 	gpio_request(GPIO_FN_SCIF0_TXD, NULL);
1020 	gpio_request(GPIO_FN_SCIF0_RXD, NULL);
1021 
1022 	/* enable debug LED */
1023 	gpio_request(GPIO_PTG0, NULL);
1024 	gpio_request(GPIO_PTG1, NULL);
1025 	gpio_request(GPIO_PTG2, NULL);
1026 	gpio_request(GPIO_PTG3, NULL);
1027 	gpio_direction_output(GPIO_PTG0, 0);
1028 	gpio_direction_output(GPIO_PTG1, 0);
1029 	gpio_direction_output(GPIO_PTG2, 0);
1030 	gpio_direction_output(GPIO_PTG3, 0);
1031 	__raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
1032 
1033 	/* enable SH-Eth */
1034 	gpio_request(GPIO_PTA1, NULL);
1035 	gpio_direction_output(GPIO_PTA1, 1);
1036 	mdelay(20);
1037 
1038 	gpio_request(GPIO_FN_RMII_RXD0,    NULL);
1039 	gpio_request(GPIO_FN_RMII_RXD1,    NULL);
1040 	gpio_request(GPIO_FN_RMII_TXD0,    NULL);
1041 	gpio_request(GPIO_FN_RMII_TXD1,    NULL);
1042 	gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1043 	gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
1044 	gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
1045 	gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
1046 	gpio_request(GPIO_FN_MDIO,         NULL);
1047 	gpio_request(GPIO_FN_MDC,          NULL);
1048 	gpio_request(GPIO_FN_LNKSTA,       NULL);
1049 
1050 	/* enable USB */
1051 	__raw_writew(0x0000, 0xA4D80000);
1052 	__raw_writew(0x0000, 0xA4D90000);
1053 	gpio_request(GPIO_PTB3,  NULL);
1054 	gpio_request(GPIO_PTB4,  NULL);
1055 	gpio_request(GPIO_PTB5,  NULL);
1056 	gpio_direction_input(GPIO_PTB3);
1057 	gpio_direction_output(GPIO_PTB4, 0);
1058 	gpio_direction_output(GPIO_PTB5, 0);
1059 	__raw_writew(0x0600, 0xa40501d4);
1060 	__raw_writew(0x0600, 0xa4050192);
1061 
1062 	if (gpio_get_value(GPIO_PTB3)) {
1063 		printk(KERN_INFO "USB1 function is selected\n");
1064 		usb1_common_device.name = "r8a66597_udc";
1065 	} else {
1066 		printk(KERN_INFO "USB1 host is selected\n");
1067 		usb1_common_device.name = "r8a66597_hcd";
1068 	}
1069 
1070 	/* enable LCDC */
1071 	gpio_request(GPIO_FN_LCDD23,   NULL);
1072 	gpio_request(GPIO_FN_LCDD22,   NULL);
1073 	gpio_request(GPIO_FN_LCDD21,   NULL);
1074 	gpio_request(GPIO_FN_LCDD20,   NULL);
1075 	gpio_request(GPIO_FN_LCDD19,   NULL);
1076 	gpio_request(GPIO_FN_LCDD18,   NULL);
1077 	gpio_request(GPIO_FN_LCDD17,   NULL);
1078 	gpio_request(GPIO_FN_LCDD16,   NULL);
1079 	gpio_request(GPIO_FN_LCDD15,   NULL);
1080 	gpio_request(GPIO_FN_LCDD14,   NULL);
1081 	gpio_request(GPIO_FN_LCDD13,   NULL);
1082 	gpio_request(GPIO_FN_LCDD12,   NULL);
1083 	gpio_request(GPIO_FN_LCDD11,   NULL);
1084 	gpio_request(GPIO_FN_LCDD10,   NULL);
1085 	gpio_request(GPIO_FN_LCDD9,    NULL);
1086 	gpio_request(GPIO_FN_LCDD8,    NULL);
1087 	gpio_request(GPIO_FN_LCDD7,    NULL);
1088 	gpio_request(GPIO_FN_LCDD6,    NULL);
1089 	gpio_request(GPIO_FN_LCDD5,    NULL);
1090 	gpio_request(GPIO_FN_LCDD4,    NULL);
1091 	gpio_request(GPIO_FN_LCDD3,    NULL);
1092 	gpio_request(GPIO_FN_LCDD2,    NULL);
1093 	gpio_request(GPIO_FN_LCDD1,    NULL);
1094 	gpio_request(GPIO_FN_LCDD0,    NULL);
1095 	gpio_request(GPIO_FN_LCDDISP,  NULL);
1096 	gpio_request(GPIO_FN_LCDHSYN,  NULL);
1097 	gpio_request(GPIO_FN_LCDDCK,   NULL);
1098 	gpio_request(GPIO_FN_LCDVSYN,  NULL);
1099 	gpio_request(GPIO_FN_LCDDON,   NULL);
1100 	gpio_request(GPIO_FN_LCDLCLK,  NULL);
1101 	__raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
1102 
1103 	gpio_request(GPIO_PTE6, NULL);
1104 	gpio_request(GPIO_PTU1, NULL);
1105 	gpio_request(GPIO_PTR1, NULL);
1106 	gpio_request(GPIO_PTA2, NULL);
1107 	gpio_direction_input(GPIO_PTE6);
1108 	gpio_direction_output(GPIO_PTU1, 0);
1109 	gpio_direction_output(GPIO_PTR1, 0);
1110 	gpio_direction_output(GPIO_PTA2, 0);
1111 
1112 	/* I/O buffer drive ability is high */
1113 	__raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
1114 
1115 	if (gpio_get_value(GPIO_PTE6)) {
1116 		/* DVI */
1117 		lcdc_info.clock_source			= LCDC_CLK_EXTERNAL;
1118 		lcdc_info.ch[0].clock_divider		= 1;
1119 		lcdc_info.ch[0].lcd_modes		= ecovec_dvi_modes;
1120 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_dvi_modes);
1121 
1122 		gpio_set_value(GPIO_PTA2, 1);
1123 		gpio_set_value(GPIO_PTU1, 1);
1124 	} else {
1125 		/* Panel */
1126 		lcdc_info.clock_source			= LCDC_CLK_PERIPHERAL;
1127 		lcdc_info.ch[0].clock_divider		= 2;
1128 		lcdc_info.ch[0].lcd_modes		= ecovec_lcd_modes;
1129 		lcdc_info.ch[0].num_modes		= ARRAY_SIZE(ecovec_lcd_modes);
1130 
1131 		gpio_set_value(GPIO_PTR1, 1);
1132 
1133 		/* FIXME
1134 		 *
1135 		 * LCDDON control is needed for Panel,
1136 		 * but current sh_mobile_lcdc driver doesn't control it.
1137 		 * It is temporary correspondence
1138 		 */
1139 		gpio_request(GPIO_PTF4, NULL);
1140 		gpio_direction_output(GPIO_PTF4, 1);
1141 
1142 		/* enable TouchScreen */
1143 		i2c_register_board_info(0, &ts_i2c_clients, 1);
1144 		irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
1145 	}
1146 
1147 	/* enable CEU0 */
1148 	gpio_request(GPIO_FN_VIO0_D15, NULL);
1149 	gpio_request(GPIO_FN_VIO0_D14, NULL);
1150 	gpio_request(GPIO_FN_VIO0_D13, NULL);
1151 	gpio_request(GPIO_FN_VIO0_D12, NULL);
1152 	gpio_request(GPIO_FN_VIO0_D11, NULL);
1153 	gpio_request(GPIO_FN_VIO0_D10, NULL);
1154 	gpio_request(GPIO_FN_VIO0_D9,  NULL);
1155 	gpio_request(GPIO_FN_VIO0_D8,  NULL);
1156 	gpio_request(GPIO_FN_VIO0_D7,  NULL);
1157 	gpio_request(GPIO_FN_VIO0_D6,  NULL);
1158 	gpio_request(GPIO_FN_VIO0_D5,  NULL);
1159 	gpio_request(GPIO_FN_VIO0_D4,  NULL);
1160 	gpio_request(GPIO_FN_VIO0_D3,  NULL);
1161 	gpio_request(GPIO_FN_VIO0_D2,  NULL);
1162 	gpio_request(GPIO_FN_VIO0_D1,  NULL);
1163 	gpio_request(GPIO_FN_VIO0_D0,  NULL);
1164 	gpio_request(GPIO_FN_VIO0_VD,  NULL);
1165 	gpio_request(GPIO_FN_VIO0_CLK, NULL);
1166 	gpio_request(GPIO_FN_VIO0_FLD, NULL);
1167 	gpio_request(GPIO_FN_VIO0_HD,  NULL);
1168 	platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1169 
1170 	/* enable CEU1 */
1171 	gpio_request(GPIO_FN_VIO1_D7,  NULL);
1172 	gpio_request(GPIO_FN_VIO1_D6,  NULL);
1173 	gpio_request(GPIO_FN_VIO1_D5,  NULL);
1174 	gpio_request(GPIO_FN_VIO1_D4,  NULL);
1175 	gpio_request(GPIO_FN_VIO1_D3,  NULL);
1176 	gpio_request(GPIO_FN_VIO1_D2,  NULL);
1177 	gpio_request(GPIO_FN_VIO1_D1,  NULL);
1178 	gpio_request(GPIO_FN_VIO1_D0,  NULL);
1179 	gpio_request(GPIO_FN_VIO1_FLD, NULL);
1180 	gpio_request(GPIO_FN_VIO1_HD,  NULL);
1181 	gpio_request(GPIO_FN_VIO1_VD,  NULL);
1182 	gpio_request(GPIO_FN_VIO1_CLK, NULL);
1183 	platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1184 
1185 	/* enable KEYSC */
1186 	gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1187 	gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1188 	gpio_request(GPIO_FN_KEYOUT3,     NULL);
1189 	gpio_request(GPIO_FN_KEYOUT2,     NULL);
1190 	gpio_request(GPIO_FN_KEYOUT1,     NULL);
1191 	gpio_request(GPIO_FN_KEYOUT0,     NULL);
1192 	gpio_request(GPIO_FN_KEYIN0,      NULL);
1193 
1194 	/* enable user debug switch */
1195 	gpio_request(GPIO_PTR0, NULL);
1196 	gpio_request(GPIO_PTR4, NULL);
1197 	gpio_request(GPIO_PTR5, NULL);
1198 	gpio_request(GPIO_PTR6, NULL);
1199 	gpio_direction_input(GPIO_PTR0);
1200 	gpio_direction_input(GPIO_PTR4);
1201 	gpio_direction_input(GPIO_PTR5);
1202 	gpio_direction_input(GPIO_PTR6);
1203 
1204 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1205 	/* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1206 	gpio_request(GPIO_FN_SDHI0CD,  NULL);
1207 	gpio_request(GPIO_FN_SDHI0WP,  NULL);
1208 	gpio_request(GPIO_FN_SDHI0CMD, NULL);
1209 	gpio_request(GPIO_FN_SDHI0CLK, NULL);
1210 	gpio_request(GPIO_FN_SDHI0D3,  NULL);
1211 	gpio_request(GPIO_FN_SDHI0D2,  NULL);
1212 	gpio_request(GPIO_FN_SDHI0D1,  NULL);
1213 	gpio_request(GPIO_FN_SDHI0D0,  NULL);
1214 	gpio_request(GPIO_PTB6, NULL);
1215 	gpio_direction_output(GPIO_PTB6, 0);
1216 
1217 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1218 	/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1219 	gpio_request(GPIO_FN_SDHI1CD,  NULL);
1220 	gpio_request(GPIO_FN_SDHI1WP,  NULL);
1221 	gpio_request(GPIO_FN_SDHI1CMD, NULL);
1222 	gpio_request(GPIO_FN_SDHI1CLK, NULL);
1223 	gpio_request(GPIO_FN_SDHI1D3,  NULL);
1224 	gpio_request(GPIO_FN_SDHI1D2,  NULL);
1225 	gpio_request(GPIO_FN_SDHI1D1,  NULL);
1226 	gpio_request(GPIO_FN_SDHI1D0,  NULL);
1227 	gpio_request(GPIO_PTB7, NULL);
1228 	gpio_direction_output(GPIO_PTB7, 0);
1229 
1230 	/* I/O buffer drive ability is high for SDHI1 */
1231 	__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1232 #endif /* CONFIG_MMC_SH_MMCIF */
1233 #else
1234 	/* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1235 	gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1236 	gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1237 	gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1238 	gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1239 	gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1240 	gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1241 	gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1242 	gpio_request(GPIO_PTY6, NULL); /* write protect */
1243 	gpio_direction_input(GPIO_PTY6);
1244 	gpio_request(GPIO_PTY7, NULL); /* card detect */
1245 	gpio_direction_input(GPIO_PTY7);
1246 
1247 	spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1248 #endif
1249 
1250 	/* enable Video */
1251 	gpio_request(GPIO_PTU2, NULL);
1252 	gpio_direction_output(GPIO_PTU2, 1);
1253 
1254 	/* enable Camera */
1255 	gpio_request(GPIO_PTA3, NULL);
1256 	gpio_request(GPIO_PTA4, NULL);
1257 	gpio_direction_output(GPIO_PTA3, 0);
1258 	gpio_direction_output(GPIO_PTA4, 0);
1259 
1260 	/* enable FSI */
1261 	gpio_request(GPIO_FN_FSIMCKB,    NULL);
1262 	gpio_request(GPIO_FN_FSIIBSD,    NULL);
1263 	gpio_request(GPIO_FN_FSIOBSD,    NULL);
1264 	gpio_request(GPIO_FN_FSIIBBCK,   NULL);
1265 	gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
1266 	gpio_request(GPIO_FN_FSIOBBCK,   NULL);
1267 	gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
1268 	gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1269 
1270 	/* set SPU2 clock to 83.4 MHz */
1271 	clk = clk_get(NULL, "spu_clk");
1272 	if (!IS_ERR(clk)) {
1273 		clk_set_rate(clk, clk_round_rate(clk, 83333333));
1274 		clk_put(clk);
1275 	}
1276 
1277 	/* change parent of FSI B */
1278 	clk = clk_get(NULL, "fsib_clk");
1279 	if (!IS_ERR(clk)) {
1280 		/* 48kHz dummy clock was used to make sure 1/1 divide */
1281 		clk_set_rate(&sh7724_fsimckb_clk, 48000);
1282 		clk_set_parent(clk, &sh7724_fsimckb_clk);
1283 		clk_set_rate(clk, 48000);
1284 		clk_put(clk);
1285 	}
1286 
1287 	gpio_request(GPIO_PTU0, NULL);
1288 	gpio_direction_output(GPIO_PTU0, 0);
1289 	mdelay(20);
1290 
1291 	/* enable motion sensor */
1292 	gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1293 	gpio_direction_input(GPIO_FN_INTC_IRQ1);
1294 
1295 	/* set VPU clock to 166 MHz */
1296 	clk = clk_get(NULL, "vpu_clk");
1297 	if (!IS_ERR(clk)) {
1298 		clk_set_rate(clk, clk_round_rate(clk, 166000000));
1299 		clk_put(clk);
1300 	}
1301 
1302 	/* enable IrDA */
1303 	gpio_request(GPIO_FN_IRDA_OUT, NULL);
1304 	gpio_request(GPIO_FN_IRDA_IN,  NULL);
1305 	gpio_request(GPIO_PTU5, NULL);
1306 	gpio_direction_output(GPIO_PTU5, 0);
1307 
1308 #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
1309 	/* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1310 	gpio_request(GPIO_FN_MMC_D7, NULL);
1311 	gpio_request(GPIO_FN_MMC_D6, NULL);
1312 	gpio_request(GPIO_FN_MMC_D5, NULL);
1313 	gpio_request(GPIO_FN_MMC_D4, NULL);
1314 	gpio_request(GPIO_FN_MMC_D3, NULL);
1315 	gpio_request(GPIO_FN_MMC_D2, NULL);
1316 	gpio_request(GPIO_FN_MMC_D1, NULL);
1317 	gpio_request(GPIO_FN_MMC_D0, NULL);
1318 	gpio_request(GPIO_FN_MMC_CLK, NULL);
1319 	gpio_request(GPIO_FN_MMC_CMD, NULL);
1320 	gpio_request(GPIO_PTB7, NULL);
1321 	gpio_direction_output(GPIO_PTB7, 0);
1322 
1323 	/* I/O buffer drive ability is high for MMCIF */
1324 	__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1325 #endif
1326 
1327 	/* enable I2C device */
1328 	i2c_register_board_info(0, i2c0_devices,
1329 				ARRAY_SIZE(i2c0_devices));
1330 
1331 	i2c_register_board_info(1, i2c1_devices,
1332 				ARRAY_SIZE(i2c1_devices));
1333 
1334 #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
1335 	/* VOU */
1336 	gpio_request(GPIO_FN_DV_D15, NULL);
1337 	gpio_request(GPIO_FN_DV_D14, NULL);
1338 	gpio_request(GPIO_FN_DV_D13, NULL);
1339 	gpio_request(GPIO_FN_DV_D12, NULL);
1340 	gpio_request(GPIO_FN_DV_D11, NULL);
1341 	gpio_request(GPIO_FN_DV_D10, NULL);
1342 	gpio_request(GPIO_FN_DV_D9, NULL);
1343 	gpio_request(GPIO_FN_DV_D8, NULL);
1344 	gpio_request(GPIO_FN_DV_CLKI, NULL);
1345 	gpio_request(GPIO_FN_DV_CLK, NULL);
1346 	gpio_request(GPIO_FN_DV_VSYNC, NULL);
1347 	gpio_request(GPIO_FN_DV_HSYNC, NULL);
1348 
1349 	/* AK8813 power / reset sequence */
1350 	gpio_request(GPIO_PTG4, NULL);
1351 	gpio_request(GPIO_PTU3, NULL);
1352 	/* Reset */
1353 	gpio_direction_output(GPIO_PTG4, 0);
1354 	/* Power down */
1355 	gpio_direction_output(GPIO_PTU3, 1);
1356 
1357 	udelay(10);
1358 
1359 	/* Power up, reset */
1360 	gpio_set_value(GPIO_PTU3, 0);
1361 
1362 	udelay(10);
1363 
1364 	/* Remove reset */
1365 	gpio_set_value(GPIO_PTG4, 1);
1366 #endif
1367 
1368 	return platform_add_devices(ecovec_devices,
1369 				    ARRAY_SIZE(ecovec_devices));
1370 }
1371 arch_initcall(arch_setup);
1372 
1373 static int __init devices_setup(void)
1374 {
1375 	sh_eth_init(&sh_eth_plat);
1376 	return 0;
1377 }
1378 device_initcall(devices_setup);
1379 
1380 static struct sh_machine_vector mv_ecovec __initmv = {
1381 	.mv_name	= "R0P7724 (EcoVec)",
1382 };
1383