1 /* 2 * Renesas - AP-325RXA 3 * (Compatible with Algo System ., LTD. - AP-320A) 4 * 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * Author : Yusuke Goda <goda.yuske@renesas.com> 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #include <linux/init.h> 14 #include <linux/device.h> 15 #include <linux/interrupt.h> 16 #include <linux/platform_device.h> 17 #include <linux/mmc/host.h> 18 #include <linux/mmc/sh_mobile_sdhi.h> 19 #include <linux/mtd/physmap.h> 20 #include <linux/mtd/sh_flctl.h> 21 #include <linux/delay.h> 22 #include <linux/i2c.h> 23 #include <linux/regulator/fixed.h> 24 #include <linux/regulator/machine.h> 25 #include <linux/smsc911x.h> 26 #include <linux/gpio.h> 27 #include <linux/videodev2.h> 28 #include <linux/sh_intc.h> 29 #include <media/ov772x.h> 30 #include <media/soc_camera.h> 31 #include <media/soc_camera_platform.h> 32 #include <media/sh_mobile_ceu.h> 33 #include <video/sh_mobile_lcdc.h> 34 #include <asm/io.h> 35 #include <asm/clock.h> 36 #include <asm/suspend.h> 37 #include <cpu/sh7723.h> 38 39 /* Dummy supplies, where voltage doesn't matter */ 40 static struct regulator_consumer_supply dummy_supplies[] = { 41 REGULATOR_SUPPLY("vddvario", "smsc911x"), 42 REGULATOR_SUPPLY("vdd33a", "smsc911x"), 43 }; 44 45 static struct smsc911x_platform_config smsc911x_config = { 46 .phy_interface = PHY_INTERFACE_MODE_MII, 47 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 48 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 49 .flags = SMSC911X_USE_32BIT, 50 }; 51 52 static struct resource smsc9118_resources[] = { 53 [0] = { 54 .start = 0xb6080000, 55 .end = 0xb60fffff, 56 .flags = IORESOURCE_MEM, 57 }, 58 [1] = { 59 .start = evt2irq(0x660), 60 .end = evt2irq(0x660), 61 .flags = IORESOURCE_IRQ, 62 } 63 }; 64 65 static struct platform_device smsc9118_device = { 66 .name = "smsc911x", 67 .id = -1, 68 .num_resources = ARRAY_SIZE(smsc9118_resources), 69 .resource = smsc9118_resources, 70 .dev = { 71 .platform_data = &smsc911x_config, 72 }, 73 }; 74 75 /* 76 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF). 77 * If this area erased, this board can not boot. 78 */ 79 static struct mtd_partition ap325rxa_nor_flash_partitions[] = { 80 { 81 .name = "uboot", 82 .offset = 0, 83 .size = (1 * 1024 * 1024), 84 .mask_flags = MTD_WRITEABLE, /* Read-only */ 85 }, { 86 .name = "kernel", 87 .offset = MTDPART_OFS_APPEND, 88 .size = (2 * 1024 * 1024), 89 }, { 90 .name = "free-area0", 91 .offset = MTDPART_OFS_APPEND, 92 .size = ((7 * 1024 * 1024) + (512 * 1024)), 93 }, { 94 .name = "CPLD-Data", 95 .offset = MTDPART_OFS_APPEND, 96 .mask_flags = MTD_WRITEABLE, /* Read-only */ 97 .size = (1024 * 128 * 2), 98 }, { 99 .name = "free-area1", 100 .offset = MTDPART_OFS_APPEND, 101 .size = MTDPART_SIZ_FULL, 102 }, 103 }; 104 105 static struct physmap_flash_data ap325rxa_nor_flash_data = { 106 .width = 2, 107 .parts = ap325rxa_nor_flash_partitions, 108 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions), 109 }; 110 111 static struct resource ap325rxa_nor_flash_resources[] = { 112 [0] = { 113 .name = "NOR Flash", 114 .start = 0x00000000, 115 .end = 0x00ffffff, 116 .flags = IORESOURCE_MEM, 117 } 118 }; 119 120 static struct platform_device ap325rxa_nor_flash_device = { 121 .name = "physmap-flash", 122 .resource = ap325rxa_nor_flash_resources, 123 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources), 124 .dev = { 125 .platform_data = &ap325rxa_nor_flash_data, 126 }, 127 }; 128 129 static struct mtd_partition nand_partition_info[] = { 130 { 131 .name = "nand_data", 132 .offset = 0, 133 .size = MTDPART_SIZ_FULL, 134 }, 135 }; 136 137 static struct resource nand_flash_resources[] = { 138 [0] = { 139 .start = 0xa4530000, 140 .end = 0xa45300ff, 141 .flags = IORESOURCE_MEM, 142 } 143 }; 144 145 static struct sh_flctl_platform_data nand_flash_data = { 146 .parts = nand_partition_info, 147 .nr_parts = ARRAY_SIZE(nand_partition_info), 148 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E, 149 .has_hwecc = 1, 150 }; 151 152 static struct platform_device nand_flash_device = { 153 .name = "sh_flctl", 154 .resource = nand_flash_resources, 155 .num_resources = ARRAY_SIZE(nand_flash_resources), 156 .dev = { 157 .platform_data = &nand_flash_data, 158 }, 159 }; 160 161 #define FPGA_LCDREG 0xB4100180 162 #define FPGA_BKLREG 0xB4100212 163 #define FPGA_LCDREG_VAL 0x0018 164 #define PORT_MSELCRB 0xA4050182 165 #define PORT_HIZCRC 0xA405015C 166 #define PORT_DRVCRA 0xA405018A 167 #define PORT_DRVCRB 0xA405018C 168 169 static int ap320_wvga_set_brightness(int brightness) 170 { 171 if (brightness) { 172 gpio_set_value(GPIO_PTS3, 0); 173 __raw_writew(0x100, FPGA_BKLREG); 174 } else { 175 __raw_writew(0, FPGA_BKLREG); 176 gpio_set_value(GPIO_PTS3, 1); 177 } 178 179 return 0; 180 } 181 182 static int ap320_wvga_get_brightness(void) 183 { 184 return gpio_get_value(GPIO_PTS3); 185 } 186 187 static void ap320_wvga_power_on(void) 188 { 189 msleep(100); 190 191 /* ASD AP-320/325 LCD ON */ 192 __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG); 193 } 194 195 static void ap320_wvga_power_off(void) 196 { 197 /* ASD AP-320/325 LCD OFF */ 198 __raw_writew(0, FPGA_LCDREG); 199 } 200 201 static const struct fb_videomode ap325rxa_lcdc_modes[] = { 202 { 203 .name = "LB070WV1", 204 .xres = 800, 205 .yres = 480, 206 .left_margin = 32, 207 .right_margin = 160, 208 .hsync_len = 8, 209 .upper_margin = 63, 210 .lower_margin = 80, 211 .vsync_len = 1, 212 .sync = 0, /* hsync and vsync are active low */ 213 }, 214 }; 215 216 static struct sh_mobile_lcdc_info lcdc_info = { 217 .clock_source = LCDC_CLK_EXTERNAL, 218 .ch[0] = { 219 .chan = LCDC_CHAN_MAINLCD, 220 .fourcc = V4L2_PIX_FMT_RGB565, 221 .interface_type = RGB18, 222 .clock_divider = 1, 223 .lcd_modes = ap325rxa_lcdc_modes, 224 .num_modes = ARRAY_SIZE(ap325rxa_lcdc_modes), 225 .panel_cfg = { 226 .width = 152, /* 7.0 inch */ 227 .height = 91, 228 .display_on = ap320_wvga_power_on, 229 .display_off = ap320_wvga_power_off, 230 }, 231 .bl_info = { 232 .name = "sh_mobile_lcdc_bl", 233 .max_brightness = 1, 234 .set_brightness = ap320_wvga_set_brightness, 235 .get_brightness = ap320_wvga_get_brightness, 236 }, 237 } 238 }; 239 240 static struct resource lcdc_resources[] = { 241 [0] = { 242 .name = "LCDC", 243 .start = 0xfe940000, /* P4-only space */ 244 .end = 0xfe942fff, 245 .flags = IORESOURCE_MEM, 246 }, 247 [1] = { 248 .start = evt2irq(0x580), 249 .flags = IORESOURCE_IRQ, 250 }, 251 }; 252 253 static struct platform_device lcdc_device = { 254 .name = "sh_mobile_lcdc_fb", 255 .num_resources = ARRAY_SIZE(lcdc_resources), 256 .resource = lcdc_resources, 257 .dev = { 258 .platform_data = &lcdc_info, 259 }, 260 }; 261 262 static void camera_power(int val) 263 { 264 gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */ 265 mdelay(10); 266 } 267 268 #ifdef CONFIG_I2C 269 /* support for the old ncm03j camera */ 270 static unsigned char camera_ncm03j_magic[] = 271 { 272 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8, 273 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36, 274 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F, 275 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55, 276 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12, 277 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0, 278 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F, 279 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A, 280 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A, 281 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A, 282 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56, 283 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37, 284 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A, 285 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56, 286 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC, 287 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F, 288 }; 289 290 static int camera_probe(void) 291 { 292 struct i2c_adapter *a = i2c_get_adapter(0); 293 struct i2c_msg msg; 294 int ret; 295 296 if (!a) 297 return -ENODEV; 298 299 camera_power(1); 300 msg.addr = 0x6e; 301 msg.buf = camera_ncm03j_magic; 302 msg.len = 2; 303 msg.flags = 0; 304 ret = i2c_transfer(a, &msg, 1); 305 camera_power(0); 306 307 return ret; 308 } 309 310 static int camera_set_capture(struct soc_camera_platform_info *info, 311 int enable) 312 { 313 struct i2c_adapter *a = i2c_get_adapter(0); 314 struct i2c_msg msg; 315 int ret = 0; 316 int i; 317 318 camera_power(0); 319 if (!enable) 320 return 0; /* no disable for now */ 321 322 camera_power(1); 323 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) { 324 u_int8_t buf[8]; 325 326 msg.addr = 0x6e; 327 msg.buf = buf; 328 msg.len = 2; 329 msg.flags = 0; 330 331 buf[0] = camera_ncm03j_magic[i]; 332 buf[1] = camera_ncm03j_magic[i + 1]; 333 334 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); 335 } 336 337 return ret; 338 } 339 340 static int ap325rxa_camera_add(struct soc_camera_device *icd); 341 static void ap325rxa_camera_del(struct soc_camera_device *icd); 342 343 static struct soc_camera_platform_info camera_info = { 344 .format_name = "UYVY", 345 .format_depth = 16, 346 .format = { 347 .code = V4L2_MBUS_FMT_UYVY8_2X8, 348 .colorspace = V4L2_COLORSPACE_SMPTE170M, 349 .field = V4L2_FIELD_NONE, 350 .width = 640, 351 .height = 480, 352 }, 353 .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | 354 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH | 355 V4L2_MBUS_DATA_ACTIVE_HIGH, 356 .mbus_type = V4L2_MBUS_PARALLEL, 357 .set_capture = camera_set_capture, 358 }; 359 360 static struct soc_camera_link camera_link = { 361 .bus_id = 0, 362 .add_device = ap325rxa_camera_add, 363 .del_device = ap325rxa_camera_del, 364 .module_name = "soc_camera_platform", 365 .priv = &camera_info, 366 }; 367 368 static struct platform_device *camera_device; 369 370 static void ap325rxa_camera_release(struct device *dev) 371 { 372 soc_camera_platform_release(&camera_device); 373 } 374 375 static int ap325rxa_camera_add(struct soc_camera_device *icd) 376 { 377 int ret = soc_camera_platform_add(icd, &camera_device, &camera_link, 378 ap325rxa_camera_release, 0); 379 if (ret < 0) 380 return ret; 381 382 ret = camera_probe(); 383 if (ret < 0) 384 soc_camera_platform_del(icd, camera_device, &camera_link); 385 386 return ret; 387 } 388 389 static void ap325rxa_camera_del(struct soc_camera_device *icd) 390 { 391 soc_camera_platform_del(icd, camera_device, &camera_link); 392 } 393 #endif /* CONFIG_I2C */ 394 395 static int ov7725_power(struct device *dev, int mode) 396 { 397 camera_power(0); 398 if (mode) 399 camera_power(1); 400 401 return 0; 402 } 403 404 static struct sh_mobile_ceu_info sh_mobile_ceu_info = { 405 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 406 }; 407 408 static struct resource ceu_resources[] = { 409 [0] = { 410 .name = "CEU", 411 .start = 0xfe910000, 412 .end = 0xfe91009f, 413 .flags = IORESOURCE_MEM, 414 }, 415 [1] = { 416 .start = evt2irq(0x880), 417 .flags = IORESOURCE_IRQ, 418 }, 419 [2] = { 420 /* place holder for contiguous memory */ 421 }, 422 }; 423 424 static struct platform_device ceu_device = { 425 .name = "sh_mobile_ceu", 426 .id = 0, /* "ceu0" clock */ 427 .num_resources = ARRAY_SIZE(ceu_resources), 428 .resource = ceu_resources, 429 .dev = { 430 .platform_data = &sh_mobile_ceu_info, 431 }, 432 }; 433 434 /* Fixed 3.3V regulators to be used by SDHI0, SDHI1 */ 435 static struct regulator_consumer_supply fixed3v3_power_consumers[] = 436 { 437 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), 438 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), 439 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), 440 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), 441 }; 442 443 static struct resource sdhi0_cn3_resources[] = { 444 [0] = { 445 .name = "SDHI0", 446 .start = 0x04ce0000, 447 .end = 0x04ce00ff, 448 .flags = IORESOURCE_MEM, 449 }, 450 [1] = { 451 .start = evt2irq(0xe80), 452 .flags = IORESOURCE_IRQ, 453 }, 454 }; 455 456 static struct sh_mobile_sdhi_info sdhi0_cn3_data = { 457 .tmio_caps = MMC_CAP_SDIO_IRQ, 458 }; 459 460 static struct platform_device sdhi0_cn3_device = { 461 .name = "sh_mobile_sdhi", 462 .id = 0, /* "sdhi0" clock */ 463 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources), 464 .resource = sdhi0_cn3_resources, 465 .dev = { 466 .platform_data = &sdhi0_cn3_data, 467 }, 468 }; 469 470 static struct resource sdhi1_cn7_resources[] = { 471 [0] = { 472 .name = "SDHI1", 473 .start = 0x04cf0000, 474 .end = 0x04cf00ff, 475 .flags = IORESOURCE_MEM, 476 }, 477 [1] = { 478 .start = evt2irq(0x4e0), 479 .flags = IORESOURCE_IRQ, 480 }, 481 }; 482 483 static struct sh_mobile_sdhi_info sdhi1_cn7_data = { 484 .tmio_caps = MMC_CAP_SDIO_IRQ, 485 }; 486 487 static struct platform_device sdhi1_cn7_device = { 488 .name = "sh_mobile_sdhi", 489 .id = 1, /* "sdhi1" clock */ 490 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources), 491 .resource = sdhi1_cn7_resources, 492 .dev = { 493 .platform_data = &sdhi1_cn7_data, 494 }, 495 }; 496 497 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { 498 { 499 I2C_BOARD_INFO("pcf8563", 0x51), 500 }, 501 }; 502 503 static struct i2c_board_info ap325rxa_i2c_camera[] = { 504 { 505 I2C_BOARD_INFO("ov772x", 0x21), 506 }, 507 }; 508 509 static struct ov772x_camera_info ov7725_info = { 510 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, 511 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0), 512 }; 513 514 static struct soc_camera_link ov7725_link = { 515 .bus_id = 0, 516 .power = ov7725_power, 517 .board_info = &ap325rxa_i2c_camera[0], 518 .i2c_adapter_id = 0, 519 .priv = &ov7725_info, 520 }; 521 522 static struct platform_device ap325rxa_camera[] = { 523 { 524 .name = "soc-camera-pdrv", 525 .id = 0, 526 .dev = { 527 .platform_data = &ov7725_link, 528 }, 529 }, { 530 .name = "soc-camera-pdrv", 531 .id = 1, 532 .dev = { 533 .platform_data = &camera_link, 534 }, 535 }, 536 }; 537 538 static struct platform_device *ap325rxa_devices[] __initdata = { 539 &smsc9118_device, 540 &ap325rxa_nor_flash_device, 541 &lcdc_device, 542 &ceu_device, 543 &nand_flash_device, 544 &sdhi0_cn3_device, 545 &sdhi1_cn7_device, 546 &ap325rxa_camera[0], 547 &ap325rxa_camera[1], 548 }; 549 550 extern char ap325rxa_sdram_enter_start; 551 extern char ap325rxa_sdram_enter_end; 552 extern char ap325rxa_sdram_leave_start; 553 extern char ap325rxa_sdram_leave_end; 554 555 static int __init ap325rxa_devices_setup(void) 556 { 557 /* register board specific self-refresh code */ 558 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, 559 &ap325rxa_sdram_enter_start, 560 &ap325rxa_sdram_enter_end, 561 &ap325rxa_sdram_leave_start, 562 &ap325rxa_sdram_leave_end); 563 564 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, 565 ARRAY_SIZE(fixed3v3_power_consumers), 3300000); 566 regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies)); 567 568 /* LD3 and LD4 LEDs */ 569 gpio_request(GPIO_PTX5, NULL); /* RUN */ 570 gpio_direction_output(GPIO_PTX5, 1); 571 gpio_export(GPIO_PTX5, 0); 572 573 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */ 574 gpio_direction_output(GPIO_PTX4, 0); 575 gpio_export(GPIO_PTX4, 0); 576 577 /* SW1 input */ 578 gpio_request(GPIO_PTF7, NULL); /* MODE */ 579 gpio_direction_input(GPIO_PTF7); 580 gpio_export(GPIO_PTF7, 0); 581 582 /* LCDC */ 583 gpio_request(GPIO_FN_LCDD15, NULL); 584 gpio_request(GPIO_FN_LCDD14, NULL); 585 gpio_request(GPIO_FN_LCDD13, NULL); 586 gpio_request(GPIO_FN_LCDD12, NULL); 587 gpio_request(GPIO_FN_LCDD11, NULL); 588 gpio_request(GPIO_FN_LCDD10, NULL); 589 gpio_request(GPIO_FN_LCDD9, NULL); 590 gpio_request(GPIO_FN_LCDD8, NULL); 591 gpio_request(GPIO_FN_LCDD7, NULL); 592 gpio_request(GPIO_FN_LCDD6, NULL); 593 gpio_request(GPIO_FN_LCDD5, NULL); 594 gpio_request(GPIO_FN_LCDD4, NULL); 595 gpio_request(GPIO_FN_LCDD3, NULL); 596 gpio_request(GPIO_FN_LCDD2, NULL); 597 gpio_request(GPIO_FN_LCDD1, NULL); 598 gpio_request(GPIO_FN_LCDD0, NULL); 599 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL); 600 gpio_request(GPIO_FN_LCDDCK, NULL); 601 gpio_request(GPIO_FN_LCDVEPWC, NULL); 602 gpio_request(GPIO_FN_LCDVCPWC, NULL); 603 gpio_request(GPIO_FN_LCDVSYN, NULL); 604 gpio_request(GPIO_FN_LCDHSYN, NULL); 605 gpio_request(GPIO_FN_LCDDISP, NULL); 606 gpio_request(GPIO_FN_LCDDON, NULL); 607 608 /* LCD backlight */ 609 gpio_request(GPIO_PTS3, NULL); 610 gpio_direction_output(GPIO_PTS3, 1); 611 612 /* CEU */ 613 gpio_request(GPIO_FN_VIO_CLK2, NULL); 614 gpio_request(GPIO_FN_VIO_VD2, NULL); 615 gpio_request(GPIO_FN_VIO_HD2, NULL); 616 gpio_request(GPIO_FN_VIO_FLD, NULL); 617 gpio_request(GPIO_FN_VIO_CKO, NULL); 618 gpio_request(GPIO_FN_VIO_D15, NULL); 619 gpio_request(GPIO_FN_VIO_D14, NULL); 620 gpio_request(GPIO_FN_VIO_D13, NULL); 621 gpio_request(GPIO_FN_VIO_D12, NULL); 622 gpio_request(GPIO_FN_VIO_D11, NULL); 623 gpio_request(GPIO_FN_VIO_D10, NULL); 624 gpio_request(GPIO_FN_VIO_D9, NULL); 625 gpio_request(GPIO_FN_VIO_D8, NULL); 626 627 gpio_request(GPIO_PTZ7, NULL); 628 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */ 629 gpio_request(GPIO_PTZ6, NULL); 630 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */ 631 gpio_request(GPIO_PTZ5, NULL); 632 gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */ 633 gpio_request(GPIO_PTZ4, NULL); 634 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */ 635 636 __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); 637 638 /* FLCTL */ 639 gpio_request(GPIO_FN_FCE, NULL); 640 gpio_request(GPIO_FN_NAF7, NULL); 641 gpio_request(GPIO_FN_NAF6, NULL); 642 gpio_request(GPIO_FN_NAF5, NULL); 643 gpio_request(GPIO_FN_NAF4, NULL); 644 gpio_request(GPIO_FN_NAF3, NULL); 645 gpio_request(GPIO_FN_NAF2, NULL); 646 gpio_request(GPIO_FN_NAF1, NULL); 647 gpio_request(GPIO_FN_NAF0, NULL); 648 gpio_request(GPIO_FN_FCDE, NULL); 649 gpio_request(GPIO_FN_FOE, NULL); 650 gpio_request(GPIO_FN_FSC, NULL); 651 gpio_request(GPIO_FN_FWE, NULL); 652 gpio_request(GPIO_FN_FRB, NULL); 653 654 __raw_writew(0, PORT_HIZCRC); 655 __raw_writew(0xFFFF, PORT_DRVCRA); 656 __raw_writew(0xFFFF, PORT_DRVCRB); 657 658 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 659 660 /* SDHI0 - CN3 - SD CARD */ 661 gpio_request(GPIO_FN_SDHI0CD_PTD, NULL); 662 gpio_request(GPIO_FN_SDHI0WP_PTD, NULL); 663 gpio_request(GPIO_FN_SDHI0D3_PTD, NULL); 664 gpio_request(GPIO_FN_SDHI0D2_PTD, NULL); 665 gpio_request(GPIO_FN_SDHI0D1_PTD, NULL); 666 gpio_request(GPIO_FN_SDHI0D0_PTD, NULL); 667 gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL); 668 gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL); 669 670 /* SDHI1 - CN7 - MICRO SD CARD */ 671 gpio_request(GPIO_FN_SDHI1CD, NULL); 672 gpio_request(GPIO_FN_SDHI1D3, NULL); 673 gpio_request(GPIO_FN_SDHI1D2, NULL); 674 gpio_request(GPIO_FN_SDHI1D1, NULL); 675 gpio_request(GPIO_FN_SDHI1D0, NULL); 676 gpio_request(GPIO_FN_SDHI1CMD, NULL); 677 gpio_request(GPIO_FN_SDHI1CLK, NULL); 678 679 i2c_register_board_info(0, ap325rxa_i2c_devices, 680 ARRAY_SIZE(ap325rxa_i2c_devices)); 681 682 return platform_add_devices(ap325rxa_devices, 683 ARRAY_SIZE(ap325rxa_devices)); 684 } 685 arch_initcall(ap325rxa_devices_setup); 686 687 /* Return the board specific boot mode pin configuration */ 688 static int ap325rxa_mode_pins(void) 689 { 690 /* MD0=0, MD1=0, MD2=0: Clock Mode 0 691 * MD3=0: 16-bit Area0 Bus Width 692 * MD5=1: Little Endian 693 * TSTMD=1, MD8=1: Test Mode Disabled 694 */ 695 return MODE_PIN5 | MODE_PIN8; 696 } 697 698 static struct sh_machine_vector mv_ap325rxa __initmv = { 699 .mv_name = "AP-325RXA", 700 .mv_mode_pins = ap325rxa_mode_pins, 701 }; 702