1 /* 2 * ALPHAPROJECT AP-SH4AD-0A Support. 3 * 4 * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd. 5 * Copyright (C) 2010 Matt Fleming 6 * Copyright (C) 2010 Paul Mundt 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 #include <linux/init.h> 13 #include <linux/platform_device.h> 14 #include <linux/io.h> 15 #include <linux/smsc911x.h> 16 #include <linux/irq.h> 17 #include <linux/clk.h> 18 #include <asm/machvec.h> 19 #include <asm/sizes.h> 20 21 static struct resource smsc911x_resources[] = { 22 [0] = { 23 .name = "smsc911x-memory", 24 .start = 0xA4000000, 25 .end = 0xA4000000 + SZ_256 - 1, 26 .flags = IORESOURCE_MEM, 27 }, 28 [1] = { 29 .name = "smsc911x-irq", 30 .start = evt2irq(0x200), 31 .end = evt2irq(0x200), 32 .flags = IORESOURCE_IRQ, 33 }, 34 }; 35 36 static struct smsc911x_platform_config smsc911x_config = { 37 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 38 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 39 .flags = SMSC911X_USE_16BIT, 40 .phy_interface = PHY_INTERFACE_MODE_MII, 41 }; 42 43 static struct platform_device smsc911x_device = { 44 .name = "smsc911x", 45 .id = -1, 46 .num_resources = ARRAY_SIZE(smsc911x_resources), 47 .resource = smsc911x_resources, 48 .dev = { 49 .platform_data = &smsc911x_config, 50 }, 51 }; 52 53 static struct platform_device *apsh4ad0a_devices[] __initdata = { 54 &smsc911x_device, 55 }; 56 57 static int __init apsh4ad0a_devices_setup(void) 58 { 59 return platform_add_devices(apsh4ad0a_devices, 60 ARRAY_SIZE(apsh4ad0a_devices)); 61 } 62 device_initcall(apsh4ad0a_devices_setup); 63 64 static int apsh4ad0a_mode_pins(void) 65 { 66 int value = 0; 67 68 /* These are the factory default settings of SW1 and SW2. 69 * If you change these dip switches then you will need to 70 * adjust the values below as well. 71 */ 72 value |= MODE_PIN0; /* Clock Mode 3 */ 73 value |= MODE_PIN1; 74 value &= ~MODE_PIN2; 75 value &= ~MODE_PIN3; 76 value &= ~MODE_PIN4; /* 16-bit Area0 bus width */ 77 value |= MODE_PIN5; 78 value |= MODE_PIN6; 79 value |= MODE_PIN7; /* Normal mode */ 80 value |= MODE_PIN8; /* Little Endian */ 81 value |= MODE_PIN9; /* Crystal resonator */ 82 value &= ~MODE_PIN10; /* 29-bit address mode */ 83 value &= ~MODE_PIN11; /* PCI-E Root port */ 84 value &= ~MODE_PIN12; /* 4 lane + 1 lane */ 85 value |= MODE_PIN13; /* AUD Enable */ 86 value &= ~MODE_PIN14; /* Normal Operation */ 87 88 return value; 89 } 90 91 static int apsh4ad0a_clk_init(void) 92 { 93 struct clk *clk; 94 int ret; 95 96 clk = clk_get(NULL, "extal"); 97 if (IS_ERR(clk)) 98 return PTR_ERR(clk); 99 ret = clk_set_rate(clk, 33333000); 100 clk_put(clk); 101 102 return ret; 103 } 104 105 /* Initialize the board */ 106 static void __init apsh4ad0a_setup(char **cmdline_p) 107 { 108 pr_info("Alpha Project AP-SH4AD-0A support:\n"); 109 } 110 111 static void __init apsh4ad0a_init_irq(void) 112 { 113 plat_irq_setup_pins(IRQ_MODE_IRQ3210); 114 } 115 116 /* 117 * The Machine Vector 118 */ 119 static struct sh_machine_vector mv_apsh4ad0a __initmv = { 120 .mv_name = "AP-SH4AD-0A", 121 .mv_setup = apsh4ad0a_setup, 122 .mv_mode_pins = apsh4ad0a_mode_pins, 123 .mv_clk_init = apsh4ad0a_clk_init, 124 .mv_init_irq = apsh4ad0a_init_irq, 125 }; 126