xref: /openbmc/linux/arch/sh/boards/board-apsh4a3a.c (revision e3b9f1e8)
1 /*
2  * ALPHAPROJECT AP-SH4A-3A Support.
3  *
4  * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
5  * Copyright (C) 2008  Yoshihiro Shimoda
6  * Copyright (C) 2009  Paul Mundt
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/io.h>
15 #include <linux/mtd/physmap.h>
16 #include <linux/regulator/fixed.h>
17 #include <linux/regulator/machine.h>
18 #include <linux/smsc911x.h>
19 #include <linux/irq.h>
20 #include <linux/clk.h>
21 #include <asm/machvec.h>
22 #include <asm/sizes.h>
23 #include <asm/clock.h>
24 
25 static struct mtd_partition nor_flash_partitions[] = {
26 	{
27 		.name		= "loader",
28 		.offset		= 0x00000000,
29 		.size		= 512 * 1024,
30 	},
31 	{
32 		.name		= "bootenv",
33 		.offset		= MTDPART_OFS_APPEND,
34 		.size		= 512 * 1024,
35 	},
36 	{
37 		.name		= "kernel",
38 		.offset		= MTDPART_OFS_APPEND,
39 		.size		= 4 * 1024 * 1024,
40 	},
41 	{
42 		.name		= "data",
43 		.offset		= MTDPART_OFS_APPEND,
44 		.size		= MTDPART_SIZ_FULL,
45 	},
46 };
47 
48 static struct physmap_flash_data nor_flash_data = {
49 	.width		= 4,
50 	.parts		= nor_flash_partitions,
51 	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
52 };
53 
54 static struct resource nor_flash_resources[] = {
55 	[0]	= {
56 		.start	= 0x00000000,
57 		.end	= 0x01000000 - 1,
58 		.flags	= IORESOURCE_MEM,
59 	}
60 };
61 
62 static struct platform_device nor_flash_device = {
63 	.name		= "physmap-flash",
64 	.dev		= {
65 		.platform_data	= &nor_flash_data,
66 	},
67 	.num_resources	= ARRAY_SIZE(nor_flash_resources),
68 	.resource	= nor_flash_resources,
69 };
70 
71 /* Dummy supplies, where voltage doesn't matter */
72 static struct regulator_consumer_supply dummy_supplies[] = {
73 	REGULATOR_SUPPLY("vddvario", "smsc911x"),
74 	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
75 };
76 
77 static struct resource smsc911x_resources[] = {
78 	[0] = {
79 		.name		= "smsc911x-memory",
80 		.start		= 0xA4000000,
81 		.end		= 0xA4000000 + SZ_256 - 1,
82 		.flags		= IORESOURCE_MEM,
83 	},
84 	[1] = {
85 		.name		= "smsc911x-irq",
86 		.start		= evt2irq(0x200),
87 		.end		= evt2irq(0x200),
88 		.flags		= IORESOURCE_IRQ,
89 	},
90 };
91 
92 static struct smsc911x_platform_config smsc911x_config = {
93 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
94 	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
95 	.flags		= SMSC911X_USE_16BIT,
96 	.phy_interface	= PHY_INTERFACE_MODE_MII,
97 };
98 
99 static struct platform_device smsc911x_device = {
100 	.name		= "smsc911x",
101 	.id		= -1,
102 	.num_resources	= ARRAY_SIZE(smsc911x_resources),
103 	.resource	= smsc911x_resources,
104 	.dev = {
105 		.platform_data = &smsc911x_config,
106 	},
107 };
108 
109 static struct platform_device *apsh4a3a_devices[] __initdata = {
110 	&nor_flash_device,
111 	&smsc911x_device,
112 };
113 
114 static int __init apsh4a3a_devices_setup(void)
115 {
116 	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
117 
118 	return platform_add_devices(apsh4a3a_devices,
119 				    ARRAY_SIZE(apsh4a3a_devices));
120 }
121 device_initcall(apsh4a3a_devices_setup);
122 
123 static int apsh4a3a_clk_init(void)
124 {
125 	struct clk *clk;
126 	int ret;
127 
128 	clk = clk_get(NULL, "extal");
129 	if (IS_ERR(clk))
130 		return PTR_ERR(clk);
131 	ret = clk_set_rate(clk, 33333000);
132 	clk_put(clk);
133 
134 	return ret;
135 }
136 
137 /* Initialize the board */
138 static void __init apsh4a3a_setup(char **cmdline_p)
139 {
140 	printk(KERN_INFO "Alpha Project AP-SH4A-3A support:\n");
141 }
142 
143 static void __init apsh4a3a_init_irq(void)
144 {
145 	plat_irq_setup_pins(IRQ_MODE_IRQ7654);
146 }
147 
148 /* Return the board specific boot mode pin configuration */
149 static int apsh4a3a_mode_pins(void)
150 {
151 	int value = 0;
152 
153 	/* These are the factory default settings of SW1 and SW2.
154 	 * If you change these dip switches then you will need to
155 	 * adjust the values below as well.
156 	 */
157 	value &= ~MODE_PIN0;  /* Clock Mode 16 */
158 	value &= ~MODE_PIN1;
159 	value &= ~MODE_PIN2;
160 	value &= ~MODE_PIN3;
161 	value |=  MODE_PIN4;
162 	value &= ~MODE_PIN5;  /* 16-bit Area0 bus width */
163 	value |=  MODE_PIN6;  /* Area 0 SRAM interface */
164 	value |=  MODE_PIN7;
165 	value |=  MODE_PIN8;  /* Little Endian */
166 	value |=  MODE_PIN9;  /* Master Mode */
167 	value |=  MODE_PIN10; /* Crystal resonator */
168 	value |=  MODE_PIN11; /* Display Unit */
169 	value |=  MODE_PIN12;
170 	value &= ~MODE_PIN13; /* 29-bit address mode */
171 	value |=  MODE_PIN14; /* No PLL step-up */
172 
173 	return value;
174 }
175 
176 /*
177  * The Machine Vector
178  */
179 static struct sh_machine_vector mv_apsh4a3a __initmv = {
180 	.mv_name		= "AP-SH4A-3A",
181 	.mv_setup		= apsh4a3a_setup,
182 	.mv_clk_init		= apsh4a3a_clk_init,
183 	.mv_init_irq		= apsh4a3a_init_irq,
184 	.mv_mode_pins		= apsh4a3a_mode_pins,
185 };
186