xref: /openbmc/linux/arch/sh/Kconfig (revision f5ad1c74)
1# SPDX-License-Identifier: GPL-2.0
2config SUPERH
3	def_bool y
4	select ARCH_32BIT_OFF_T
5	select ARCH_HAVE_CUSTOM_GPIO_H
6	select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
7	select ARCH_HAS_BINFMT_FLAT if !MMU
8	select ARCH_HAS_GIGANTIC_PAGE
9	select ARCH_HAS_GCOV_PROFILE_ALL
10	select ARCH_HAS_PTE_SPECIAL
11	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
12	select ARCH_HIBERNATION_POSSIBLE if MMU
13	select ARCH_MIGHT_HAVE_PC_PARPORT
14	select ARCH_WANT_IPC_PARSE_VERSION
15	select CLKDEV_LOOKUP
16	select CPU_NO_EFFICIENT_FFS
17	select DMA_DECLARE_COHERENT
18	select GENERIC_ATOMIC64
19	select GENERIC_CLOCKEVENTS
20	select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
21	select GENERIC_IDLE_POLL_SETUP
22	select GENERIC_IRQ_SHOW
23	select GENERIC_PCI_IOMAP if PCI
24	select GENERIC_SCHED_CLOCK
25	select GENERIC_STRNCPY_FROM_USER
26	select GENERIC_STRNLEN_USER
27	select GENERIC_SMP_IDLE_THREAD
28	select GUP_GET_PTE_LOW_HIGH if X2TLB
29	select HAVE_ARCH_AUDITSYSCALL
30	select HAVE_ARCH_KGDB
31	select HAVE_ARCH_SECCOMP_FILTER
32	select HAVE_ARCH_TRACEHOOK
33	select HAVE_COPY_THREAD_TLS
34	select HAVE_DEBUG_BUGVERBOSE
35	select HAVE_DEBUG_KMEMLEAK
36	select HAVE_DYNAMIC_FTRACE
37	select HAVE_FAST_GUP if MMU
38	select HAVE_FUNCTION_GRAPH_TRACER
39	select HAVE_FUNCTION_TRACER
40	select HAVE_FUTEX_CMPXCHG if FUTEX
41	select HAVE_FTRACE_MCOUNT_RECORD
42	select HAVE_HW_BREAKPOINT
43	select HAVE_IDE if HAS_IOPORT_MAP
44	select HAVE_IOREMAP_PROT if MMU && !X2TLB
45	select HAVE_KERNEL_BZIP2
46	select HAVE_KERNEL_GZIP
47	select HAVE_KERNEL_LZMA
48	select HAVE_KERNEL_LZO
49	select HAVE_KERNEL_XZ
50	select HAVE_KPROBES
51	select HAVE_KRETPROBES
52	select HAVE_MIXED_BREAKPOINTS_REGS
53	select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
54	select HAVE_NMI
55	select HAVE_OPROFILE
56	select HAVE_PATA_PLATFORM
57	select HAVE_PERF_EVENTS
58	select HAVE_REGS_AND_STACK_ACCESS_API
59	select HAVE_UID16
60	select HAVE_STACKPROTECTOR
61	select HAVE_SYSCALL_TRACEPOINTS
62	select IRQ_FORCED_THREADING
63	select MAY_HAVE_SPARSE_IRQ
64	select MODULES_USE_ELF_RELA
65	select NEED_SG_DMA_LENGTH
66	select NO_DMA if !MMU && !DMA_COHERENT
67	select NO_GENERIC_PCI_IOPORT_MAP if PCI
68	select OLD_SIGACTION
69	select OLD_SIGSUSPEND
70	select PCI_DOMAINS if PCI
71	select PERF_EVENTS
72	select PERF_USE_VMALLOC
73	select RTC_LIB
74	select SET_FS
75	select SPARSE_IRQ
76	help
77	  The SuperH is a RISC processor targeted for use in embedded systems
78	  and consumer electronics; it was also used in the Sega Dreamcast
79	  gaming console.  The SuperH port has a home page at
80	  <http://www.linux-sh.org/>.
81
82config GENERIC_BUG
83	def_bool y
84	depends on BUG
85
86config GENERIC_HWEIGHT
87	def_bool y
88
89config GENERIC_CALIBRATE_DELAY
90	bool
91
92config GENERIC_LOCKBREAK
93	def_bool y
94	depends on SMP && PREEMPTION
95
96config ARCH_SUSPEND_POSSIBLE
97	def_bool n
98
99config ARCH_HIBERNATION_POSSIBLE
100	def_bool n
101
102config SYS_SUPPORTS_APM_EMULATION
103	bool
104	select ARCH_SUSPEND_POSSIBLE
105
106config SYS_SUPPORTS_HUGETLBFS
107	bool
108
109config SYS_SUPPORTS_SMP
110	bool
111
112config SYS_SUPPORTS_NUMA
113	bool
114
115config STACKTRACE_SUPPORT
116	def_bool y
117
118config LOCKDEP_SUPPORT
119	def_bool y
120
121config ARCH_HAS_ILOG2_U32
122	def_bool n
123
124config ARCH_HAS_ILOG2_U64
125	def_bool n
126
127config NO_IOPORT_MAP
128	def_bool !PCI
129	depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
130		   !SH_SOLUTION_ENGINE
131
132config IO_TRAPPED
133	bool
134
135config SWAP_IO_SPACE
136	bool
137
138config DMA_COHERENT
139	bool
140
141config DMA_NONCOHERENT
142	def_bool !NO_DMA && !DMA_COHERENT
143	select ARCH_HAS_DMA_PREP_COHERENT
144	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
145	select DMA_DIRECT_REMAP
146
147config PGTABLE_LEVELS
148	default 3 if X2TLB
149	default 2
150
151menu "System type"
152
153#
154# Processor families
155#
156config CPU_SH2
157	bool
158	select SH_INTC
159
160config CPU_SH2A
161	bool
162	select CPU_SH2
163	select UNCACHED_MAPPING
164
165config CPU_J2
166	bool
167	select CPU_SH2
168	select OF
169	select OF_EARLY_FLATTREE
170
171config CPU_SH3
172	bool
173	select CPU_HAS_INTEVT
174	select CPU_HAS_SR_RB
175	select SH_INTC
176	select SYS_SUPPORTS_SH_TMU
177
178config CPU_SH4
179	bool
180	select CPU_HAS_INTEVT
181	select CPU_HAS_SR_RB
182	select CPU_HAS_FPU if !CPU_SH4AL_DSP
183	select SH_INTC
184	select SYS_SUPPORTS_SH_TMU
185	select SYS_SUPPORTS_HUGETLBFS if MMU
186
187config CPU_SH4A
188	bool
189	select CPU_SH4
190
191config CPU_SH4AL_DSP
192	bool
193	select CPU_SH4A
194	select CPU_HAS_DSP
195
196config CPU_SHX2
197	bool
198
199config CPU_SHX3
200	bool
201	select DMA_COHERENT
202	select SYS_SUPPORTS_SMP
203	select SYS_SUPPORTS_NUMA
204
205config ARCH_SHMOBILE
206	bool
207	select ARCH_SUSPEND_POSSIBLE
208	select PM
209
210config CPU_HAS_PMU
211       depends on CPU_SH4 || CPU_SH4A
212       default y
213       bool
214
215choice
216	prompt "Processor sub-type selection"
217
218#
219# Processor subtypes
220#
221
222# SH-2 Processor Support
223
224config CPU_SUBTYPE_SH7619
225	bool "Support SH7619 processor"
226	select CPU_SH2
227	select SYS_SUPPORTS_SH_CMT
228
229config CPU_SUBTYPE_J2
230	bool "Support J2 processor"
231	select CPU_J2
232	select SYS_SUPPORTS_SMP
233	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
234
235# SH-2A Processor Support
236
237config CPU_SUBTYPE_SH7201
238	bool "Support SH7201 processor"
239	select CPU_SH2A
240	select CPU_HAS_FPU
241	select SYS_SUPPORTS_SH_MTU2
242
243config CPU_SUBTYPE_SH7203
244	bool "Support SH7203 processor"
245	select CPU_SH2A
246	select CPU_HAS_FPU
247	select SYS_SUPPORTS_SH_CMT
248	select SYS_SUPPORTS_SH_MTU2
249	select PINCTRL
250
251config CPU_SUBTYPE_SH7206
252	bool "Support SH7206 processor"
253	select CPU_SH2A
254	select SYS_SUPPORTS_SH_CMT
255	select SYS_SUPPORTS_SH_MTU2
256
257config CPU_SUBTYPE_SH7263
258	bool "Support SH7263 processor"
259	select CPU_SH2A
260	select CPU_HAS_FPU
261	select SYS_SUPPORTS_SH_CMT
262	select SYS_SUPPORTS_SH_MTU2
263
264config CPU_SUBTYPE_SH7264
265	bool "Support SH7264 processor"
266	select CPU_SH2A
267	select CPU_HAS_FPU
268	select SYS_SUPPORTS_SH_CMT
269	select SYS_SUPPORTS_SH_MTU2
270	select PINCTRL
271
272config CPU_SUBTYPE_SH7269
273	bool "Support SH7269 processor"
274	select CPU_SH2A
275	select CPU_HAS_FPU
276	select SYS_SUPPORTS_SH_CMT
277	select SYS_SUPPORTS_SH_MTU2
278	select PINCTRL
279
280config CPU_SUBTYPE_MXG
281	bool "Support MX-G processor"
282	select CPU_SH2A
283	select SYS_SUPPORTS_SH_MTU2
284	help
285	  Select MX-G if running on an R8A03022BG part.
286
287# SH-3 Processor Support
288
289config CPU_SUBTYPE_SH7705
290	bool "Support SH7705 processor"
291	select CPU_SH3
292
293config CPU_SUBTYPE_SH7706
294	bool "Support SH7706 processor"
295	select CPU_SH3
296	help
297	  Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
298
299config CPU_SUBTYPE_SH7707
300	bool "Support SH7707 processor"
301	select CPU_SH3
302	help
303	  Select SH7707 if you have a  60 Mhz SH-3 HD6417707 CPU.
304
305config CPU_SUBTYPE_SH7708
306	bool "Support SH7708 processor"
307	select CPU_SH3
308	help
309	  Select SH7708 if you have a  60 Mhz SH-3 HD6417708S or
310	  if you have a 100 Mhz SH-3 HD6417708R CPU.
311
312config CPU_SUBTYPE_SH7709
313	bool "Support SH7709 processor"
314	select CPU_SH3
315	help
316	  Select SH7709 if you have a  80 Mhz SH-3 HD6417709 CPU.
317
318config CPU_SUBTYPE_SH7710
319	bool "Support SH7710 processor"
320	select CPU_SH3
321	select CPU_HAS_DSP
322	help
323	  Select SH7710 if you have a SH3-DSP SH7710 CPU.
324
325config CPU_SUBTYPE_SH7712
326	bool "Support SH7712 processor"
327	select CPU_SH3
328	select CPU_HAS_DSP
329	help
330	  Select SH7712 if you have a SH3-DSP SH7712 CPU.
331
332config CPU_SUBTYPE_SH7720
333	bool "Support SH7720 processor"
334	select CPU_SH3
335	select CPU_HAS_DSP
336	select SYS_SUPPORTS_SH_CMT
337	select USB_OHCI_SH if USB_OHCI_HCD
338	select PINCTRL
339	help
340	  Select SH7720 if you have a SH3-DSP SH7720 CPU.
341
342config CPU_SUBTYPE_SH7721
343	bool "Support SH7721 processor"
344	select CPU_SH3
345	select CPU_HAS_DSP
346	select SYS_SUPPORTS_SH_CMT
347	select USB_OHCI_SH if USB_OHCI_HCD
348	help
349	  Select SH7721 if you have a SH3-DSP SH7721 CPU.
350
351# SH-4 Processor Support
352
353config CPU_SUBTYPE_SH7750
354	bool "Support SH7750 processor"
355	select CPU_SH4
356	help
357	  Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
358
359config CPU_SUBTYPE_SH7091
360	bool "Support SH7091 processor"
361	select CPU_SH4
362	help
363	  Select SH7091 if you have an SH-4 based Sega device (such as
364	  the Dreamcast, Naomi, and Naomi 2).
365
366config CPU_SUBTYPE_SH7750R
367	bool "Support SH7750R processor"
368	select CPU_SH4
369
370config CPU_SUBTYPE_SH7750S
371	bool "Support SH7750S processor"
372	select CPU_SH4
373
374config CPU_SUBTYPE_SH7751
375	bool "Support SH7751 processor"
376	select CPU_SH4
377	help
378	  Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
379	  or if you have a HD6417751R CPU.
380
381config CPU_SUBTYPE_SH7751R
382	bool "Support SH7751R processor"
383	select CPU_SH4
384
385config CPU_SUBTYPE_SH7760
386	bool "Support SH7760 processor"
387	select CPU_SH4
388
389config CPU_SUBTYPE_SH4_202
390	bool "Support SH4-202 processor"
391	select CPU_SH4
392
393# SH-4A Processor Support
394
395config CPU_SUBTYPE_SH7723
396	bool "Support SH7723 processor"
397	select CPU_SH4A
398	select CPU_SHX2
399	select ARCH_SHMOBILE
400	select ARCH_SPARSEMEM_ENABLE
401	select SYS_SUPPORTS_SH_CMT
402	select PINCTRL
403	help
404	  Select SH7723 if you have an SH-MobileR2 CPU.
405
406config CPU_SUBTYPE_SH7724
407	bool "Support SH7724 processor"
408	select CPU_SH4A
409	select CPU_SHX2
410	select ARCH_SHMOBILE
411	select ARCH_SPARSEMEM_ENABLE
412	select SYS_SUPPORTS_SH_CMT
413	select PINCTRL
414	help
415	  Select SH7724 if you have an SH-MobileR2R CPU.
416
417config CPU_SUBTYPE_SH7734
418	bool "Support SH7734 processor"
419	select CPU_SH4A
420	select CPU_SHX2
421	select PINCTRL
422	help
423	  Select SH7734 if you have a SH4A SH7734 CPU.
424
425config CPU_SUBTYPE_SH7757
426	bool "Support SH7757 processor"
427	select CPU_SH4A
428	select CPU_SHX2
429	select PINCTRL
430	help
431	  Select SH7757 if you have a SH4A SH7757 CPU.
432
433config CPU_SUBTYPE_SH7763
434	bool "Support SH7763 processor"
435	select CPU_SH4A
436	select USB_OHCI_SH if USB_OHCI_HCD
437	help
438	  Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
439
440config CPU_SUBTYPE_SH7770
441	bool "Support SH7770 processor"
442	select CPU_SH4A
443
444config CPU_SUBTYPE_SH7780
445	bool "Support SH7780 processor"
446	select CPU_SH4A
447
448config CPU_SUBTYPE_SH7785
449	bool "Support SH7785 processor"
450	select CPU_SH4A
451	select CPU_SHX2
452	select ARCH_SPARSEMEM_ENABLE
453	select SYS_SUPPORTS_NUMA
454	select PINCTRL
455
456config CPU_SUBTYPE_SH7786
457	bool "Support SH7786 processor"
458	select CPU_SH4A
459	select CPU_SHX3
460	select CPU_HAS_PTEAEX
461	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
462	select USB_OHCI_SH if USB_OHCI_HCD
463	select USB_EHCI_SH if USB_EHCI_HCD
464	select PINCTRL
465
466config CPU_SUBTYPE_SHX3
467	bool "Support SH-X3 processor"
468	select CPU_SH4A
469	select CPU_SHX3
470	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
471	select GPIOLIB
472	select PINCTRL
473
474# SH4AL-DSP Processor Support
475
476config CPU_SUBTYPE_SH7343
477	bool "Support SH7343 processor"
478	select CPU_SH4AL_DSP
479	select ARCH_SHMOBILE
480	select SYS_SUPPORTS_SH_CMT
481
482config CPU_SUBTYPE_SH7722
483	bool "Support SH7722 processor"
484	select CPU_SH4AL_DSP
485	select CPU_SHX2
486	select ARCH_SHMOBILE
487	select ARCH_SPARSEMEM_ENABLE
488	select SYS_SUPPORTS_NUMA
489	select SYS_SUPPORTS_SH_CMT
490	select PINCTRL
491
492config CPU_SUBTYPE_SH7366
493	bool "Support SH7366 processor"
494	select CPU_SH4AL_DSP
495	select CPU_SHX2
496	select ARCH_SHMOBILE
497	select ARCH_SPARSEMEM_ENABLE
498	select SYS_SUPPORTS_NUMA
499	select SYS_SUPPORTS_SH_CMT
500
501endchoice
502
503source "arch/sh/mm/Kconfig"
504
505source "arch/sh/Kconfig.cpu"
506
507source "arch/sh/boards/Kconfig"
508
509menu "Timer and clock configuration"
510
511config SH_PCLK_FREQ
512	int "Peripheral clock frequency (in Hz)"
513	depends on SH_CLK_CPG_LEGACY
514	default "31250000" if CPU_SUBTYPE_SH7619
515	default "33333333" if CPU_SUBTYPE_SH7770 || \
516			      CPU_SUBTYPE_SH7760 || \
517			      CPU_SUBTYPE_SH7705 || \
518			      CPU_SUBTYPE_SH7203 || \
519			      CPU_SUBTYPE_SH7206 || \
520			      CPU_SUBTYPE_SH7263 || \
521			      CPU_SUBTYPE_MXG
522	default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
523	default "66000000" if CPU_SUBTYPE_SH4_202
524	default "50000000"
525	help
526	  This option is used to specify the peripheral clock frequency.
527	  This is necessary for determining the reference clock value on
528	  platforms lacking an RTC.
529
530config SH_CLK_CPG
531	def_bool y
532
533config SH_CLK_CPG_LEGACY
534	depends on SH_CLK_CPG
535	def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
536		      !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
537		      !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
538		      !CPU_SUBTYPE_SH7269
539
540endmenu
541
542menu "CPU Frequency scaling"
543source "drivers/cpufreq/Kconfig"
544endmenu
545
546source "arch/sh/drivers/Kconfig"
547
548endmenu
549
550menu "Kernel features"
551
552source "kernel/Kconfig.hz"
553
554config KEXEC
555	bool "kexec system call (EXPERIMENTAL)"
556	depends on MMU
557	select KEXEC_CORE
558	help
559	  kexec is a system call that implements the ability to shutdown your
560	  current kernel, and to start another kernel.  It is like a reboot
561	  but it is independent of the system firmware.  And like a reboot
562	  you can start any kernel with it, not just Linux.
563
564	  The name comes from the similarity to the exec system call.
565
566	  It is an ongoing process to be certain the hardware in a machine
567	  is properly shutdown, so do not be surprised if this code does not
568	  initially work for you.  As of this writing the exact hardware
569	  interface is strongly in flux, so no good recommendation can be
570	  made.
571
572config CRASH_DUMP
573	bool "kernel crash dumps (EXPERIMENTAL)"
574	depends on BROKEN_ON_SMP
575	help
576	  Generate crash dump after being started by kexec.
577	  This should be normally only set in special crash dump kernels
578	  which are loaded in the main kernel with kexec-tools into
579	  a specially reserved region and then later executed after
580	  a crash by kdump/kexec. The crash dump kernel must be compiled
581	  to a memory address not used by the main kernel using
582	  PHYSICAL_START.
583
584	  For more details see Documentation/admin-guide/kdump/kdump.rst
585
586config KEXEC_JUMP
587	bool "kexec jump (EXPERIMENTAL)"
588	depends on KEXEC && HIBERNATION
589	help
590	  Jump between original kernel and kexeced kernel and invoke
591	  code via KEXEC
592
593config PHYSICAL_START
594	hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
595	default MEMORY_START
596	help
597	  This gives the physical address where the kernel is loaded
598	  and is ordinarily the same as MEMORY_START.
599
600	  Different values are primarily used in the case of kexec on panic
601	  where the fail safe kernel needs to run at a different address
602	  than the panic-ed kernel.
603
604config SMP
605	bool "Symmetric multi-processing support"
606	depends on SYS_SUPPORTS_SMP
607	help
608	  This enables support for systems with more than one CPU. If you have
609	  a system with only one CPU, say N. If you have a system with more
610	  than one CPU, say Y.
611
612	  If you say N here, the kernel will run on uni- and multiprocessor
613	  machines, but will use only one CPU of a multiprocessor machine. If
614	  you say Y here, the kernel will run on many, but not all,
615	  uniprocessor machines. On a uniprocessor machine, the kernel
616	  will run faster if you say N here.
617
618	  People using multiprocessor machines who say Y here should also say
619	  Y to "Enhanced Real Time Clock Support", below.
620
621	  See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
622	  available at <https://www.tldp.org/docs.html#howto>.
623
624	  If you don't know what to do here, say N.
625
626config NR_CPUS
627	int "Maximum number of CPUs (2-32)"
628	range 2 32
629	depends on SMP
630	default "4" if CPU_SUBTYPE_SHX3
631	default "2"
632	help
633	  This allows you to specify the maximum number of CPUs which this
634	  kernel will support.  The maximum supported value is 32 and the
635	  minimum value which makes sense is 2.
636
637	  This is purely to save memory - each supported CPU adds
638	  approximately eight kilobytes to the kernel image.
639
640config HOTPLUG_CPU
641	bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
642	depends on SMP
643	help
644	  Say Y here to experiment with turning CPUs off and on.  CPUs
645	  can be controlled through /sys/devices/system/cpu.
646
647config GUSA
648	def_bool y
649	depends on !SMP
650	help
651	  This enables support for gUSA (general UserSpace Atomicity).
652	  This is the default implementation for both UP and non-ll/sc
653	  CPUs, and is used by the libc, amongst others.
654
655	  For additional information, design information can be found
656	  in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
657
658	  This should only be disabled for special cases where alternate
659	  atomicity implementations exist.
660
661config GUSA_RB
662	bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
663	depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
664	help
665	  Enabling this option will allow the kernel to implement some
666	  atomic operations using a software implementation of load-locked/
667	  store-conditional (LLSC). On machines which do not have hardware
668	  LLSC, this should be more efficient than the other alternative of
669	  disabling interrupts around the atomic sequence.
670
671config HW_PERF_EVENTS
672	bool "Enable hardware performance counter support for perf events"
673	depends on PERF_EVENTS && CPU_HAS_PMU
674	default y
675	help
676	  Enable hardware performance counter support for perf events. If
677	  disabled, perf events will use software events only.
678
679source "drivers/sh/Kconfig"
680
681endmenu
682
683menu "Boot options"
684
685config USE_BUILTIN_DTB
686	bool "Use builtin DTB"
687	default n
688	depends on SH_DEVICE_TREE
689	help
690	  Link a device tree blob for particular hardware into the kernel,
691	  suppressing use of the DTB pointer provided by the bootloader.
692	  This option should only be used with legacy bootloaders that are
693	  not capable of providing a DTB to the kernel, or for experimental
694	  hardware without stable device tree bindings.
695
696config BUILTIN_DTB_SOURCE
697	string "Source file for builtin DTB"
698	default ""
699	depends on USE_BUILTIN_DTB
700	help
701	  Base name (without suffix, relative to arch/sh/boot/dts) for the
702	  a DTS file that will be used to produce the DTB linked into the
703	  kernel.
704
705config ZERO_PAGE_OFFSET
706	hex
707	default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
708				SH_7751_SOLUTION_ENGINE
709	default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
710	default "0x00002000" if PAGE_SIZE_8KB
711	default "0x00001000"
712	help
713	  This sets the default offset of zero page.
714
715config BOOT_LINK_OFFSET
716	hex
717	default "0x00210000" if SH_SHMIN
718	default "0x00810000" if SH_7780_SOLUTION_ENGINE
719	default "0x009e0000" if SH_TITAN
720	default "0x01800000" if SH_SDK7780
721	default "0x02000000" if SH_EDOSK7760
722	default "0x00800000"
723	help
724	  This option allows you to set the link address offset of the zImage.
725	  This can be useful if you are on a board which has a small amount of
726	  memory.
727
728config ENTRY_OFFSET
729	hex
730	default "0x00001000" if PAGE_SIZE_4KB
731	default "0x00002000" if PAGE_SIZE_8KB
732	default "0x00004000" if PAGE_SIZE_16KB
733	default "0x00010000" if PAGE_SIZE_64KB
734	default "0x00000000"
735
736config ROMIMAGE_MMCIF
737	bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
738	depends on CPU_SUBTYPE_SH7724
739	help
740	  Say Y here to include experimental MMCIF loading code in
741	  romImage. With this enabled it is possible to write the romImage
742	  kernel image to an MMC card and boot the kernel straight from
743	  the reset vector. At reset the processor Mask ROM will load the
744	  first part of the romImage which in turn loads the rest the kernel
745	  image to RAM using the MMCIF hardware block.
746
747choice
748	prompt "Kernel command line"
749	optional
750	default CMDLINE_OVERWRITE
751	help
752	  Setting this option allows the kernel command line arguments
753	  to be set.
754
755config CMDLINE_OVERWRITE
756	bool "Overwrite bootloader kernel arguments"
757	help
758	  Given string will overwrite any arguments passed in by
759	  a bootloader.
760
761config CMDLINE_EXTEND
762	bool "Extend bootloader kernel arguments"
763	help
764	  Given string will be concatenated with arguments passed in
765	  by a bootloader.
766
767endchoice
768
769config CMDLINE
770	string "Kernel command line arguments string"
771	depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
772	default "console=ttySC1,115200"
773
774endmenu
775
776menu "Bus options"
777
778config SUPERHYWAY
779	tristate "SuperHyway Bus support"
780	depends on CPU_SUBTYPE_SH4_202
781
782config MAPLE
783	bool "Maple Bus support"
784	depends on SH_DREAMCAST
785	help
786	 The Maple Bus is SEGA's serial communication bus for peripherals
787	 on the Dreamcast. Without this bus support you won't be able to
788	 get your Dreamcast keyboard etc to work, so most users
789	 probably want to say 'Y' here, unless you are only using the
790	 Dreamcast with a serial line terminal or a remote network
791	 connection.
792
793endmenu
794
795menu "Power management options (EXPERIMENTAL)"
796
797source "kernel/power/Kconfig"
798
799source "drivers/cpuidle/Kconfig"
800
801endmenu
802