xref: /openbmc/linux/arch/sh/Kconfig (revision e3211e41)
1# SPDX-License-Identifier: GPL-2.0
2config SUPERH
3	def_bool y
4	select ARCH_32BIT_OFF_T
5	select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU
6	select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU
7	select ARCH_HAVE_CUSTOM_GPIO_H
8	select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
9	select ARCH_HAS_BINFMT_FLAT if !MMU
10	select ARCH_HAS_GIGANTIC_PAGE
11	select ARCH_HAS_GCOV_PROFILE_ALL
12	select ARCH_HAS_PTE_SPECIAL
13	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
14	select ARCH_HIBERNATION_POSSIBLE if MMU
15	select ARCH_MIGHT_HAVE_PC_PARPORT
16	select ARCH_WANT_IPC_PARSE_VERSION
17	select CLKDEV_LOOKUP
18	select CPU_NO_EFFICIENT_FFS
19	select DMA_DECLARE_COHERENT
20	select GENERIC_ATOMIC64
21	select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
22	select GENERIC_IDLE_POLL_SETUP
23	select GENERIC_IRQ_SHOW
24	select GENERIC_PCI_IOMAP if PCI
25	select GENERIC_SCHED_CLOCK
26	select GENERIC_STRNCPY_FROM_USER
27	select GENERIC_STRNLEN_USER
28	select GENERIC_SMP_IDLE_THREAD
29	select GUP_GET_PTE_LOW_HIGH if X2TLB
30	select HAVE_ARCH_AUDITSYSCALL
31	select HAVE_ARCH_KGDB
32	select HAVE_ARCH_SECCOMP_FILTER
33	select HAVE_ARCH_TRACEHOOK
34	select HAVE_DEBUG_BUGVERBOSE
35	select HAVE_DEBUG_KMEMLEAK
36	select HAVE_DYNAMIC_FTRACE
37	select HAVE_FAST_GUP if MMU
38	select HAVE_FUNCTION_GRAPH_TRACER
39	select HAVE_FUNCTION_TRACER
40	select HAVE_FUTEX_CMPXCHG if FUTEX
41	select HAVE_FTRACE_MCOUNT_RECORD
42	select HAVE_HW_BREAKPOINT
43	select HAVE_IDE if HAS_IOPORT_MAP
44	select HAVE_IOREMAP_PROT if MMU && !X2TLB
45	select HAVE_KERNEL_BZIP2
46	select HAVE_KERNEL_GZIP
47	select HAVE_KERNEL_LZMA
48	select HAVE_KERNEL_LZO
49	select HAVE_KERNEL_XZ
50	select HAVE_KPROBES
51	select HAVE_KRETPROBES
52	select HAVE_MIXED_BREAKPOINTS_REGS
53	select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
54	select HAVE_NMI
55	select HAVE_PATA_PLATFORM
56	select HAVE_PERF_EVENTS
57	select HAVE_REGS_AND_STACK_ACCESS_API
58	select HAVE_UID16
59	select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
60	select HAVE_STACKPROTECTOR
61	select HAVE_SYSCALL_TRACEPOINTS
62	select IRQ_FORCED_THREADING
63	select MAY_HAVE_SPARSE_IRQ
64	select MODULES_USE_ELF_RELA
65	select NEED_SG_DMA_LENGTH
66	select NO_DMA if !MMU && !DMA_COHERENT
67	select NO_GENERIC_PCI_IOPORT_MAP if PCI
68	select OLD_SIGACTION
69	select OLD_SIGSUSPEND
70	select PCI_DOMAINS if PCI
71	select PERF_EVENTS
72	select PERF_USE_VMALLOC
73	select RTC_LIB
74	select SET_FS
75	select SPARSE_IRQ
76	help
77	  The SuperH is a RISC processor targeted for use in embedded systems
78	  and consumer electronics; it was also used in the Sega Dreamcast
79	  gaming console.  The SuperH port has a home page at
80	  <http://www.linux-sh.org/>.
81
82config GENERIC_BUG
83	def_bool y
84	depends on BUG
85
86config GENERIC_HWEIGHT
87	def_bool y
88
89config GENERIC_CALIBRATE_DELAY
90	bool
91
92config GENERIC_LOCKBREAK
93	def_bool y
94	depends on SMP && PREEMPTION
95
96config ARCH_SUSPEND_POSSIBLE
97	def_bool n
98
99config ARCH_HIBERNATION_POSSIBLE
100	def_bool n
101
102config SYS_SUPPORTS_APM_EMULATION
103	bool
104	select ARCH_SUSPEND_POSSIBLE
105
106config SYS_SUPPORTS_SMP
107	bool
108
109config SYS_SUPPORTS_NUMA
110	bool
111
112config STACKTRACE_SUPPORT
113	def_bool y
114
115config LOCKDEP_SUPPORT
116	def_bool y
117
118config ARCH_HAS_ILOG2_U32
119	def_bool n
120
121config ARCH_HAS_ILOG2_U64
122	def_bool n
123
124config NO_IOPORT_MAP
125	def_bool !PCI
126	depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
127		   !SH_SOLUTION_ENGINE
128
129config IO_TRAPPED
130	bool
131
132config SWAP_IO_SPACE
133	bool
134
135config DMA_COHERENT
136	bool
137
138config DMA_NONCOHERENT
139	def_bool !NO_DMA && !DMA_COHERENT
140	select ARCH_HAS_DMA_PREP_COHERENT
141	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
142	select DMA_DIRECT_REMAP
143
144config PGTABLE_LEVELS
145	default 3 if X2TLB
146	default 2
147
148menu "System type"
149
150#
151# Processor families
152#
153config CPU_SH2
154	bool
155	select SH_INTC
156
157config CPU_SH2A
158	bool
159	select CPU_SH2
160	select UNCACHED_MAPPING
161
162config CPU_J2
163	bool
164	select CPU_SH2
165	select OF
166	select OF_EARLY_FLATTREE
167
168config CPU_SH3
169	bool
170	select CPU_HAS_INTEVT
171	select CPU_HAS_SR_RB
172	select SH_INTC
173	select SYS_SUPPORTS_SH_TMU
174
175config CPU_SH4
176	bool
177	select ARCH_SUPPORTS_HUGETLBFS if MMU
178	select CPU_HAS_INTEVT
179	select CPU_HAS_SR_RB
180	select CPU_HAS_FPU if !CPU_SH4AL_DSP
181	select SH_INTC
182	select SYS_SUPPORTS_SH_TMU
183
184config CPU_SH4A
185	bool
186	select CPU_SH4
187
188config CPU_SH4AL_DSP
189	bool
190	select CPU_SH4A
191	select CPU_HAS_DSP
192
193config CPU_SHX2
194	bool
195
196config CPU_SHX3
197	bool
198	select DMA_COHERENT
199	select SYS_SUPPORTS_SMP
200	select SYS_SUPPORTS_NUMA
201
202config ARCH_SHMOBILE
203	bool
204	select ARCH_SUSPEND_POSSIBLE
205	select PM
206
207config CPU_HAS_PMU
208       depends on CPU_SH4 || CPU_SH4A
209       default y
210       bool
211
212choice
213	prompt "Processor sub-type selection"
214
215#
216# Processor subtypes
217#
218
219# SH-2 Processor Support
220
221config CPU_SUBTYPE_SH7619
222	bool "Support SH7619 processor"
223	select CPU_SH2
224	select SYS_SUPPORTS_SH_CMT
225
226config CPU_SUBTYPE_J2
227	bool "Support J2 processor"
228	select CPU_J2
229	select SYS_SUPPORTS_SMP
230	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
231
232# SH-2A Processor Support
233
234config CPU_SUBTYPE_SH7201
235	bool "Support SH7201 processor"
236	select CPU_SH2A
237	select CPU_HAS_FPU
238	select SYS_SUPPORTS_SH_MTU2
239
240config CPU_SUBTYPE_SH7203
241	bool "Support SH7203 processor"
242	select CPU_SH2A
243	select CPU_HAS_FPU
244	select SYS_SUPPORTS_SH_CMT
245	select SYS_SUPPORTS_SH_MTU2
246	select PINCTRL
247
248config CPU_SUBTYPE_SH7206
249	bool "Support SH7206 processor"
250	select CPU_SH2A
251	select SYS_SUPPORTS_SH_CMT
252	select SYS_SUPPORTS_SH_MTU2
253
254config CPU_SUBTYPE_SH7263
255	bool "Support SH7263 processor"
256	select CPU_SH2A
257	select CPU_HAS_FPU
258	select SYS_SUPPORTS_SH_CMT
259	select SYS_SUPPORTS_SH_MTU2
260
261config CPU_SUBTYPE_SH7264
262	bool "Support SH7264 processor"
263	select CPU_SH2A
264	select CPU_HAS_FPU
265	select SYS_SUPPORTS_SH_CMT
266	select SYS_SUPPORTS_SH_MTU2
267	select PINCTRL
268
269config CPU_SUBTYPE_SH7269
270	bool "Support SH7269 processor"
271	select CPU_SH2A
272	select CPU_HAS_FPU
273	select SYS_SUPPORTS_SH_CMT
274	select SYS_SUPPORTS_SH_MTU2
275	select PINCTRL
276
277config CPU_SUBTYPE_MXG
278	bool "Support MX-G processor"
279	select CPU_SH2A
280	select SYS_SUPPORTS_SH_MTU2
281	help
282	  Select MX-G if running on an R8A03022BG part.
283
284# SH-3 Processor Support
285
286config CPU_SUBTYPE_SH7705
287	bool "Support SH7705 processor"
288	select CPU_SH3
289
290config CPU_SUBTYPE_SH7706
291	bool "Support SH7706 processor"
292	select CPU_SH3
293	help
294	  Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
295
296config CPU_SUBTYPE_SH7707
297	bool "Support SH7707 processor"
298	select CPU_SH3
299	help
300	  Select SH7707 if you have a  60 Mhz SH-3 HD6417707 CPU.
301
302config CPU_SUBTYPE_SH7708
303	bool "Support SH7708 processor"
304	select CPU_SH3
305	help
306	  Select SH7708 if you have a  60 Mhz SH-3 HD6417708S or
307	  if you have a 100 Mhz SH-3 HD6417708R CPU.
308
309config CPU_SUBTYPE_SH7709
310	bool "Support SH7709 processor"
311	select CPU_SH3
312	help
313	  Select SH7709 if you have a  80 Mhz SH-3 HD6417709 CPU.
314
315config CPU_SUBTYPE_SH7710
316	bool "Support SH7710 processor"
317	select CPU_SH3
318	select CPU_HAS_DSP
319	help
320	  Select SH7710 if you have a SH3-DSP SH7710 CPU.
321
322config CPU_SUBTYPE_SH7712
323	bool "Support SH7712 processor"
324	select CPU_SH3
325	select CPU_HAS_DSP
326	help
327	  Select SH7712 if you have a SH3-DSP SH7712 CPU.
328
329config CPU_SUBTYPE_SH7720
330	bool "Support SH7720 processor"
331	select CPU_SH3
332	select CPU_HAS_DSP
333	select SYS_SUPPORTS_SH_CMT
334	select USB_OHCI_SH if USB_OHCI_HCD
335	select PINCTRL
336	help
337	  Select SH7720 if you have a SH3-DSP SH7720 CPU.
338
339config CPU_SUBTYPE_SH7721
340	bool "Support SH7721 processor"
341	select CPU_SH3
342	select CPU_HAS_DSP
343	select SYS_SUPPORTS_SH_CMT
344	select USB_OHCI_SH if USB_OHCI_HCD
345	help
346	  Select SH7721 if you have a SH3-DSP SH7721 CPU.
347
348# SH-4 Processor Support
349
350config CPU_SUBTYPE_SH7750
351	bool "Support SH7750 processor"
352	select CPU_SH4
353	help
354	  Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
355
356config CPU_SUBTYPE_SH7091
357	bool "Support SH7091 processor"
358	select CPU_SH4
359	help
360	  Select SH7091 if you have an SH-4 based Sega device (such as
361	  the Dreamcast, Naomi, and Naomi 2).
362
363config CPU_SUBTYPE_SH7750R
364	bool "Support SH7750R processor"
365	select CPU_SH4
366
367config CPU_SUBTYPE_SH7750S
368	bool "Support SH7750S processor"
369	select CPU_SH4
370
371config CPU_SUBTYPE_SH7751
372	bool "Support SH7751 processor"
373	select CPU_SH4
374	help
375	  Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
376	  or if you have a HD6417751R CPU.
377
378config CPU_SUBTYPE_SH7751R
379	bool "Support SH7751R processor"
380	select CPU_SH4
381
382config CPU_SUBTYPE_SH7760
383	bool "Support SH7760 processor"
384	select CPU_SH4
385
386config CPU_SUBTYPE_SH4_202
387	bool "Support SH4-202 processor"
388	select CPU_SH4
389
390# SH-4A Processor Support
391
392config CPU_SUBTYPE_SH7723
393	bool "Support SH7723 processor"
394	select CPU_SH4A
395	select CPU_SHX2
396	select ARCH_SHMOBILE
397	select ARCH_SPARSEMEM_ENABLE
398	select SYS_SUPPORTS_SH_CMT
399	select PINCTRL
400	help
401	  Select SH7723 if you have an SH-MobileR2 CPU.
402
403config CPU_SUBTYPE_SH7724
404	bool "Support SH7724 processor"
405	select CPU_SH4A
406	select CPU_SHX2
407	select ARCH_SHMOBILE
408	select ARCH_SPARSEMEM_ENABLE
409	select SYS_SUPPORTS_SH_CMT
410	select PINCTRL
411	help
412	  Select SH7724 if you have an SH-MobileR2R CPU.
413
414config CPU_SUBTYPE_SH7734
415	bool "Support SH7734 processor"
416	select CPU_SH4A
417	select CPU_SHX2
418	select PINCTRL
419	help
420	  Select SH7734 if you have a SH4A SH7734 CPU.
421
422config CPU_SUBTYPE_SH7757
423	bool "Support SH7757 processor"
424	select CPU_SH4A
425	select CPU_SHX2
426	select PINCTRL
427	help
428	  Select SH7757 if you have a SH4A SH7757 CPU.
429
430config CPU_SUBTYPE_SH7763
431	bool "Support SH7763 processor"
432	select CPU_SH4A
433	select USB_OHCI_SH if USB_OHCI_HCD
434	help
435	  Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
436
437config CPU_SUBTYPE_SH7770
438	bool "Support SH7770 processor"
439	select CPU_SH4A
440
441config CPU_SUBTYPE_SH7780
442	bool "Support SH7780 processor"
443	select CPU_SH4A
444
445config CPU_SUBTYPE_SH7785
446	bool "Support SH7785 processor"
447	select CPU_SH4A
448	select CPU_SHX2
449	select ARCH_SPARSEMEM_ENABLE
450	select SYS_SUPPORTS_NUMA
451	select PINCTRL
452
453config CPU_SUBTYPE_SH7786
454	bool "Support SH7786 processor"
455	select CPU_SH4A
456	select CPU_SHX3
457	select CPU_HAS_PTEAEX
458	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
459	select USB_OHCI_SH if USB_OHCI_HCD
460	select USB_EHCI_SH if USB_EHCI_HCD
461	select PINCTRL
462
463config CPU_SUBTYPE_SHX3
464	bool "Support SH-X3 processor"
465	select CPU_SH4A
466	select CPU_SHX3
467	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
468	select GPIOLIB
469	select PINCTRL
470
471# SH4AL-DSP Processor Support
472
473config CPU_SUBTYPE_SH7343
474	bool "Support SH7343 processor"
475	select CPU_SH4AL_DSP
476	select ARCH_SHMOBILE
477	select SYS_SUPPORTS_SH_CMT
478
479config CPU_SUBTYPE_SH7722
480	bool "Support SH7722 processor"
481	select CPU_SH4AL_DSP
482	select CPU_SHX2
483	select ARCH_SHMOBILE
484	select ARCH_SPARSEMEM_ENABLE
485	select SYS_SUPPORTS_NUMA
486	select SYS_SUPPORTS_SH_CMT
487	select PINCTRL
488
489config CPU_SUBTYPE_SH7366
490	bool "Support SH7366 processor"
491	select CPU_SH4AL_DSP
492	select CPU_SHX2
493	select ARCH_SHMOBILE
494	select ARCH_SPARSEMEM_ENABLE
495	select SYS_SUPPORTS_NUMA
496	select SYS_SUPPORTS_SH_CMT
497
498endchoice
499
500source "arch/sh/mm/Kconfig"
501
502source "arch/sh/Kconfig.cpu"
503
504source "arch/sh/boards/Kconfig"
505
506menu "Timer and clock configuration"
507
508config SH_PCLK_FREQ
509	int "Peripheral clock frequency (in Hz)"
510	depends on SH_CLK_CPG_LEGACY
511	default "31250000" if CPU_SUBTYPE_SH7619
512	default "33333333" if CPU_SUBTYPE_SH7770 || \
513			      CPU_SUBTYPE_SH7760 || \
514			      CPU_SUBTYPE_SH7705 || \
515			      CPU_SUBTYPE_SH7203 || \
516			      CPU_SUBTYPE_SH7206 || \
517			      CPU_SUBTYPE_SH7263 || \
518			      CPU_SUBTYPE_MXG
519	default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
520	default "66000000" if CPU_SUBTYPE_SH4_202
521	default "50000000"
522	help
523	  This option is used to specify the peripheral clock frequency.
524	  This is necessary for determining the reference clock value on
525	  platforms lacking an RTC.
526
527config SH_CLK_CPG
528	def_bool y
529
530config SH_CLK_CPG_LEGACY
531	depends on SH_CLK_CPG
532	def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
533		      !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
534		      !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
535		      !CPU_SUBTYPE_SH7269
536
537endmenu
538
539menu "CPU Frequency scaling"
540source "drivers/cpufreq/Kconfig"
541endmenu
542
543source "arch/sh/drivers/Kconfig"
544
545endmenu
546
547menu "Kernel features"
548
549source "kernel/Kconfig.hz"
550
551config KEXEC
552	bool "kexec system call (EXPERIMENTAL)"
553	depends on MMU
554	select KEXEC_CORE
555	help
556	  kexec is a system call that implements the ability to shutdown your
557	  current kernel, and to start another kernel.  It is like a reboot
558	  but it is independent of the system firmware.  And like a reboot
559	  you can start any kernel with it, not just Linux.
560
561	  The name comes from the similarity to the exec system call.
562
563	  It is an ongoing process to be certain the hardware in a machine
564	  is properly shutdown, so do not be surprised if this code does not
565	  initially work for you.  As of this writing the exact hardware
566	  interface is strongly in flux, so no good recommendation can be
567	  made.
568
569config CRASH_DUMP
570	bool "kernel crash dumps (EXPERIMENTAL)"
571	depends on BROKEN_ON_SMP
572	help
573	  Generate crash dump after being started by kexec.
574	  This should be normally only set in special crash dump kernels
575	  which are loaded in the main kernel with kexec-tools into
576	  a specially reserved region and then later executed after
577	  a crash by kdump/kexec. The crash dump kernel must be compiled
578	  to a memory address not used by the main kernel using
579	  PHYSICAL_START.
580
581	  For more details see Documentation/admin-guide/kdump/kdump.rst
582
583config KEXEC_JUMP
584	bool "kexec jump (EXPERIMENTAL)"
585	depends on KEXEC && HIBERNATION
586	help
587	  Jump between original kernel and kexeced kernel and invoke
588	  code via KEXEC
589
590config PHYSICAL_START
591	hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
592	default MEMORY_START
593	help
594	  This gives the physical address where the kernel is loaded
595	  and is ordinarily the same as MEMORY_START.
596
597	  Different values are primarily used in the case of kexec on panic
598	  where the fail safe kernel needs to run at a different address
599	  than the panic-ed kernel.
600
601config SMP
602	bool "Symmetric multi-processing support"
603	depends on SYS_SUPPORTS_SMP
604	help
605	  This enables support for systems with more than one CPU. If you have
606	  a system with only one CPU, say N. If you have a system with more
607	  than one CPU, say Y.
608
609	  If you say N here, the kernel will run on uni- and multiprocessor
610	  machines, but will use only one CPU of a multiprocessor machine. If
611	  you say Y here, the kernel will run on many, but not all,
612	  uniprocessor machines. On a uniprocessor machine, the kernel
613	  will run faster if you say N here.
614
615	  People using multiprocessor machines who say Y here should also say
616	  Y to "Enhanced Real Time Clock Support", below.
617
618	  See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
619	  available at <https://www.tldp.org/docs.html#howto>.
620
621	  If you don't know what to do here, say N.
622
623config NR_CPUS
624	int "Maximum number of CPUs (2-32)"
625	range 2 32
626	depends on SMP
627	default "4" if CPU_SUBTYPE_SHX3
628	default "2"
629	help
630	  This allows you to specify the maximum number of CPUs which this
631	  kernel will support.  The maximum supported value is 32 and the
632	  minimum value which makes sense is 2.
633
634	  This is purely to save memory - each supported CPU adds
635	  approximately eight kilobytes to the kernel image.
636
637config HOTPLUG_CPU
638	bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
639	depends on SMP
640	help
641	  Say Y here to experiment with turning CPUs off and on.  CPUs
642	  can be controlled through /sys/devices/system/cpu.
643
644config GUSA
645	def_bool y
646	depends on !SMP
647	help
648	  This enables support for gUSA (general UserSpace Atomicity).
649	  This is the default implementation for both UP and non-ll/sc
650	  CPUs, and is used by the libc, amongst others.
651
652	  For additional information, design information can be found
653	  in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
654
655	  This should only be disabled for special cases where alternate
656	  atomicity implementations exist.
657
658config GUSA_RB
659	bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
660	depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
661	help
662	  Enabling this option will allow the kernel to implement some
663	  atomic operations using a software implementation of load-locked/
664	  store-conditional (LLSC). On machines which do not have hardware
665	  LLSC, this should be more efficient than the other alternative of
666	  disabling interrupts around the atomic sequence.
667
668config HW_PERF_EVENTS
669	bool "Enable hardware performance counter support for perf events"
670	depends on PERF_EVENTS && CPU_HAS_PMU
671	default y
672	help
673	  Enable hardware performance counter support for perf events. If
674	  disabled, perf events will use software events only.
675
676source "drivers/sh/Kconfig"
677
678endmenu
679
680menu "Boot options"
681
682config USE_BUILTIN_DTB
683	bool "Use builtin DTB"
684	default n
685	depends on SH_DEVICE_TREE
686	help
687	  Link a device tree blob for particular hardware into the kernel,
688	  suppressing use of the DTB pointer provided by the bootloader.
689	  This option should only be used with legacy bootloaders that are
690	  not capable of providing a DTB to the kernel, or for experimental
691	  hardware without stable device tree bindings.
692
693config BUILTIN_DTB_SOURCE
694	string "Source file for builtin DTB"
695	default ""
696	depends on USE_BUILTIN_DTB
697	help
698	  Base name (without suffix, relative to arch/sh/boot/dts) for the
699	  a DTS file that will be used to produce the DTB linked into the
700	  kernel.
701
702config ZERO_PAGE_OFFSET
703	hex
704	default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
705				SH_7751_SOLUTION_ENGINE
706	default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
707	default "0x00002000" if PAGE_SIZE_8KB
708	default "0x00001000"
709	help
710	  This sets the default offset of zero page.
711
712config BOOT_LINK_OFFSET
713	hex
714	default "0x00210000" if SH_SHMIN
715	default "0x00810000" if SH_7780_SOLUTION_ENGINE
716	default "0x009e0000" if SH_TITAN
717	default "0x01800000" if SH_SDK7780
718	default "0x02000000" if SH_EDOSK7760
719	default "0x00800000"
720	help
721	  This option allows you to set the link address offset of the zImage.
722	  This can be useful if you are on a board which has a small amount of
723	  memory.
724
725config ENTRY_OFFSET
726	hex
727	default "0x00001000" if PAGE_SIZE_4KB
728	default "0x00002000" if PAGE_SIZE_8KB
729	default "0x00004000" if PAGE_SIZE_16KB
730	default "0x00010000" if PAGE_SIZE_64KB
731	default "0x00000000"
732
733config ROMIMAGE_MMCIF
734	bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
735	depends on CPU_SUBTYPE_SH7724
736	help
737	  Say Y here to include experimental MMCIF loading code in
738	  romImage. With this enabled it is possible to write the romImage
739	  kernel image to an MMC card and boot the kernel straight from
740	  the reset vector. At reset the processor Mask ROM will load the
741	  first part of the romImage which in turn loads the rest the kernel
742	  image to RAM using the MMCIF hardware block.
743
744choice
745	prompt "Kernel command line"
746	optional
747	default CMDLINE_OVERWRITE
748	help
749	  Setting this option allows the kernel command line arguments
750	  to be set.
751
752config CMDLINE_OVERWRITE
753	bool "Overwrite bootloader kernel arguments"
754	help
755	  Given string will overwrite any arguments passed in by
756	  a bootloader.
757
758config CMDLINE_EXTEND
759	bool "Extend bootloader kernel arguments"
760	help
761	  Given string will be concatenated with arguments passed in
762	  by a bootloader.
763
764endchoice
765
766config CMDLINE
767	string "Kernel command line arguments string"
768	depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
769	default "console=ttySC1,115200"
770
771endmenu
772
773menu "Bus options"
774
775config SUPERHYWAY
776	tristate "SuperHyway Bus support"
777	depends on CPU_SUBTYPE_SH4_202
778
779config MAPLE
780	bool "Maple Bus support"
781	depends on SH_DREAMCAST
782	help
783	 The Maple Bus is SEGA's serial communication bus for peripherals
784	 on the Dreamcast. Without this bus support you won't be able to
785	 get your Dreamcast keyboard etc to work, so most users
786	 probably want to say 'Y' here, unless you are only using the
787	 Dreamcast with a serial line terminal or a remote network
788	 connection.
789
790endmenu
791
792menu "Power management options (EXPERIMENTAL)"
793
794source "kernel/power/Kconfig"
795
796source "drivers/cpuidle/Kconfig"
797
798endmenu
799