xref: /openbmc/linux/arch/sh/Kconfig (revision aa0dc6a7)
1# SPDX-License-Identifier: GPL-2.0
2config SUPERH
3	def_bool y
4	select ARCH_32BIT_OFF_T
5	select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU
6	select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU
7	select ARCH_HAVE_CUSTOM_GPIO_H
8	select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
9	select ARCH_HAS_BINFMT_FLAT if !MMU
10	select ARCH_HAS_GIGANTIC_PAGE
11	select ARCH_HAS_GCOV_PROFILE_ALL
12	select ARCH_HAS_PTE_SPECIAL
13	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
14	select ARCH_HIBERNATION_POSSIBLE if MMU
15	select ARCH_MIGHT_HAVE_PC_PARPORT
16	select ARCH_WANT_IPC_PARSE_VERSION
17	select CPU_NO_EFFICIENT_FFS
18	select DMA_DECLARE_COHERENT
19	select GENERIC_ATOMIC64
20	select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
21	select GENERIC_IDLE_POLL_SETUP
22	select GENERIC_IRQ_SHOW
23	select GENERIC_PCI_IOMAP if PCI
24	select GENERIC_SCHED_CLOCK
25	select GENERIC_STRNCPY_FROM_USER
26	select GENERIC_STRNLEN_USER
27	select GENERIC_SMP_IDLE_THREAD
28	select GUP_GET_PTE_LOW_HIGH if X2TLB
29	select HAVE_ARCH_AUDITSYSCALL
30	select HAVE_ARCH_KGDB
31	select HAVE_ARCH_SECCOMP_FILTER
32	select HAVE_ARCH_TRACEHOOK
33	select HAVE_DEBUG_BUGVERBOSE
34	select HAVE_DEBUG_KMEMLEAK
35	select HAVE_DYNAMIC_FTRACE
36	select HAVE_FAST_GUP if MMU
37	select HAVE_FUNCTION_GRAPH_TRACER
38	select HAVE_FUNCTION_TRACER
39	select HAVE_FUTEX_CMPXCHG if FUTEX
40	select HAVE_FTRACE_MCOUNT_RECORD
41	select HAVE_HW_BREAKPOINT
42	select HAVE_IDE if HAS_IOPORT_MAP
43	select HAVE_IOREMAP_PROT if MMU && !X2TLB
44	select HAVE_KERNEL_BZIP2
45	select HAVE_KERNEL_GZIP
46	select HAVE_KERNEL_LZMA
47	select HAVE_KERNEL_LZO
48	select HAVE_KERNEL_XZ
49	select HAVE_KPROBES
50	select HAVE_KRETPROBES
51	select HAVE_MIXED_BREAKPOINTS_REGS
52	select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
53	select HAVE_NMI
54	select HAVE_PATA_PLATFORM
55	select HAVE_PERF_EVENTS
56	select HAVE_REGS_AND_STACK_ACCESS_API
57	select HAVE_UID16
58	select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
59	select HAVE_STACKPROTECTOR
60	select HAVE_SYSCALL_TRACEPOINTS
61	select IRQ_FORCED_THREADING
62	select MAY_HAVE_SPARSE_IRQ
63	select MODULES_USE_ELF_RELA
64	select NEED_SG_DMA_LENGTH
65	select NO_DMA if !MMU && !DMA_COHERENT
66	select NO_GENERIC_PCI_IOPORT_MAP if PCI
67	select OLD_SIGACTION
68	select OLD_SIGSUSPEND
69	select PCI_DOMAINS if PCI
70	select PERF_EVENTS
71	select PERF_USE_VMALLOC
72	select RTC_LIB
73	select SET_FS
74	select SPARSE_IRQ
75	help
76	  The SuperH is a RISC processor targeted for use in embedded systems
77	  and consumer electronics; it was also used in the Sega Dreamcast
78	  gaming console.  The SuperH port has a home page at
79	  <http://www.linux-sh.org/>.
80
81config GENERIC_BUG
82	def_bool y
83	depends on BUG
84
85config GENERIC_HWEIGHT
86	def_bool y
87
88config GENERIC_CALIBRATE_DELAY
89	bool
90
91config GENERIC_LOCKBREAK
92	def_bool y
93	depends on SMP && PREEMPTION
94
95config ARCH_SUSPEND_POSSIBLE
96	def_bool n
97
98config ARCH_HIBERNATION_POSSIBLE
99	def_bool n
100
101config SYS_SUPPORTS_APM_EMULATION
102	bool
103	select ARCH_SUSPEND_POSSIBLE
104
105config SYS_SUPPORTS_SMP
106	bool
107
108config SYS_SUPPORTS_NUMA
109	bool
110
111config STACKTRACE_SUPPORT
112	def_bool y
113
114config LOCKDEP_SUPPORT
115	def_bool y
116
117config ARCH_HAS_ILOG2_U32
118	def_bool n
119
120config ARCH_HAS_ILOG2_U64
121	def_bool n
122
123config NO_IOPORT_MAP
124	def_bool !PCI
125	depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
126		   !SH_SOLUTION_ENGINE
127
128config IO_TRAPPED
129	bool
130
131config SWAP_IO_SPACE
132	bool
133
134config DMA_COHERENT
135	bool
136
137config DMA_NONCOHERENT
138	def_bool !NO_DMA && !DMA_COHERENT
139	select ARCH_HAS_DMA_PREP_COHERENT
140	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
141	select DMA_DIRECT_REMAP
142
143config PGTABLE_LEVELS
144	default 3 if X2TLB
145	default 2
146
147menu "System type"
148
149#
150# Processor families
151#
152config CPU_SH2
153	bool
154	select SH_INTC
155
156config CPU_SH2A
157	bool
158	select CPU_SH2
159	select UNCACHED_MAPPING
160
161config CPU_J2
162	bool
163	select CPU_SH2
164	select OF
165	select OF_EARLY_FLATTREE
166
167config CPU_SH3
168	bool
169	select CPU_HAS_INTEVT
170	select CPU_HAS_SR_RB
171	select SH_INTC
172	select SYS_SUPPORTS_SH_TMU
173
174config CPU_SH4
175	bool
176	select ARCH_SUPPORTS_HUGETLBFS if MMU
177	select CPU_HAS_INTEVT
178	select CPU_HAS_SR_RB
179	select CPU_HAS_FPU if !CPU_SH4AL_DSP
180	select SH_INTC
181	select SYS_SUPPORTS_SH_TMU
182
183config CPU_SH4A
184	bool
185	select CPU_SH4
186
187config CPU_SH4AL_DSP
188	bool
189	select CPU_SH4A
190	select CPU_HAS_DSP
191
192config CPU_SHX2
193	bool
194
195config CPU_SHX3
196	bool
197	select DMA_COHERENT
198	select SYS_SUPPORTS_SMP
199	select SYS_SUPPORTS_NUMA
200
201config ARCH_SHMOBILE
202	bool
203	select ARCH_SUSPEND_POSSIBLE
204	select PM
205
206config CPU_HAS_PMU
207       depends on CPU_SH4 || CPU_SH4A
208       default y
209       bool
210
211choice
212	prompt "Processor sub-type selection"
213
214#
215# Processor subtypes
216#
217
218# SH-2 Processor Support
219
220config CPU_SUBTYPE_SH7619
221	bool "Support SH7619 processor"
222	select CPU_SH2
223	select SYS_SUPPORTS_SH_CMT
224
225config CPU_SUBTYPE_J2
226	bool "Support J2 processor"
227	select CPU_J2
228	select SYS_SUPPORTS_SMP
229	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
230
231# SH-2A Processor Support
232
233config CPU_SUBTYPE_SH7201
234	bool "Support SH7201 processor"
235	select CPU_SH2A
236	select CPU_HAS_FPU
237	select SYS_SUPPORTS_SH_MTU2
238
239config CPU_SUBTYPE_SH7203
240	bool "Support SH7203 processor"
241	select CPU_SH2A
242	select CPU_HAS_FPU
243	select SYS_SUPPORTS_SH_CMT
244	select SYS_SUPPORTS_SH_MTU2
245	select PINCTRL
246
247config CPU_SUBTYPE_SH7206
248	bool "Support SH7206 processor"
249	select CPU_SH2A
250	select SYS_SUPPORTS_SH_CMT
251	select SYS_SUPPORTS_SH_MTU2
252
253config CPU_SUBTYPE_SH7263
254	bool "Support SH7263 processor"
255	select CPU_SH2A
256	select CPU_HAS_FPU
257	select SYS_SUPPORTS_SH_CMT
258	select SYS_SUPPORTS_SH_MTU2
259
260config CPU_SUBTYPE_SH7264
261	bool "Support SH7264 processor"
262	select CPU_SH2A
263	select CPU_HAS_FPU
264	select SYS_SUPPORTS_SH_CMT
265	select SYS_SUPPORTS_SH_MTU2
266	select PINCTRL
267
268config CPU_SUBTYPE_SH7269
269	bool "Support SH7269 processor"
270	select CPU_SH2A
271	select CPU_HAS_FPU
272	select SYS_SUPPORTS_SH_CMT
273	select SYS_SUPPORTS_SH_MTU2
274	select PINCTRL
275
276config CPU_SUBTYPE_MXG
277	bool "Support MX-G processor"
278	select CPU_SH2A
279	select SYS_SUPPORTS_SH_MTU2
280	help
281	  Select MX-G if running on an R8A03022BG part.
282
283# SH-3 Processor Support
284
285config CPU_SUBTYPE_SH7705
286	bool "Support SH7705 processor"
287	select CPU_SH3
288
289config CPU_SUBTYPE_SH7706
290	bool "Support SH7706 processor"
291	select CPU_SH3
292	help
293	  Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
294
295config CPU_SUBTYPE_SH7707
296	bool "Support SH7707 processor"
297	select CPU_SH3
298	help
299	  Select SH7707 if you have a  60 Mhz SH-3 HD6417707 CPU.
300
301config CPU_SUBTYPE_SH7708
302	bool "Support SH7708 processor"
303	select CPU_SH3
304	help
305	  Select SH7708 if you have a  60 Mhz SH-3 HD6417708S or
306	  if you have a 100 Mhz SH-3 HD6417708R CPU.
307
308config CPU_SUBTYPE_SH7709
309	bool "Support SH7709 processor"
310	select CPU_SH3
311	help
312	  Select SH7709 if you have a  80 Mhz SH-3 HD6417709 CPU.
313
314config CPU_SUBTYPE_SH7710
315	bool "Support SH7710 processor"
316	select CPU_SH3
317	select CPU_HAS_DSP
318	help
319	  Select SH7710 if you have a SH3-DSP SH7710 CPU.
320
321config CPU_SUBTYPE_SH7712
322	bool "Support SH7712 processor"
323	select CPU_SH3
324	select CPU_HAS_DSP
325	help
326	  Select SH7712 if you have a SH3-DSP SH7712 CPU.
327
328config CPU_SUBTYPE_SH7720
329	bool "Support SH7720 processor"
330	select CPU_SH3
331	select CPU_HAS_DSP
332	select SYS_SUPPORTS_SH_CMT
333	select USB_OHCI_SH if USB_OHCI_HCD
334	select PINCTRL
335	help
336	  Select SH7720 if you have a SH3-DSP SH7720 CPU.
337
338config CPU_SUBTYPE_SH7721
339	bool "Support SH7721 processor"
340	select CPU_SH3
341	select CPU_HAS_DSP
342	select SYS_SUPPORTS_SH_CMT
343	select USB_OHCI_SH if USB_OHCI_HCD
344	help
345	  Select SH7721 if you have a SH3-DSP SH7721 CPU.
346
347# SH-4 Processor Support
348
349config CPU_SUBTYPE_SH7750
350	bool "Support SH7750 processor"
351	select CPU_SH4
352	help
353	  Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
354
355config CPU_SUBTYPE_SH7091
356	bool "Support SH7091 processor"
357	select CPU_SH4
358	help
359	  Select SH7091 if you have an SH-4 based Sega device (such as
360	  the Dreamcast, Naomi, and Naomi 2).
361
362config CPU_SUBTYPE_SH7750R
363	bool "Support SH7750R processor"
364	select CPU_SH4
365
366config CPU_SUBTYPE_SH7750S
367	bool "Support SH7750S processor"
368	select CPU_SH4
369
370config CPU_SUBTYPE_SH7751
371	bool "Support SH7751 processor"
372	select CPU_SH4
373	help
374	  Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
375	  or if you have a HD6417751R CPU.
376
377config CPU_SUBTYPE_SH7751R
378	bool "Support SH7751R processor"
379	select CPU_SH4
380
381config CPU_SUBTYPE_SH7760
382	bool "Support SH7760 processor"
383	select CPU_SH4
384
385config CPU_SUBTYPE_SH4_202
386	bool "Support SH4-202 processor"
387	select CPU_SH4
388
389# SH-4A Processor Support
390
391config CPU_SUBTYPE_SH7723
392	bool "Support SH7723 processor"
393	select CPU_SH4A
394	select CPU_SHX2
395	select ARCH_SHMOBILE
396	select ARCH_SPARSEMEM_ENABLE
397	select SYS_SUPPORTS_SH_CMT
398	select PINCTRL
399	help
400	  Select SH7723 if you have an SH-MobileR2 CPU.
401
402config CPU_SUBTYPE_SH7724
403	bool "Support SH7724 processor"
404	select CPU_SH4A
405	select CPU_SHX2
406	select ARCH_SHMOBILE
407	select ARCH_SPARSEMEM_ENABLE
408	select SYS_SUPPORTS_SH_CMT
409	select PINCTRL
410	help
411	  Select SH7724 if you have an SH-MobileR2R CPU.
412
413config CPU_SUBTYPE_SH7734
414	bool "Support SH7734 processor"
415	select CPU_SH4A
416	select CPU_SHX2
417	select PINCTRL
418	help
419	  Select SH7734 if you have a SH4A SH7734 CPU.
420
421config CPU_SUBTYPE_SH7757
422	bool "Support SH7757 processor"
423	select CPU_SH4A
424	select CPU_SHX2
425	select PINCTRL
426	help
427	  Select SH7757 if you have a SH4A SH7757 CPU.
428
429config CPU_SUBTYPE_SH7763
430	bool "Support SH7763 processor"
431	select CPU_SH4A
432	select USB_OHCI_SH if USB_OHCI_HCD
433	help
434	  Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
435
436config CPU_SUBTYPE_SH7770
437	bool "Support SH7770 processor"
438	select CPU_SH4A
439
440config CPU_SUBTYPE_SH7780
441	bool "Support SH7780 processor"
442	select CPU_SH4A
443
444config CPU_SUBTYPE_SH7785
445	bool "Support SH7785 processor"
446	select CPU_SH4A
447	select CPU_SHX2
448	select ARCH_SPARSEMEM_ENABLE
449	select SYS_SUPPORTS_NUMA
450	select PINCTRL
451
452config CPU_SUBTYPE_SH7786
453	bool "Support SH7786 processor"
454	select CPU_SH4A
455	select CPU_SHX3
456	select CPU_HAS_PTEAEX
457	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
458	select USB_OHCI_SH if USB_OHCI_HCD
459	select USB_EHCI_SH if USB_EHCI_HCD
460	select PINCTRL
461
462config CPU_SUBTYPE_SHX3
463	bool "Support SH-X3 processor"
464	select CPU_SH4A
465	select CPU_SHX3
466	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
467	select GPIOLIB
468	select PINCTRL
469
470# SH4AL-DSP Processor Support
471
472config CPU_SUBTYPE_SH7343
473	bool "Support SH7343 processor"
474	select CPU_SH4AL_DSP
475	select ARCH_SHMOBILE
476	select SYS_SUPPORTS_SH_CMT
477
478config CPU_SUBTYPE_SH7722
479	bool "Support SH7722 processor"
480	select CPU_SH4AL_DSP
481	select CPU_SHX2
482	select ARCH_SHMOBILE
483	select ARCH_SPARSEMEM_ENABLE
484	select SYS_SUPPORTS_NUMA
485	select SYS_SUPPORTS_SH_CMT
486	select PINCTRL
487
488config CPU_SUBTYPE_SH7366
489	bool "Support SH7366 processor"
490	select CPU_SH4AL_DSP
491	select CPU_SHX2
492	select ARCH_SHMOBILE
493	select ARCH_SPARSEMEM_ENABLE
494	select SYS_SUPPORTS_NUMA
495	select SYS_SUPPORTS_SH_CMT
496
497endchoice
498
499source "arch/sh/mm/Kconfig"
500
501source "arch/sh/Kconfig.cpu"
502
503source "arch/sh/boards/Kconfig"
504
505menu "Timer and clock configuration"
506
507config SH_PCLK_FREQ
508	int "Peripheral clock frequency (in Hz)"
509	depends on SH_CLK_CPG_LEGACY
510	default "31250000" if CPU_SUBTYPE_SH7619
511	default "33333333" if CPU_SUBTYPE_SH7770 || \
512			      CPU_SUBTYPE_SH7760 || \
513			      CPU_SUBTYPE_SH7705 || \
514			      CPU_SUBTYPE_SH7203 || \
515			      CPU_SUBTYPE_SH7206 || \
516			      CPU_SUBTYPE_SH7263 || \
517			      CPU_SUBTYPE_MXG
518	default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
519	default "66000000" if CPU_SUBTYPE_SH4_202
520	default "50000000"
521	help
522	  This option is used to specify the peripheral clock frequency.
523	  This is necessary for determining the reference clock value on
524	  platforms lacking an RTC.
525
526config SH_CLK_CPG
527	def_bool y
528
529config SH_CLK_CPG_LEGACY
530	depends on SH_CLK_CPG
531	def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
532		      !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
533		      !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
534		      !CPU_SUBTYPE_SH7269
535
536endmenu
537
538menu "CPU Frequency scaling"
539source "drivers/cpufreq/Kconfig"
540endmenu
541
542source "arch/sh/drivers/Kconfig"
543
544endmenu
545
546menu "Kernel features"
547
548source "kernel/Kconfig.hz"
549
550config KEXEC
551	bool "kexec system call (EXPERIMENTAL)"
552	depends on MMU
553	select KEXEC_CORE
554	help
555	  kexec is a system call that implements the ability to shutdown your
556	  current kernel, and to start another kernel.  It is like a reboot
557	  but it is independent of the system firmware.  And like a reboot
558	  you can start any kernel with it, not just Linux.
559
560	  The name comes from the similarity to the exec system call.
561
562	  It is an ongoing process to be certain the hardware in a machine
563	  is properly shutdown, so do not be surprised if this code does not
564	  initially work for you.  As of this writing the exact hardware
565	  interface is strongly in flux, so no good recommendation can be
566	  made.
567
568config CRASH_DUMP
569	bool "kernel crash dumps (EXPERIMENTAL)"
570	depends on BROKEN_ON_SMP
571	help
572	  Generate crash dump after being started by kexec.
573	  This should be normally only set in special crash dump kernels
574	  which are loaded in the main kernel with kexec-tools into
575	  a specially reserved region and then later executed after
576	  a crash by kdump/kexec. The crash dump kernel must be compiled
577	  to a memory address not used by the main kernel using
578	  PHYSICAL_START.
579
580	  For more details see Documentation/admin-guide/kdump/kdump.rst
581
582config KEXEC_JUMP
583	bool "kexec jump (EXPERIMENTAL)"
584	depends on KEXEC && HIBERNATION
585	help
586	  Jump between original kernel and kexeced kernel and invoke
587	  code via KEXEC
588
589config PHYSICAL_START
590	hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
591	default MEMORY_START
592	help
593	  This gives the physical address where the kernel is loaded
594	  and is ordinarily the same as MEMORY_START.
595
596	  Different values are primarily used in the case of kexec on panic
597	  where the fail safe kernel needs to run at a different address
598	  than the panic-ed kernel.
599
600config SMP
601	bool "Symmetric multi-processing support"
602	depends on SYS_SUPPORTS_SMP
603	help
604	  This enables support for systems with more than one CPU. If you have
605	  a system with only one CPU, say N. If you have a system with more
606	  than one CPU, say Y.
607
608	  If you say N here, the kernel will run on uni- and multiprocessor
609	  machines, but will use only one CPU of a multiprocessor machine. If
610	  you say Y here, the kernel will run on many, but not all,
611	  uniprocessor machines. On a uniprocessor machine, the kernel
612	  will run faster if you say N here.
613
614	  People using multiprocessor machines who say Y here should also say
615	  Y to "Enhanced Real Time Clock Support", below.
616
617	  See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
618	  available at <https://www.tldp.org/docs.html#howto>.
619
620	  If you don't know what to do here, say N.
621
622config NR_CPUS
623	int "Maximum number of CPUs (2-32)"
624	range 2 32
625	depends on SMP
626	default "4" if CPU_SUBTYPE_SHX3
627	default "2"
628	help
629	  This allows you to specify the maximum number of CPUs which this
630	  kernel will support.  The maximum supported value is 32 and the
631	  minimum value which makes sense is 2.
632
633	  This is purely to save memory - each supported CPU adds
634	  approximately eight kilobytes to the kernel image.
635
636config HOTPLUG_CPU
637	bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
638	depends on SMP
639	help
640	  Say Y here to experiment with turning CPUs off and on.  CPUs
641	  can be controlled through /sys/devices/system/cpu.
642
643config GUSA
644	def_bool y
645	depends on !SMP
646	help
647	  This enables support for gUSA (general UserSpace Atomicity).
648	  This is the default implementation for both UP and non-ll/sc
649	  CPUs, and is used by the libc, amongst others.
650
651	  For additional information, design information can be found
652	  in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
653
654	  This should only be disabled for special cases where alternate
655	  atomicity implementations exist.
656
657config GUSA_RB
658	bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
659	depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
660	help
661	  Enabling this option will allow the kernel to implement some
662	  atomic operations using a software implementation of load-locked/
663	  store-conditional (LLSC). On machines which do not have hardware
664	  LLSC, this should be more efficient than the other alternative of
665	  disabling interrupts around the atomic sequence.
666
667config HW_PERF_EVENTS
668	bool "Enable hardware performance counter support for perf events"
669	depends on PERF_EVENTS && CPU_HAS_PMU
670	default y
671	help
672	  Enable hardware performance counter support for perf events. If
673	  disabled, perf events will use software events only.
674
675source "drivers/sh/Kconfig"
676
677endmenu
678
679menu "Boot options"
680
681config USE_BUILTIN_DTB
682	bool "Use builtin DTB"
683	default n
684	depends on SH_DEVICE_TREE
685	help
686	  Link a device tree blob for particular hardware into the kernel,
687	  suppressing use of the DTB pointer provided by the bootloader.
688	  This option should only be used with legacy bootloaders that are
689	  not capable of providing a DTB to the kernel, or for experimental
690	  hardware without stable device tree bindings.
691
692config BUILTIN_DTB_SOURCE
693	string "Source file for builtin DTB"
694	default ""
695	depends on USE_BUILTIN_DTB
696	help
697	  Base name (without suffix, relative to arch/sh/boot/dts) for the
698	  a DTS file that will be used to produce the DTB linked into the
699	  kernel.
700
701config ZERO_PAGE_OFFSET
702	hex
703	default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
704				SH_7751_SOLUTION_ENGINE
705	default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
706	default "0x00002000" if PAGE_SIZE_8KB
707	default "0x00001000"
708	help
709	  This sets the default offset of zero page.
710
711config BOOT_LINK_OFFSET
712	hex
713	default "0x00210000" if SH_SHMIN
714	default "0x00810000" if SH_7780_SOLUTION_ENGINE
715	default "0x009e0000" if SH_TITAN
716	default "0x01800000" if SH_SDK7780
717	default "0x02000000" if SH_EDOSK7760
718	default "0x00800000"
719	help
720	  This option allows you to set the link address offset of the zImage.
721	  This can be useful if you are on a board which has a small amount of
722	  memory.
723
724config ENTRY_OFFSET
725	hex
726	default "0x00001000" if PAGE_SIZE_4KB
727	default "0x00002000" if PAGE_SIZE_8KB
728	default "0x00004000" if PAGE_SIZE_16KB
729	default "0x00010000" if PAGE_SIZE_64KB
730	default "0x00000000"
731
732config ROMIMAGE_MMCIF
733	bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
734	depends on CPU_SUBTYPE_SH7724
735	help
736	  Say Y here to include experimental MMCIF loading code in
737	  romImage. With this enabled it is possible to write the romImage
738	  kernel image to an MMC card and boot the kernel straight from
739	  the reset vector. At reset the processor Mask ROM will load the
740	  first part of the romImage which in turn loads the rest the kernel
741	  image to RAM using the MMCIF hardware block.
742
743choice
744	prompt "Kernel command line"
745	optional
746	default CMDLINE_OVERWRITE
747	help
748	  Setting this option allows the kernel command line arguments
749	  to be set.
750
751config CMDLINE_OVERWRITE
752	bool "Overwrite bootloader kernel arguments"
753	help
754	  Given string will overwrite any arguments passed in by
755	  a bootloader.
756
757config CMDLINE_EXTEND
758	bool "Extend bootloader kernel arguments"
759	help
760	  Given string will be concatenated with arguments passed in
761	  by a bootloader.
762
763endchoice
764
765config CMDLINE
766	string "Kernel command line arguments string"
767	depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
768	default "console=ttySC1,115200"
769
770endmenu
771
772menu "Bus options"
773
774config SUPERHYWAY
775	tristate "SuperHyway Bus support"
776	depends on CPU_SUBTYPE_SH4_202
777
778config MAPLE
779	bool "Maple Bus support"
780	depends on SH_DREAMCAST
781	help
782	 The Maple Bus is SEGA's serial communication bus for peripherals
783	 on the Dreamcast. Without this bus support you won't be able to
784	 get your Dreamcast keyboard etc to work, so most users
785	 probably want to say 'Y' here, unless you are only using the
786	 Dreamcast with a serial line terminal or a remote network
787	 connection.
788
789endmenu
790
791menu "Power management options (EXPERIMENTAL)"
792
793source "kernel/power/Kconfig"
794
795source "drivers/cpuidle/Kconfig"
796
797endmenu
798