xref: /openbmc/linux/arch/sh/Kconfig (revision 4f3865fb) 
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux/SuperH Kernel Configuration"
7
8config SUPERH
9	bool
10	default y
11	help
12	  The SuperH is a RISC processor targeted for use in embedded systems
13	  and consumer electronics; it was also used in the Sega Dreamcast
14	  gaming console.  The SuperH port has a home page at
15	  <http://www.linux-sh.org/>.
16
17config RWSEM_GENERIC_SPINLOCK
18	bool
19	default y
20
21config RWSEM_XCHGADD_ALGORITHM
22	bool
23
24config GENERIC_FIND_NEXT_BIT
25	bool
26	default y
27
28config GENERIC_HWEIGHT
29	bool
30	default y
31
32config GENERIC_HARDIRQS
33	bool
34	default y
35
36config GENERIC_IRQ_PROBE
37	bool
38	default y
39
40config GENERIC_CALIBRATE_DELAY
41	bool
42	default y
43
44config GENERIC_IOMAP
45	bool
46
47config ARCH_MAY_HAVE_PC_FDC
48	bool
49
50source "init/Kconfig"
51
52menu "System type"
53
54choice
55	prompt "SuperH system type"
56	default SH_UNKNOWN
57
58config SH_SOLUTION_ENGINE
59	bool "SolutionEngine"
60	help
61	  Select SolutionEngine if configuring for a Hitachi SH7709
62	  or SH7750 evaluation board.
63
64config SH_7751_SOLUTION_ENGINE
65	bool "SolutionEngine7751"
66	select CPU_SUBTYPE_SH7751
67	help
68	  Select 7751 SolutionEngine if configuring for a Hitachi SH7751
69	  evaluation board.
70
71config SH_7300_SOLUTION_ENGINE
72	bool "SolutionEngine7300"
73	select CPU_SUBTYPE_SH7300
74	help
75	  Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
76	  evaluation board.
77
78config SH_73180_SOLUTION_ENGINE
79       bool "SolutionEngine73180"
80       select CPU_SUBTYPE_SH73180
81       help
82         Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3)
83         evaluation board.
84
85config SH_7751_SYSTEMH
86	bool "SystemH7751R"
87	select CPU_SUBTYPE_SH7751R
88	help
89	  Select SystemH if you are configuring for a Renesas SystemH
90	  7751R evaluation board.
91
92config SH_STB1_HARP
93	bool "STB1_Harp"
94
95config SH_STB1_OVERDRIVE
96	bool "STB1_Overdrive"
97
98config SH_HP6XX
99	bool "HP6XX"
100	help
101	  Select HP6XX if configuring for a HP jornada HP6xx.
102	  More information (hardware only) at
103	  <http://www.hp.com/jornada/>.
104
105config SH_CQREEK
106	bool "CqREEK"
107	help
108	  Select CqREEK if configuring for a CqREEK SH7708 or SH7750.
109	  More information at
110	  <http://sources.redhat.com/ecos/hardware.html#SuperH>.
111
112config SH_DMIDA
113	bool "DMIDA"
114	help
115	  Select DMIDA if configuring for a DataMyte 4000 Industrial
116	  Digital Assistant. More information at <http://www.dmida.com/>.
117
118config SH_EC3104
119	bool "EC3104"
120	help
121	  Select EC3104 if configuring for a system with an Eclipse
122	  International EC3104 chip, e.g. the Harris AD2000.
123
124config SH_SATURN
125	bool "Saturn"
126	select CPU_SUBTYPE_SH7604
127	help
128	  Select Saturn if configuring for a SEGA Saturn.
129
130config SH_DREAMCAST
131	bool "Dreamcast"
132	select CPU_SUBTYPE_SH7091
133	help
134	  Select Dreamcast if configuring for a SEGA Dreamcast.
135	  More information at
136	  <http://www.m17n.org/linux-sh/dreamcast/>.  There is a
137	  Dreamcast project is at <http://linuxdc.sourceforge.net/>.
138
139config SH_CAT68701
140	bool "CAT68701"
141
142config SH_BIGSUR
143	bool "BigSur"
144
145config SH_SH2000
146	bool "SH2000"
147	select CPU_SUBTYPE_SH7709
148	help
149	  SH-2000 is a single-board computer based around SH7709A chip
150	  intended for embedded applications.
151	  It has an Ethernet interface (CS8900A), direct connected
152	  Compact Flash socket, three serial ports and PC-104 bus.
153	  More information at <http://sh2000.sh-linux.org>.
154
155config SH_ADX
156	bool "ADX"
157
158config SH_MPC1211
159	bool "Interface MPC1211"
160	help
161	  CTP/PCI-SH02 is a CPU module computer that is produced
162	  by Interface Corporation.
163	  More information at <http://www.interface.co.jp>
164
165config SH_SH03
166	bool "Interface CTP/PCI-SH03"
167	help
168	  CTP/PCI-SH03 is a CPU module computer that is produced
169	  by Interface Corporation.
170	  More information at <http://www.interface.co.jp>
171
172config SH_SECUREEDGE5410
173	bool "SecureEdge5410"
174	select CPU_SUBTYPE_SH7751R
175	help
176	  Select SecureEdge5410 if configuring for a SnapGear SH board.
177	  This includes both the OEM SecureEdge products as well as the
178	  SME product line.
179
180config SH_HS7751RVOIP
181	bool "HS7751RVOIP"
182	select CPU_SUBTYPE_SH7751R
183	help
184	  Select HS7751RVOIP if configuring for a Renesas Technology
185	  Sales VoIP board.
186
187config SH_RTS7751R2D
188	bool "RTS7751R2D"
189	select CPU_SUBTYPE_SH7751R
190	help
191	  Select RTS7751R2D if configuring for a Renesas Technology
192	  Sales SH-Graphics board.
193
194config SH_R7780RP
195	bool "R7780RP-1"
196	select CPU_SUBTYPE_SH7780
197	help
198	  Select R7780RP-1 if configuring for a Renesas Solutions
199	  HIGHLANDER board.
200
201config SH_EDOSK7705
202	bool "EDOSK7705"
203	select CPU_SUBTYPE_SH7705
204
205config SH_SH4202_MICRODEV
206	bool "SH4-202 MicroDev"
207	select CPU_SUBTYPE_SH4_202
208	help
209	  Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
210	  with an SH4-202 CPU.
211
212config SH_LANDISK
213	bool "LANDISK"
214	select CPU_SUBTYPE_SH7751R
215	help
216	  I-O DATA DEVICE, INC. "LANDISK Series" support.
217
218config SH_TITAN
219	bool "TITAN"
220	select CPU_SUBTYPE_SH7751R
221	help
222	  Select Titan if you are configuring for a Nimble Microsystems
223	  NetEngine NP51R.
224
225config SH_UNKNOWN
226	bool "BareCPU"
227	help
228	  "Bare CPU" aka "unknown" means an SH-based system which is not one
229	  of the specific ones mentioned above, which means you need to enter
230	  all sorts of stuff like CONFIG_MEMORY_START because the config
231	  system doesn't already know what it is.  You get a machine vector
232	  without any platform-specific code in it, so things like the RTC may
233	  not work.
234
235	  This option is for the early stages of porting to a new machine.
236
237endchoice
238
239source "arch/sh/mm/Kconfig"
240
241config MEMORY_START
242	hex "Physical memory start address"
243	default "0x08000000"
244	---help---
245	  Computers built with Hitachi SuperH processors always
246	  map the ROM starting at address zero.  But the processor
247	  does not specify the range that RAM takes.
248
249	  The physical memory (RAM) start address will be automatically
250	  set to 08000000. Other platforms, such as the Solution Engine
251	  boards typically map RAM at 0C000000.
252
253	  Tweak this only when porting to a new machine which does not
254	  already have a defconfig. Changing it from the known correct
255	  value on any of the known systems will only lead to disaster.
256
257config MEMORY_SIZE
258	hex "Physical memory size"
259	default "0x00400000"
260	help
261	  This sets the default memory size assumed by your SH kernel. It can
262	  be overridden as normal by the 'mem=' argument on the kernel command
263	  line. If unsure, consult your board specifications or just leave it
264	  as 0x00400000 which was the default value before this became
265	  configurable.
266
267config CF_ENABLER
268	bool "Compact Flash Enabler support"
269	depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03
270	---help---
271	  Compact Flash is a small, removable mass storage device introduced
272	  in 1994 originally as a PCMCIA device.  If you say `Y' here, you
273	  compile in support for Compact Flash devices directly connected to
274	  a SuperH processor.  A Compact Flash FAQ is available at
275	  <http://www.compactflash.org/faqs/faq.htm>.
276
277	  If your board has "Directly Connected" CompactFlash at area 5 or 6,
278	  you may want to enable this option.  Then, you can use CF as
279	  primary IDE drive (only tested for SanDisk).
280
281	  If in doubt, select 'N'.
282
283choice
284	prompt "Compact Flash Connection Area"
285	depends on CF_ENABLER
286	default CF_AREA6
287
288config CF_AREA5
289	bool "Area5"
290	help
291	  If your board has "Directly Connected" CompactFlash, You should
292	  select the area where your CF is connected to.
293
294	  - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
295	  - "Area6" if it is connected to Area 6 (0x18000000)
296
297	  "Area6" will work for most boards. For ADX, select "Area5".
298
299config CF_AREA6
300	bool "Area6"
301
302endchoice
303
304config CF_BASE_ADDR
305	hex
306	depends on CF_ENABLER
307	default "0xb8000000" if CF_AREA6
308	default "0xb4000000" if CF_AREA5
309
310menu "Processor features"
311
312config CPU_LITTLE_ENDIAN
313	bool "Little Endian"
314	help
315	  Some SuperH machines can be configured for either little or big
316	  endian byte order. These modes require different kernels. Say Y if
317	  your machine is little endian, N if it's a big endian machine.
318
319# The SH7750 RTC module is disabled in the Dreamcast
320config SH_RTC
321	bool
322	depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \
323		   !SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \
324		   !SH_R7780RP
325	default y
326	help
327	  Selecting this option will allow the Linux kernel to emulate
328	  PC's RTC.
329
330	  If unsure, say N.
331
332config SH_FPU
333	bool "FPU support"
334	depends on !CPU_SH3
335	default y
336	help
337	  Selecting this option will enable support for SH processors that
338	  have FPU units (ie, SH77xx).
339
340	  This option must be set in order to enable the FPU.
341
342config SH_DSP
343	bool "DSP support"
344	depends on !CPU_SH4
345	default y
346	help
347	  Selecting this option will enable support for SH processors that
348	  have DSP units (ie, SH2-DSP and SH3-DSP). It is safe to say Y here
349	  by default, as the existance of the DSP will be probed at runtime.
350
351	  This option must be set in order to enable the DSP.
352
353config SH_ADC
354	bool "ADC support"
355	depends on CPU_SH3
356	default y
357	help
358	  Selecting this option will allow the Linux kernel to use SH3 on-chip
359	  ADC module.
360
361	  If unsure, say N.
362
363config SH_STORE_QUEUES
364	bool "Support for Store Queues"
365	depends on CPU_SH4
366	help
367	  Selecting this option will enable an in-kernel API for manipulating
368	  the store queues integrated in the SH-4 processors.
369
370config CPU_HAS_INTEVT
371	bool
372
373config CPU_HAS_PINT_IRQ
374	bool
375
376config CPU_HAS_INTC2_IRQ
377	bool
378
379config CPU_HAS_SR_RB
380	bool "CPU has SR.RB"
381	depends on CPU_SH3 || CPU_SH4
382	default y
383	help
384	  This will enable the use of SR.RB register bank usage. Processors
385	  that are lacking this bit must have another method in place for
386	  accomplishing what is taken care of by the banked registers.
387
388	  See <file:Documentation/sh/register-banks.txt> for further
389	  information on SR.RB and register banking in the kernel in general.
390
391endmenu
392
393menu "Timer support"
394
395config SH_TMU
396	bool "TMU timer support"
397	default y
398	help
399	  This enables the use of the TMU as the system timer.
400
401endmenu
402
403#source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
404
405#source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
406
407config SH_PCLK_FREQ
408	int "Peripheral clock frequency (in Hz)"
409	default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
410	default "60000000" if CPU_SUBTYPE_SH7751
411	default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760
412	default "27000000" if CPU_SUBTYPE_SH73180
413	default "66000000" if CPU_SUBTYPE_SH4_202
414	help
415	  This option is used to specify the peripheral clock frequency.
416	  This is necessary for determining the reference clock value on
417	  platforms lacking an RTC.
418
419menu "CPU Frequency scaling"
420
421source "drivers/cpufreq/Kconfig"
422
423config SH_CPU_FREQ
424	tristate "SuperH CPU Frequency driver"
425	depends on CPU_FREQ
426	select CPU_FREQ_TABLE
427	help
428	  This adds the cpufreq driver for SuperH. At present, only
429	  the SH-4 is supported.
430
431	  For details, take a look at <file:Documentation/cpu-freq>.
432
433	  If unsure, say N.
434
435endmenu
436
437source "arch/sh/drivers/dma/Kconfig"
438
439source "arch/sh/cchips/Kconfig"
440
441config HEARTBEAT
442	bool "Heartbeat LED"
443	depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || \
444		   SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || \
445		   SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \
446		   SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \
447		   SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
448	help
449	  Use the power-on LED on your machine as a load meter.  The exact
450	  behavior is platform-dependent, but normally the flash frequency is
451	  a hyperbolic function of the 5-minute load average.
452
453endmenu
454
455config ISA_DMA_API
456	bool
457	depends on SH_MPC1211
458	default y
459
460menu "Kernel features"
461
462config KEXEC
463	bool "kexec system call (EXPERIMENTAL)"
464	depends on EXPERIMENTAL
465	help
466	  kexec is a system call that implements the ability to shutdown your
467	  current kernel, and to start another kernel.  It is like a reboot
468	  but it is indepedent of the system firmware.  And like a reboot
469	  you can start any kernel with it, not just Linux.
470
471	  The name comes from the similiarity to the exec system call.
472
473	  It is an ongoing process to be certain the hardware in a machine
474	  is properly shutdown, so do not be surprised if this code does not
475	  initially work for you.  It may help to enable device hotplugging
476	  support.  As of this writing the exact hardware interface is
477	  strongly in flux, so no good recommendation can be made.
478
479config PREEMPT
480	bool "Preemptible Kernel (EXPERIMENTAL)"
481	depends on EXPERIMENTAL
482
483config SMP
484	bool "Symmetric multi-processing support"
485	---help---
486	  This enables support for systems with more than one CPU. If you have
487	  a system with only one CPU, like most personal computers, say N. If
488	  you have a system with more than one CPU, say Y.
489
490	  If you say N here, the kernel will run on single and multiprocessor
491	  machines, but will use only one CPU of a multiprocessor machine. If
492	  you say Y here, the kernel will run on many, but not all,
493	  singleprocessor machines. On a singleprocessor machine, the kernel
494	  will run faster if you say N here.
495
496	  People using multiprocessor machines who say Y here should also say
497	  Y to "Enhanced Real Time Clock Support", below.
498
499	  See also the <file:Documentation/smp.txt>,
500	  <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
501	  at <http://www.tldp.org/docs.html#howto>.
502
503	  If you don't know what to do here, say N.
504
505config NR_CPUS
506	int "Maximum number of CPUs (2-32)"
507	range 2 32
508	depends on SMP
509	default "2"
510	help
511	  This allows you to specify the maximum number of CPUs which this
512	  kernel will support.  The maximum supported value is 32 and the
513	  minimum value which makes sense is 2.
514
515	  This is purely to save memory - each supported CPU adds
516	  approximately eight kilobytes to the kernel image.
517
518config CPU_HAS_SR_RB
519	bool "CPU has SR.RB"
520	depends on CPU_SH3 || CPU_SH4
521	default y
522	help
523	  This will enable the use of SR.RB register bank usage. Processors
524	  that are lacking this bit must have another method in place for
525	  accomplishing what is taken care of by the banked registers.
526
527	  See <file:Documentation/sh/register-banks.txt> for further
528	  information on SR.RB and register banking in the kernel in general.
529
530config NODES_SHIFT
531	int
532	default "1"
533	depends on NEED_MULTIPLE_NODES
534
535endmenu
536
537menu "Boot options"
538
539config ZERO_PAGE_OFFSET
540	hex "Zero page offset"
541	default "0x00004000" if SH_MPC1211 || SH_SH03
542	default "0x00001000"
543	help
544	  This sets the default offset of zero page.
545
546config BOOT_LINK_OFFSET
547	hex "Link address offset for booting"
548	default "0x00800000"
549	help
550	  This option allows you to set the link address offset of the zImage.
551	  This can be useful if you are on a board which has a small amount of
552	  memory.
553
554config UBC_WAKEUP
555	bool "Wakeup UBC on startup"
556	help
557	  Selecting this option will wakeup the User Break Controller (UBC) on
558	  startup. Although the UBC is left in an awake state when the processor
559	  comes up, some boot loaders misbehave by putting the UBC to sleep in a
560	  power saving state, which causes issues with things like ptrace().
561
562	  If unsure, say N.
563
564config CMDLINE_BOOL
565	bool "Default bootloader kernel arguments"
566
567config CMDLINE
568	string "Initial kernel command string"
569	depends on CMDLINE_BOOL
570	default "console=ttySC1,115200"
571
572endmenu
573
574menu "Bus options"
575
576# Even on SuperH devices which don't have an ISA bus,
577# this variable helps the PCMCIA modules handle
578# IRQ requesting properly -- Greg Banks.
579#
580# Though we're generally not interested in it when
581# we're not using PCMCIA, so we make it dependent on
582# PCMCIA outright. -- PFM.
583config ISA
584	bool
585	default y if PCMCIA
586	help
587	  Find out whether you have ISA slots on your motherboard.  ISA is the
588	  name of a bus system, i.e. the way the CPU talks to the other stuff
589	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
590	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
591	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
592
593config EISA
594	bool
595	---help---
596	  The Extended Industry Standard Architecture (EISA) bus was
597	  developed as an open alternative to the IBM MicroChannel bus.
598
599	  The EISA bus provided some of the features of the IBM MicroChannel
600	  bus while maintaining backward compatibility with cards made for
601	  the older ISA bus.  The EISA bus saw limited use between 1988 and
602	  1995 when it was made obsolete by the PCI bus.
603
604	  Say Y here if you are building a kernel for an EISA-based machine.
605
606	  Otherwise, say N.
607
608config MCA
609	bool
610	help
611	  MicroChannel Architecture is found in some IBM PS/2 machines and
612	  laptops.  It is a bus system similar to PCI or ISA. See
613	  <file:Documentation/mca.txt> (and especially the web page given
614	  there) before attempting to build an MCA bus kernel.
615
616config SBUS
617	bool
618
619config SUPERHYWAY
620	tristate "SuperHyway Bus support"
621	depends on CPU_SUBTYPE_SH4_202
622
623source "arch/sh/drivers/pci/Kconfig"
624
625source "drivers/pci/Kconfig"
626
627source "drivers/pcmcia/Kconfig"
628
629source "drivers/pci/hotplug/Kconfig"
630
631endmenu
632
633menu "Executable file formats"
634
635source "fs/Kconfig.binfmt"
636
637endmenu
638
639source "net/Kconfig"
640
641source "drivers/Kconfig"
642
643source "fs/Kconfig"
644
645source "arch/sh/oprofile/Kconfig"
646
647source "arch/sh/Kconfig.debug"
648
649source "security/Kconfig"
650
651source "crypto/Kconfig"
652
653source "lib/Kconfig"
654