1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright IBM Corp. 2012 4 * 5 * Author(s): 6 * Jan Glauber <jang@linux.vnet.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "zpci" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/compat.h> 13 #include <linux/kernel.h> 14 #include <linux/miscdevice.h> 15 #include <linux/slab.h> 16 #include <linux/err.h> 17 #include <linux/delay.h> 18 #include <linux/pci.h> 19 #include <linux/uaccess.h> 20 #include <asm/pci_debug.h> 21 #include <asm/pci_clp.h> 22 #include <asm/clp.h> 23 #include <uapi/asm/clp.h> 24 25 bool zpci_unique_uid; 26 27 void update_uid_checking(bool new) 28 { 29 if (zpci_unique_uid != new) 30 zpci_dbg(1, "uid checking:%d\n", new); 31 32 zpci_unique_uid = new; 33 } 34 35 static inline void zpci_err_clp(unsigned int rsp, int rc) 36 { 37 struct { 38 unsigned int rsp; 39 int rc; 40 } __packed data = {rsp, rc}; 41 42 zpci_err_hex(&data, sizeof(data)); 43 } 44 45 /* 46 * Call Logical Processor with c=1, lps=0 and command 1 47 * to get the bit mask of installed logical processors 48 */ 49 static inline int clp_get_ilp(unsigned long *ilp) 50 { 51 unsigned long mask; 52 int cc = 3; 53 54 asm volatile ( 55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n" 56 "0: ipm %[cc]\n" 57 " srl %[cc],28\n" 58 "1:\n" 59 EX_TABLE(0b, 1b) 60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1) 61 : "cc"); 62 *ilp = mask; 63 return cc; 64 } 65 66 /* 67 * Call Logical Processor with c=0, the give constant lps and an lpcb request. 68 */ 69 static __always_inline int clp_req(void *data, unsigned int lps) 70 { 71 struct { u8 _[CLP_BLK_SIZE]; } *req = data; 72 u64 ignored; 73 int cc = 3; 74 75 asm volatile ( 76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n" 77 "0: ipm %[cc]\n" 78 " srl %[cc],28\n" 79 "1:\n" 80 EX_TABLE(0b, 1b) 81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req) 82 : [req] "a" (req), [lps] "i" (lps) 83 : "cc"); 84 return cc; 85 } 86 87 static void *clp_alloc_block(gfp_t gfp_mask) 88 { 89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE)); 90 } 91 92 static void clp_free_block(void *ptr) 93 { 94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE)); 95 } 96 97 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev, 98 struct clp_rsp_query_pci_grp *response) 99 { 100 zdev->tlb_refresh = response->refresh; 101 zdev->dma_mask = response->dasm; 102 zdev->msi_addr = response->msia; 103 zdev->max_msi = response->noi; 104 zdev->fmb_update = response->mui; 105 106 switch (response->version) { 107 case 1: 108 zdev->max_bus_speed = PCIE_SPEED_5_0GT; 109 break; 110 default: 111 zdev->max_bus_speed = PCI_SPEED_UNKNOWN; 112 break; 113 } 114 } 115 116 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid) 117 { 118 struct clp_req_rsp_query_pci_grp *rrb; 119 int rc; 120 121 rrb = clp_alloc_block(GFP_KERNEL); 122 if (!rrb) 123 return -ENOMEM; 124 125 memset(rrb, 0, sizeof(*rrb)); 126 rrb->request.hdr.len = sizeof(rrb->request); 127 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP; 128 rrb->response.hdr.len = sizeof(rrb->response); 129 rrb->request.pfgid = pfgid; 130 131 rc = clp_req(rrb, CLP_LPS_PCI); 132 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) 133 clp_store_query_pci_fngrp(zdev, &rrb->response); 134 else { 135 zpci_err("Q PCI FGRP:\n"); 136 zpci_err_clp(rrb->response.hdr.rsp, rc); 137 rc = -EIO; 138 } 139 clp_free_block(rrb); 140 return rc; 141 } 142 143 static int clp_store_query_pci_fn(struct zpci_dev *zdev, 144 struct clp_rsp_query_pci *response) 145 { 146 int i; 147 148 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 149 zdev->bars[i].val = le32_to_cpu(response->bar[i]); 150 zdev->bars[i].size = response->bar_size[i]; 151 } 152 zdev->start_dma = response->sdma; 153 zdev->end_dma = response->edma; 154 zdev->pchid = response->pchid; 155 zdev->pfgid = response->pfgid; 156 zdev->pft = response->pft; 157 zdev->vfn = response->vfn; 158 zdev->port = response->port; 159 zdev->uid = response->uid; 160 zdev->fmb_length = sizeof(u32) * response->fmb_len; 161 zdev->rid_available = response->rid_avail; 162 zdev->is_physfn = response->is_physfn; 163 if (!s390_pci_no_rid && zdev->rid_available) 164 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN; 165 166 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip)); 167 if (response->util_str_avail) { 168 memcpy(zdev->util_str, response->util_str, 169 sizeof(zdev->util_str)); 170 } 171 zdev->mio_capable = response->mio_addr_avail; 172 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 173 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1)))) 174 continue; 175 176 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb; 177 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt; 178 } 179 return 0; 180 } 181 182 static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh) 183 { 184 struct clp_req_rsp_query_pci *rrb; 185 int rc; 186 187 rrb = clp_alloc_block(GFP_KERNEL); 188 if (!rrb) 189 return -ENOMEM; 190 191 memset(rrb, 0, sizeof(*rrb)); 192 rrb->request.hdr.len = sizeof(rrb->request); 193 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN; 194 rrb->response.hdr.len = sizeof(rrb->response); 195 rrb->request.fh = fh; 196 197 rc = clp_req(rrb, CLP_LPS_PCI); 198 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 199 rc = clp_store_query_pci_fn(zdev, &rrb->response); 200 if (rc) 201 goto out; 202 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid); 203 } else { 204 zpci_err("Q PCI FN:\n"); 205 zpci_err_clp(rrb->response.hdr.rsp, rc); 206 rc = -EIO; 207 } 208 out: 209 clp_free_block(rrb); 210 return rc; 211 } 212 213 int clp_add_pci_device(u32 fid, u32 fh, int configured) 214 { 215 struct zpci_dev *zdev; 216 int rc = -ENOMEM; 217 218 zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured); 219 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); 220 if (!zdev) 221 goto error; 222 223 zdev->fh = fh; 224 zdev->fid = fid; 225 226 /* Query function properties and update zdev */ 227 rc = clp_query_pci_fn(zdev, fh); 228 if (rc) 229 goto error; 230 231 if (configured) 232 zdev->state = ZPCI_FN_STATE_CONFIGURED; 233 else 234 zdev->state = ZPCI_FN_STATE_STANDBY; 235 236 rc = zpci_create_device(zdev); 237 if (rc) 238 goto error; 239 return 0; 240 241 error: 242 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc); 243 kfree(zdev); 244 return rc; 245 } 246 247 /* 248 * Enable/Disable a given PCI function and update its function handle if 249 * necessary 250 */ 251 static int clp_set_pci_fn(struct zpci_dev *zdev, u8 nr_dma_as, u8 command) 252 { 253 struct clp_req_rsp_set_pci *rrb; 254 int rc, retries = 100; 255 u32 fid = zdev->fid; 256 257 rrb = clp_alloc_block(GFP_KERNEL); 258 if (!rrb) 259 return -ENOMEM; 260 261 do { 262 memset(rrb, 0, sizeof(*rrb)); 263 rrb->request.hdr.len = sizeof(rrb->request); 264 rrb->request.hdr.cmd = CLP_SET_PCI_FN; 265 rrb->response.hdr.len = sizeof(rrb->response); 266 rrb->request.fh = zdev->fh; 267 rrb->request.oc = command; 268 rrb->request.ndas = nr_dma_as; 269 270 rc = clp_req(rrb, CLP_LPS_PCI); 271 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) { 272 retries--; 273 if (retries < 0) 274 break; 275 msleep(20); 276 } 277 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY); 278 279 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) { 280 zpci_err("Set PCI FN:\n"); 281 zpci_err_clp(rrb->response.hdr.rsp, rc); 282 } 283 284 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 285 zdev->fh = rrb->response.fh; 286 } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY && 287 rrb->response.fh == 0) { 288 /* Function is already in desired state - update handle */ 289 rc = clp_rescan_pci_devices_simple(&fid); 290 } 291 clp_free_block(rrb); 292 return rc; 293 } 294 295 int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as) 296 { 297 int rc; 298 299 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_PCI_FN); 300 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc); 301 if (rc) 302 goto out; 303 304 if (zpci_use_mio(zdev)) { 305 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_MIO); 306 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n", 307 zdev->fid, zdev->fh, rc); 308 if (rc) 309 clp_disable_fh(zdev); 310 } 311 out: 312 return rc; 313 } 314 315 int clp_disable_fh(struct zpci_dev *zdev) 316 { 317 int rc; 318 319 if (!zdev_enabled(zdev)) 320 return 0; 321 322 rc = clp_set_pci_fn(zdev, 0, CLP_SET_DISABLE_PCI_FN); 323 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc); 324 return rc; 325 } 326 327 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data, 328 void (*cb)(struct clp_fh_list_entry *, void *)) 329 { 330 u64 resume_token = 0; 331 int entries, i, rc; 332 333 do { 334 memset(rrb, 0, sizeof(*rrb)); 335 rrb->request.hdr.len = sizeof(rrb->request); 336 rrb->request.hdr.cmd = CLP_LIST_PCI; 337 /* store as many entries as possible */ 338 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN; 339 rrb->request.resume_token = resume_token; 340 341 /* Get PCI function handle list */ 342 rc = clp_req(rrb, CLP_LPS_PCI); 343 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) { 344 zpci_err("List PCI FN:\n"); 345 zpci_err_clp(rrb->response.hdr.rsp, rc); 346 rc = -EIO; 347 goto out; 348 } 349 350 update_uid_checking(rrb->response.uid_checking); 351 WARN_ON_ONCE(rrb->response.entry_size != 352 sizeof(struct clp_fh_list_entry)); 353 354 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) / 355 rrb->response.entry_size; 356 357 resume_token = rrb->response.resume_token; 358 for (i = 0; i < entries; i++) 359 cb(&rrb->response.fh_list[i], data); 360 } while (resume_token); 361 out: 362 return rc; 363 } 364 365 static void __clp_add(struct clp_fh_list_entry *entry, void *data) 366 { 367 struct zpci_dev *zdev; 368 369 if (!entry->vendor_id) 370 return; 371 372 zdev = get_zdev_by_fid(entry->fid); 373 if (!zdev) 374 clp_add_pci_device(entry->fid, entry->fh, entry->config_state); 375 } 376 377 static void __clp_update(struct clp_fh_list_entry *entry, void *data) 378 { 379 struct zpci_dev *zdev; 380 u32 *fid = data; 381 382 if (!entry->vendor_id) 383 return; 384 385 if (fid && *fid != entry->fid) 386 return; 387 388 zdev = get_zdev_by_fid(entry->fid); 389 if (!zdev) 390 return; 391 392 zdev->fh = entry->fh; 393 } 394 395 int clp_scan_pci_devices(void) 396 { 397 struct clp_req_rsp_list_pci *rrb; 398 int rc; 399 400 rrb = clp_alloc_block(GFP_KERNEL); 401 if (!rrb) 402 return -ENOMEM; 403 404 rc = clp_list_pci(rrb, NULL, __clp_add); 405 406 clp_free_block(rrb); 407 return rc; 408 } 409 410 int clp_rescan_pci_devices(void) 411 { 412 struct clp_req_rsp_list_pci *rrb; 413 int rc; 414 415 zpci_remove_reserved_devices(); 416 417 rrb = clp_alloc_block(GFP_KERNEL); 418 if (!rrb) 419 return -ENOMEM; 420 421 rc = clp_list_pci(rrb, NULL, __clp_add); 422 423 clp_free_block(rrb); 424 return rc; 425 } 426 427 /* Rescan PCI functions and refresh function handles. If fid is non-NULL only 428 * refresh the handle of the function matching @fid 429 */ 430 int clp_rescan_pci_devices_simple(u32 *fid) 431 { 432 struct clp_req_rsp_list_pci *rrb; 433 int rc; 434 435 rrb = clp_alloc_block(GFP_NOWAIT); 436 if (!rrb) 437 return -ENOMEM; 438 439 rc = clp_list_pci(rrb, fid, __clp_update); 440 441 clp_free_block(rrb); 442 return rc; 443 } 444 445 struct clp_state_data { 446 u32 fid; 447 enum zpci_state state; 448 }; 449 450 static void __clp_get_state(struct clp_fh_list_entry *entry, void *data) 451 { 452 struct clp_state_data *sd = data; 453 454 if (entry->fid != sd->fid) 455 return; 456 457 sd->state = entry->config_state; 458 } 459 460 int clp_get_state(u32 fid, enum zpci_state *state) 461 { 462 struct clp_req_rsp_list_pci *rrb; 463 struct clp_state_data sd = {fid, ZPCI_FN_STATE_RESERVED}; 464 int rc; 465 466 rrb = clp_alloc_block(GFP_ATOMIC); 467 if (!rrb) 468 return -ENOMEM; 469 470 rc = clp_list_pci(rrb, &sd, __clp_get_state); 471 if (!rc) 472 *state = sd.state; 473 474 clp_free_block(rrb); 475 return rc; 476 } 477 478 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb) 479 { 480 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 481 482 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 483 lpcb->response.hdr.len > limit) 484 return -EINVAL; 485 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0; 486 } 487 488 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb) 489 { 490 switch (lpcb->cmd) { 491 case 0x0001: /* store logical-processor characteristics */ 492 return clp_base_slpc(req, (void *) lpcb); 493 default: 494 return -EINVAL; 495 } 496 } 497 498 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb) 499 { 500 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 501 502 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 503 lpcb->response.hdr.len > limit) 504 return -EINVAL; 505 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 506 } 507 508 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb) 509 { 510 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 511 512 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 513 lpcb->response.hdr.len > limit) 514 return -EINVAL; 515 if (lpcb->request.reserved2 != 0) 516 return -EINVAL; 517 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 518 } 519 520 static int clp_pci_query(struct clp_req *req, 521 struct clp_req_rsp_query_pci *lpcb) 522 { 523 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 524 525 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 526 lpcb->response.hdr.len > limit) 527 return -EINVAL; 528 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0) 529 return -EINVAL; 530 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 531 } 532 533 static int clp_pci_query_grp(struct clp_req *req, 534 struct clp_req_rsp_query_pci_grp *lpcb) 535 { 536 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 537 538 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 539 lpcb->response.hdr.len > limit) 540 return -EINVAL; 541 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 || 542 lpcb->request.reserved4 != 0) 543 return -EINVAL; 544 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 545 } 546 547 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb) 548 { 549 switch (lpcb->cmd) { 550 case 0x0001: /* store logical-processor characteristics */ 551 return clp_pci_slpc(req, (void *) lpcb); 552 case 0x0002: /* list PCI functions */ 553 return clp_pci_list(req, (void *) lpcb); 554 case 0x0003: /* query PCI function */ 555 return clp_pci_query(req, (void *) lpcb); 556 case 0x0004: /* query PCI function group */ 557 return clp_pci_query_grp(req, (void *) lpcb); 558 default: 559 return -EINVAL; 560 } 561 } 562 563 static int clp_normal_command(struct clp_req *req) 564 { 565 struct clp_req_hdr *lpcb; 566 void __user *uptr; 567 int rc; 568 569 rc = -EINVAL; 570 if (req->lps != 0 && req->lps != 2) 571 goto out; 572 573 rc = -ENOMEM; 574 lpcb = clp_alloc_block(GFP_KERNEL); 575 if (!lpcb) 576 goto out; 577 578 rc = -EFAULT; 579 uptr = (void __force __user *)(unsigned long) req->data_p; 580 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0) 581 goto out_free; 582 583 rc = -EINVAL; 584 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0) 585 goto out_free; 586 587 switch (req->lps) { 588 case 0: 589 rc = clp_base_command(req, lpcb); 590 break; 591 case 2: 592 rc = clp_pci_command(req, lpcb); 593 break; 594 } 595 if (rc) 596 goto out_free; 597 598 rc = -EFAULT; 599 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0) 600 goto out_free; 601 602 rc = 0; 603 604 out_free: 605 clp_free_block(lpcb); 606 out: 607 return rc; 608 } 609 610 static int clp_immediate_command(struct clp_req *req) 611 { 612 void __user *uptr; 613 unsigned long ilp; 614 int exists; 615 616 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0) 617 return -EINVAL; 618 619 uptr = (void __force __user *)(unsigned long) req->data_p; 620 if (req->cmd == 0) { 621 /* Command code 0: test for a specific processor */ 622 exists = test_bit_inv(req->lps, &ilp); 623 return put_user(exists, (int __user *) uptr); 624 } 625 /* Command code 1: return bit mask of installed processors */ 626 return put_user(ilp, (unsigned long __user *) uptr); 627 } 628 629 static long clp_misc_ioctl(struct file *filp, unsigned int cmd, 630 unsigned long arg) 631 { 632 struct clp_req req; 633 void __user *argp; 634 635 if (cmd != CLP_SYNC) 636 return -EINVAL; 637 638 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg; 639 if (copy_from_user(&req, argp, sizeof(req))) 640 return -EFAULT; 641 if (req.r != 0) 642 return -EINVAL; 643 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req); 644 } 645 646 static int clp_misc_release(struct inode *inode, struct file *filp) 647 { 648 return 0; 649 } 650 651 static const struct file_operations clp_misc_fops = { 652 .owner = THIS_MODULE, 653 .open = nonseekable_open, 654 .release = clp_misc_release, 655 .unlocked_ioctl = clp_misc_ioctl, 656 .compat_ioctl = clp_misc_ioctl, 657 .llseek = no_llseek, 658 }; 659 660 static struct miscdevice clp_misc_device = { 661 .minor = MISC_DYNAMIC_MINOR, 662 .name = "clp", 663 .fops = &clp_misc_fops, 664 }; 665 666 static int __init clp_misc_init(void) 667 { 668 return misc_register(&clp_misc_device); 669 } 670 671 device_initcall(clp_misc_init); 672