1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright IBM Corp. 2012 4 * 5 * Author(s): 6 * Jan Glauber <jang@linux.vnet.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "zpci" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/compat.h> 13 #include <linux/kernel.h> 14 #include <linux/miscdevice.h> 15 #include <linux/slab.h> 16 #include <linux/err.h> 17 #include <linux/delay.h> 18 #include <linux/pci.h> 19 #include <linux/uaccess.h> 20 #include <asm/pci_debug.h> 21 #include <asm/pci_clp.h> 22 #include <asm/clp.h> 23 #include <uapi/asm/clp.h> 24 25 bool zpci_unique_uid; 26 27 void update_uid_checking(bool new) 28 { 29 if (zpci_unique_uid != new) 30 zpci_dbg(1, "uid checking:%d\n", new); 31 32 zpci_unique_uid = new; 33 } 34 35 static inline void zpci_err_clp(unsigned int rsp, int rc) 36 { 37 struct { 38 unsigned int rsp; 39 int rc; 40 } __packed data = {rsp, rc}; 41 42 zpci_err_hex(&data, sizeof(data)); 43 } 44 45 /* 46 * Call Logical Processor with c=1, lps=0 and command 1 47 * to get the bit mask of installed logical processors 48 */ 49 static inline int clp_get_ilp(unsigned long *ilp) 50 { 51 unsigned long mask; 52 int cc = 3; 53 54 asm volatile ( 55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n" 56 "0: ipm %[cc]\n" 57 " srl %[cc],28\n" 58 "1:\n" 59 EX_TABLE(0b, 1b) 60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1) 61 : "cc"); 62 *ilp = mask; 63 return cc; 64 } 65 66 /* 67 * Call Logical Processor with c=0, the give constant lps and an lpcb request. 68 */ 69 static __always_inline int clp_req(void *data, unsigned int lps) 70 { 71 struct { u8 _[CLP_BLK_SIZE]; } *req = data; 72 u64 ignored; 73 int cc = 3; 74 75 asm volatile ( 76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n" 77 "0: ipm %[cc]\n" 78 " srl %[cc],28\n" 79 "1:\n" 80 EX_TABLE(0b, 1b) 81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req) 82 : [req] "a" (req), [lps] "i" (lps) 83 : "cc"); 84 return cc; 85 } 86 87 static void *clp_alloc_block(gfp_t gfp_mask) 88 { 89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE)); 90 } 91 92 static void clp_free_block(void *ptr) 93 { 94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE)); 95 } 96 97 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev, 98 struct clp_rsp_query_pci_grp *response) 99 { 100 zdev->tlb_refresh = response->refresh; 101 zdev->dma_mask = response->dasm; 102 zdev->msi_addr = response->msia; 103 zdev->max_msi = response->noi; 104 zdev->fmb_update = response->mui; 105 106 switch (response->version) { 107 case 1: 108 zdev->max_bus_speed = PCIE_SPEED_5_0GT; 109 break; 110 default: 111 zdev->max_bus_speed = PCI_SPEED_UNKNOWN; 112 break; 113 } 114 } 115 116 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid) 117 { 118 struct clp_req_rsp_query_pci_grp *rrb; 119 int rc; 120 121 rrb = clp_alloc_block(GFP_KERNEL); 122 if (!rrb) 123 return -ENOMEM; 124 125 memset(rrb, 0, sizeof(*rrb)); 126 rrb->request.hdr.len = sizeof(rrb->request); 127 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP; 128 rrb->response.hdr.len = sizeof(rrb->response); 129 rrb->request.pfgid = pfgid; 130 131 rc = clp_req(rrb, CLP_LPS_PCI); 132 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) 133 clp_store_query_pci_fngrp(zdev, &rrb->response); 134 else { 135 zpci_err("Q PCI FGRP:\n"); 136 zpci_err_clp(rrb->response.hdr.rsp, rc); 137 rc = -EIO; 138 } 139 clp_free_block(rrb); 140 return rc; 141 } 142 143 static int clp_store_query_pci_fn(struct zpci_dev *zdev, 144 struct clp_rsp_query_pci *response) 145 { 146 int i; 147 148 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 149 zdev->bars[i].val = le32_to_cpu(response->bar[i]); 150 zdev->bars[i].size = response->bar_size[i]; 151 } 152 zdev->start_dma = response->sdma; 153 zdev->end_dma = response->edma; 154 zdev->pchid = response->pchid; 155 zdev->pfgid = response->pfgid; 156 zdev->pft = response->pft; 157 zdev->vfn = response->vfn; 158 zdev->uid = response->uid; 159 zdev->fmb_length = sizeof(u32) * response->fmb_len; 160 161 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip)); 162 if (response->util_str_avail) { 163 memcpy(zdev->util_str, response->util_str, 164 sizeof(zdev->util_str)); 165 } 166 zdev->mio_capable = response->mio_addr_avail; 167 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 168 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1)))) 169 continue; 170 171 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb; 172 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt; 173 } 174 return 0; 175 } 176 177 static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh) 178 { 179 struct clp_req_rsp_query_pci *rrb; 180 int rc; 181 182 rrb = clp_alloc_block(GFP_KERNEL); 183 if (!rrb) 184 return -ENOMEM; 185 186 memset(rrb, 0, sizeof(*rrb)); 187 rrb->request.hdr.len = sizeof(rrb->request); 188 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN; 189 rrb->response.hdr.len = sizeof(rrb->response); 190 rrb->request.fh = fh; 191 192 rc = clp_req(rrb, CLP_LPS_PCI); 193 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 194 rc = clp_store_query_pci_fn(zdev, &rrb->response); 195 if (rc) 196 goto out; 197 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid); 198 } else { 199 zpci_err("Q PCI FN:\n"); 200 zpci_err_clp(rrb->response.hdr.rsp, rc); 201 rc = -EIO; 202 } 203 out: 204 clp_free_block(rrb); 205 return rc; 206 } 207 208 int clp_add_pci_device(u32 fid, u32 fh, int configured) 209 { 210 struct zpci_dev *zdev; 211 int rc = -ENOMEM; 212 213 zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured); 214 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); 215 if (!zdev) 216 goto error; 217 218 zdev->fh = fh; 219 zdev->fid = fid; 220 221 /* Query function properties and update zdev */ 222 rc = clp_query_pci_fn(zdev, fh); 223 if (rc) 224 goto error; 225 226 if (configured) 227 zdev->state = ZPCI_FN_STATE_CONFIGURED; 228 else 229 zdev->state = ZPCI_FN_STATE_STANDBY; 230 231 rc = zpci_create_device(zdev); 232 if (rc) 233 goto error; 234 return 0; 235 236 error: 237 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc); 238 kfree(zdev); 239 return rc; 240 } 241 242 /* 243 * Enable/Disable a given PCI function and update its function handle if 244 * necessary 245 */ 246 static int clp_set_pci_fn(struct zpci_dev *zdev, u8 nr_dma_as, u8 command) 247 { 248 struct clp_req_rsp_set_pci *rrb; 249 int rc, retries = 100; 250 u32 fid = zdev->fid; 251 252 rrb = clp_alloc_block(GFP_KERNEL); 253 if (!rrb) 254 return -ENOMEM; 255 256 do { 257 memset(rrb, 0, sizeof(*rrb)); 258 rrb->request.hdr.len = sizeof(rrb->request); 259 rrb->request.hdr.cmd = CLP_SET_PCI_FN; 260 rrb->response.hdr.len = sizeof(rrb->response); 261 rrb->request.fh = zdev->fh; 262 rrb->request.oc = command; 263 rrb->request.ndas = nr_dma_as; 264 265 rc = clp_req(rrb, CLP_LPS_PCI); 266 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) { 267 retries--; 268 if (retries < 0) 269 break; 270 msleep(20); 271 } 272 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY); 273 274 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) { 275 zpci_err("Set PCI FN:\n"); 276 zpci_err_clp(rrb->response.hdr.rsp, rc); 277 } 278 279 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 280 zdev->fh = rrb->response.fh; 281 } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY && 282 rrb->response.fh == 0) { 283 /* Function is already in desired state - update handle */ 284 rc = clp_rescan_pci_devices_simple(&fid); 285 } 286 clp_free_block(rrb); 287 return rc; 288 } 289 290 int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as) 291 { 292 int rc; 293 294 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_PCI_FN); 295 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc); 296 if (rc) 297 goto out; 298 299 if (zpci_use_mio(zdev)) { 300 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_MIO); 301 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n", 302 zdev->fid, zdev->fh, rc); 303 if (rc) 304 clp_disable_fh(zdev); 305 } 306 out: 307 return rc; 308 } 309 310 int clp_disable_fh(struct zpci_dev *zdev) 311 { 312 u32 fh = zdev->fh; 313 int rc; 314 315 if (!zdev_enabled(zdev)) 316 return 0; 317 318 rc = clp_set_pci_fn(zdev, 0, CLP_SET_DISABLE_PCI_FN); 319 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, fh, rc); 320 return rc; 321 } 322 323 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data, 324 void (*cb)(struct clp_fh_list_entry *, void *)) 325 { 326 u64 resume_token = 0; 327 int entries, i, rc; 328 329 do { 330 memset(rrb, 0, sizeof(*rrb)); 331 rrb->request.hdr.len = sizeof(rrb->request); 332 rrb->request.hdr.cmd = CLP_LIST_PCI; 333 /* store as many entries as possible */ 334 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN; 335 rrb->request.resume_token = resume_token; 336 337 /* Get PCI function handle list */ 338 rc = clp_req(rrb, CLP_LPS_PCI); 339 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) { 340 zpci_err("List PCI FN:\n"); 341 zpci_err_clp(rrb->response.hdr.rsp, rc); 342 rc = -EIO; 343 goto out; 344 } 345 346 update_uid_checking(rrb->response.uid_checking); 347 WARN_ON_ONCE(rrb->response.entry_size != 348 sizeof(struct clp_fh_list_entry)); 349 350 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) / 351 rrb->response.entry_size; 352 353 resume_token = rrb->response.resume_token; 354 for (i = 0; i < entries; i++) 355 cb(&rrb->response.fh_list[i], data); 356 } while (resume_token); 357 out: 358 return rc; 359 } 360 361 static void __clp_add(struct clp_fh_list_entry *entry, void *data) 362 { 363 struct zpci_dev *zdev; 364 365 if (!entry->vendor_id) 366 return; 367 368 zdev = get_zdev_by_fid(entry->fid); 369 if (!zdev) 370 clp_add_pci_device(entry->fid, entry->fh, entry->config_state); 371 } 372 373 static void __clp_update(struct clp_fh_list_entry *entry, void *data) 374 { 375 struct zpci_dev *zdev; 376 u32 *fid = data; 377 378 if (!entry->vendor_id) 379 return; 380 381 if (fid && *fid != entry->fid) 382 return; 383 384 zdev = get_zdev_by_fid(entry->fid); 385 if (!zdev) 386 return; 387 388 zdev->fh = entry->fh; 389 } 390 391 int clp_scan_pci_devices(void) 392 { 393 struct clp_req_rsp_list_pci *rrb; 394 int rc; 395 396 rrb = clp_alloc_block(GFP_KERNEL); 397 if (!rrb) 398 return -ENOMEM; 399 400 rc = clp_list_pci(rrb, NULL, __clp_add); 401 402 clp_free_block(rrb); 403 return rc; 404 } 405 406 int clp_rescan_pci_devices(void) 407 { 408 struct clp_req_rsp_list_pci *rrb; 409 int rc; 410 411 zpci_remove_reserved_devices(); 412 413 rrb = clp_alloc_block(GFP_KERNEL); 414 if (!rrb) 415 return -ENOMEM; 416 417 rc = clp_list_pci(rrb, NULL, __clp_add); 418 419 clp_free_block(rrb); 420 return rc; 421 } 422 423 /* Rescan PCI functions and refresh function handles. If fid is non-NULL only 424 * refresh the handle of the function matching @fid 425 */ 426 int clp_rescan_pci_devices_simple(u32 *fid) 427 { 428 struct clp_req_rsp_list_pci *rrb; 429 int rc; 430 431 rrb = clp_alloc_block(GFP_NOWAIT); 432 if (!rrb) 433 return -ENOMEM; 434 435 rc = clp_list_pci(rrb, fid, __clp_update); 436 437 clp_free_block(rrb); 438 return rc; 439 } 440 441 struct clp_state_data { 442 u32 fid; 443 enum zpci_state state; 444 }; 445 446 static void __clp_get_state(struct clp_fh_list_entry *entry, void *data) 447 { 448 struct clp_state_data *sd = data; 449 450 if (entry->fid != sd->fid) 451 return; 452 453 sd->state = entry->config_state; 454 } 455 456 int clp_get_state(u32 fid, enum zpci_state *state) 457 { 458 struct clp_req_rsp_list_pci *rrb; 459 struct clp_state_data sd = {fid, ZPCI_FN_STATE_RESERVED}; 460 int rc; 461 462 rrb = clp_alloc_block(GFP_ATOMIC); 463 if (!rrb) 464 return -ENOMEM; 465 466 rc = clp_list_pci(rrb, &sd, __clp_get_state); 467 if (!rc) 468 *state = sd.state; 469 470 clp_free_block(rrb); 471 return rc; 472 } 473 474 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb) 475 { 476 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 477 478 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 479 lpcb->response.hdr.len > limit) 480 return -EINVAL; 481 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0; 482 } 483 484 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb) 485 { 486 switch (lpcb->cmd) { 487 case 0x0001: /* store logical-processor characteristics */ 488 return clp_base_slpc(req, (void *) lpcb); 489 default: 490 return -EINVAL; 491 } 492 } 493 494 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb) 495 { 496 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 497 498 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 499 lpcb->response.hdr.len > limit) 500 return -EINVAL; 501 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 502 } 503 504 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb) 505 { 506 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 507 508 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 509 lpcb->response.hdr.len > limit) 510 return -EINVAL; 511 if (lpcb->request.reserved2 != 0) 512 return -EINVAL; 513 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 514 } 515 516 static int clp_pci_query(struct clp_req *req, 517 struct clp_req_rsp_query_pci *lpcb) 518 { 519 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 520 521 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 522 lpcb->response.hdr.len > limit) 523 return -EINVAL; 524 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0) 525 return -EINVAL; 526 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 527 } 528 529 static int clp_pci_query_grp(struct clp_req *req, 530 struct clp_req_rsp_query_pci_grp *lpcb) 531 { 532 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 533 534 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 535 lpcb->response.hdr.len > limit) 536 return -EINVAL; 537 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 || 538 lpcb->request.reserved4 != 0) 539 return -EINVAL; 540 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 541 } 542 543 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb) 544 { 545 switch (lpcb->cmd) { 546 case 0x0001: /* store logical-processor characteristics */ 547 return clp_pci_slpc(req, (void *) lpcb); 548 case 0x0002: /* list PCI functions */ 549 return clp_pci_list(req, (void *) lpcb); 550 case 0x0003: /* query PCI function */ 551 return clp_pci_query(req, (void *) lpcb); 552 case 0x0004: /* query PCI function group */ 553 return clp_pci_query_grp(req, (void *) lpcb); 554 default: 555 return -EINVAL; 556 } 557 } 558 559 static int clp_normal_command(struct clp_req *req) 560 { 561 struct clp_req_hdr *lpcb; 562 void __user *uptr; 563 int rc; 564 565 rc = -EINVAL; 566 if (req->lps != 0 && req->lps != 2) 567 goto out; 568 569 rc = -ENOMEM; 570 lpcb = clp_alloc_block(GFP_KERNEL); 571 if (!lpcb) 572 goto out; 573 574 rc = -EFAULT; 575 uptr = (void __force __user *)(unsigned long) req->data_p; 576 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0) 577 goto out_free; 578 579 rc = -EINVAL; 580 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0) 581 goto out_free; 582 583 switch (req->lps) { 584 case 0: 585 rc = clp_base_command(req, lpcb); 586 break; 587 case 2: 588 rc = clp_pci_command(req, lpcb); 589 break; 590 } 591 if (rc) 592 goto out_free; 593 594 rc = -EFAULT; 595 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0) 596 goto out_free; 597 598 rc = 0; 599 600 out_free: 601 clp_free_block(lpcb); 602 out: 603 return rc; 604 } 605 606 static int clp_immediate_command(struct clp_req *req) 607 { 608 void __user *uptr; 609 unsigned long ilp; 610 int exists; 611 612 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0) 613 return -EINVAL; 614 615 uptr = (void __force __user *)(unsigned long) req->data_p; 616 if (req->cmd == 0) { 617 /* Command code 0: test for a specific processor */ 618 exists = test_bit_inv(req->lps, &ilp); 619 return put_user(exists, (int __user *) uptr); 620 } 621 /* Command code 1: return bit mask of installed processors */ 622 return put_user(ilp, (unsigned long __user *) uptr); 623 } 624 625 static long clp_misc_ioctl(struct file *filp, unsigned int cmd, 626 unsigned long arg) 627 { 628 struct clp_req req; 629 void __user *argp; 630 631 if (cmd != CLP_SYNC) 632 return -EINVAL; 633 634 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg; 635 if (copy_from_user(&req, argp, sizeof(req))) 636 return -EFAULT; 637 if (req.r != 0) 638 return -EINVAL; 639 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req); 640 } 641 642 static int clp_misc_release(struct inode *inode, struct file *filp) 643 { 644 return 0; 645 } 646 647 static const struct file_operations clp_misc_fops = { 648 .owner = THIS_MODULE, 649 .open = nonseekable_open, 650 .release = clp_misc_release, 651 .unlocked_ioctl = clp_misc_ioctl, 652 .compat_ioctl = clp_misc_ioctl, 653 .llseek = no_llseek, 654 }; 655 656 static struct miscdevice clp_misc_device = { 657 .minor = MISC_DYNAMIC_MINOR, 658 .name = "clp", 659 .fops = &clp_misc_fops, 660 }; 661 662 static int __init clp_misc_init(void) 663 { 664 return misc_register(&clp_misc_device); 665 } 666 667 device_initcall(clp_misc_init); 668