1 /* 2 * Copyright IBM Corp. 2012 3 * 4 * Author(s): 5 * Jan Glauber <jang@linux.vnet.ibm.com> 6 * 7 * The System z PCI code is a rewrite from a prototype by 8 * the following people (Kudoz!): 9 * Alexander Schmidt 10 * Christoph Raisch 11 * Hannes Hering 12 * Hoang-Nam Nguyen 13 * Jan-Bernd Themann 14 * Stefan Roscher 15 * Thomas Klein 16 */ 17 18 #define KMSG_COMPONENT "zpci" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/kernel.h> 22 #include <linux/slab.h> 23 #include <linux/err.h> 24 #include <linux/export.h> 25 #include <linux/delay.h> 26 #include <linux/irq.h> 27 #include <linux/kernel_stat.h> 28 #include <linux/seq_file.h> 29 #include <linux/pci.h> 30 #include <linux/msi.h> 31 32 #include <asm/isc.h> 33 #include <asm/airq.h> 34 #include <asm/facility.h> 35 #include <asm/pci_insn.h> 36 #include <asm/pci_clp.h> 37 #include <asm/pci_dma.h> 38 39 #define DEBUG /* enable pr_debug */ 40 41 #define SIC_IRQ_MODE_ALL 0 42 #define SIC_IRQ_MODE_SINGLE 1 43 44 #define ZPCI_NR_DMA_SPACES 1 45 #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS 46 47 /* list of all detected zpci devices */ 48 static LIST_HEAD(zpci_list); 49 static DEFINE_SPINLOCK(zpci_list_lock); 50 51 static struct irq_chip zpci_irq_chip = { 52 .name = "zPCI", 53 .irq_unmask = pci_msi_unmask_irq, 54 .irq_mask = pci_msi_mask_irq, 55 }; 56 57 static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES); 58 static DEFINE_SPINLOCK(zpci_domain_lock); 59 60 static struct airq_iv *zpci_aisb_iv; 61 static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES]; 62 63 /* Adapter interrupt definitions */ 64 static void zpci_irq_handler(struct airq_struct *airq); 65 66 static struct airq_struct zpci_airq = { 67 .handler = zpci_irq_handler, 68 .isc = PCI_ISC, 69 }; 70 71 /* I/O Map */ 72 static DEFINE_SPINLOCK(zpci_iomap_lock); 73 static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); 74 struct zpci_iomap_entry *zpci_iomap_start; 75 EXPORT_SYMBOL_GPL(zpci_iomap_start); 76 77 static struct kmem_cache *zdev_fmb_cache; 78 79 struct zpci_dev *get_zdev(struct pci_dev *pdev) 80 { 81 return (struct zpci_dev *) pdev->sysdata; 82 } 83 84 struct zpci_dev *get_zdev_by_fid(u32 fid) 85 { 86 struct zpci_dev *tmp, *zdev = NULL; 87 88 spin_lock(&zpci_list_lock); 89 list_for_each_entry(tmp, &zpci_list, entry) { 90 if (tmp->fid == fid) { 91 zdev = tmp; 92 break; 93 } 94 } 95 spin_unlock(&zpci_list_lock); 96 return zdev; 97 } 98 99 static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus) 100 { 101 return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL; 102 } 103 104 int pci_domain_nr(struct pci_bus *bus) 105 { 106 return ((struct zpci_dev *) bus->sysdata)->domain; 107 } 108 EXPORT_SYMBOL_GPL(pci_domain_nr); 109 110 int pci_proc_domain(struct pci_bus *bus) 111 { 112 return pci_domain_nr(bus); 113 } 114 EXPORT_SYMBOL_GPL(pci_proc_domain); 115 116 /* Modify PCI: Register adapter interruptions */ 117 static int zpci_set_airq(struct zpci_dev *zdev) 118 { 119 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT); 120 struct zpci_fib fib = {0}; 121 122 fib.isc = PCI_ISC; 123 fib.sum = 1; /* enable summary notifications */ 124 fib.noi = airq_iv_end(zdev->aibv); 125 fib.aibv = (unsigned long) zdev->aibv->vector; 126 fib.aibvo = 0; /* each zdev has its own interrupt vector */ 127 fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8; 128 fib.aisbo = zdev->aisb & 63; 129 130 return zpci_mod_fc(req, &fib); 131 } 132 133 struct mod_pci_args { 134 u64 base; 135 u64 limit; 136 u64 iota; 137 u64 fmb_addr; 138 }; 139 140 static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args) 141 { 142 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn); 143 struct zpci_fib fib = {0}; 144 145 fib.pba = args->base; 146 fib.pal = args->limit; 147 fib.iota = args->iota; 148 fib.fmb_addr = args->fmb_addr; 149 150 return zpci_mod_fc(req, &fib); 151 } 152 153 /* Modify PCI: Register I/O address translation parameters */ 154 int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas, 155 u64 base, u64 limit, u64 iota) 156 { 157 struct mod_pci_args args = { base, limit, iota, 0 }; 158 159 WARN_ON_ONCE(iota & 0x3fff); 160 args.iota |= ZPCI_IOTA_RTTO_FLAG; 161 return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args); 162 } 163 164 /* Modify PCI: Unregister I/O address translation parameters */ 165 int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas) 166 { 167 struct mod_pci_args args = { 0, 0, 0, 0 }; 168 169 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args); 170 } 171 172 /* Modify PCI: Unregister adapter interruptions */ 173 static int zpci_clear_airq(struct zpci_dev *zdev) 174 { 175 struct mod_pci_args args = { 0, 0, 0, 0 }; 176 177 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args); 178 } 179 180 /* Modify PCI: Set PCI function measurement parameters */ 181 int zpci_fmb_enable_device(struct zpci_dev *zdev) 182 { 183 struct mod_pci_args args = { 0, 0, 0, 0 }; 184 185 if (zdev->fmb) 186 return -EINVAL; 187 188 zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL); 189 if (!zdev->fmb) 190 return -ENOMEM; 191 WARN_ON((u64) zdev->fmb & 0xf); 192 193 /* reset software counters */ 194 atomic64_set(&zdev->allocated_pages, 0); 195 atomic64_set(&zdev->mapped_pages, 0); 196 atomic64_set(&zdev->unmapped_pages, 0); 197 198 args.fmb_addr = virt_to_phys(zdev->fmb); 199 return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); 200 } 201 202 /* Modify PCI: Disable PCI function measurement */ 203 int zpci_fmb_disable_device(struct zpci_dev *zdev) 204 { 205 struct mod_pci_args args = { 0, 0, 0, 0 }; 206 int rc; 207 208 if (!zdev->fmb) 209 return -EINVAL; 210 211 /* Function measurement is disabled if fmb address is zero */ 212 rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); 213 214 kmem_cache_free(zdev_fmb_cache, zdev->fmb); 215 zdev->fmb = NULL; 216 return rc; 217 } 218 219 #define ZPCI_PCIAS_CFGSPC 15 220 221 static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len) 222 { 223 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); 224 u64 data; 225 int rc; 226 227 rc = zpci_load(&data, req, offset); 228 if (!rc) { 229 data = data << ((8 - len) * 8); 230 data = le64_to_cpu(data); 231 *val = (u32) data; 232 } else 233 *val = 0xffffffff; 234 return rc; 235 } 236 237 static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len) 238 { 239 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); 240 u64 data = val; 241 int rc; 242 243 data = cpu_to_le64(data); 244 data = data >> ((8 - len) * 8); 245 rc = zpci_store(data, req, offset); 246 return rc; 247 } 248 249 void pcibios_fixup_bus(struct pci_bus *bus) 250 { 251 } 252 253 resource_size_t pcibios_align_resource(void *data, const struct resource *res, 254 resource_size_t size, 255 resource_size_t align) 256 { 257 return 0; 258 } 259 260 /* combine single writes by using store-block insn */ 261 void __iowrite64_copy(void __iomem *to, const void *from, size_t count) 262 { 263 zpci_memcpy_toio(to, from, count); 264 } 265 266 /* Create a virtual mapping cookie for a PCI BAR */ 267 void __iomem *pci_iomap_range(struct pci_dev *pdev, 268 int bar, 269 unsigned long offset, 270 unsigned long max) 271 { 272 struct zpci_dev *zdev = get_zdev(pdev); 273 u64 addr; 274 int idx; 275 276 if ((bar & 7) != bar) 277 return NULL; 278 279 idx = zdev->bars[bar].map_idx; 280 spin_lock(&zpci_iomap_lock); 281 if (zpci_iomap_start[idx].count++) { 282 BUG_ON(zpci_iomap_start[idx].fh != zdev->fh || 283 zpci_iomap_start[idx].bar != bar); 284 } else { 285 zpci_iomap_start[idx].fh = zdev->fh; 286 zpci_iomap_start[idx].bar = bar; 287 } 288 /* Detect overrun */ 289 BUG_ON(!zpci_iomap_start[idx].count); 290 spin_unlock(&zpci_iomap_lock); 291 292 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48); 293 return (void __iomem *) addr + offset; 294 } 295 EXPORT_SYMBOL(pci_iomap_range); 296 297 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 298 { 299 return pci_iomap_range(dev, bar, 0, maxlen); 300 } 301 EXPORT_SYMBOL(pci_iomap); 302 303 void pci_iounmap(struct pci_dev *pdev, void __iomem *addr) 304 { 305 unsigned int idx; 306 307 idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48; 308 spin_lock(&zpci_iomap_lock); 309 /* Detect underrun */ 310 BUG_ON(!zpci_iomap_start[idx].count); 311 if (!--zpci_iomap_start[idx].count) { 312 zpci_iomap_start[idx].fh = 0; 313 zpci_iomap_start[idx].bar = 0; 314 } 315 spin_unlock(&zpci_iomap_lock); 316 } 317 EXPORT_SYMBOL(pci_iounmap); 318 319 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, 320 int size, u32 *val) 321 { 322 struct zpci_dev *zdev = get_zdev_by_bus(bus); 323 int ret; 324 325 if (!zdev || devfn != ZPCI_DEVFN) 326 ret = -ENODEV; 327 else 328 ret = zpci_cfg_load(zdev, where, val, size); 329 330 return ret; 331 } 332 333 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, 334 int size, u32 val) 335 { 336 struct zpci_dev *zdev = get_zdev_by_bus(bus); 337 int ret; 338 339 if (!zdev || devfn != ZPCI_DEVFN) 340 ret = -ENODEV; 341 else 342 ret = zpci_cfg_store(zdev, where, val, size); 343 344 return ret; 345 } 346 347 static struct pci_ops pci_root_ops = { 348 .read = pci_read, 349 .write = pci_write, 350 }; 351 352 static void zpci_irq_handler(struct airq_struct *airq) 353 { 354 unsigned long si, ai; 355 struct airq_iv *aibv; 356 int irqs_on = 0; 357 358 inc_irq_stat(IRQIO_PCI); 359 for (si = 0;;) { 360 /* Scan adapter summary indicator bit vector */ 361 si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv)); 362 if (si == -1UL) { 363 if (irqs_on++) 364 /* End of second scan with interrupts on. */ 365 break; 366 /* First scan complete, reenable interrupts. */ 367 zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); 368 si = 0; 369 continue; 370 } 371 372 /* Scan the adapter interrupt vector for this device. */ 373 aibv = zpci_aibv[si]; 374 for (ai = 0;;) { 375 ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv)); 376 if (ai == -1UL) 377 break; 378 inc_irq_stat(IRQIO_MSI); 379 airq_iv_lock(aibv, ai); 380 generic_handle_irq(airq_iv_get_data(aibv, ai)); 381 airq_iv_unlock(aibv, ai); 382 } 383 } 384 } 385 386 int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 387 { 388 struct zpci_dev *zdev = get_zdev(pdev); 389 unsigned int hwirq, msi_vecs; 390 unsigned long aisb; 391 struct msi_desc *msi; 392 struct msi_msg msg; 393 int rc, irq; 394 395 if (type == PCI_CAP_ID_MSI && nvec > 1) 396 return 1; 397 msi_vecs = min_t(unsigned int, nvec, zdev->max_msi); 398 399 /* Allocate adapter summary indicator bit */ 400 rc = -EIO; 401 aisb = airq_iv_alloc_bit(zpci_aisb_iv); 402 if (aisb == -1UL) 403 goto out; 404 zdev->aisb = aisb; 405 406 /* Create adapter interrupt vector */ 407 rc = -ENOMEM; 408 zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK); 409 if (!zdev->aibv) 410 goto out_si; 411 412 /* Wire up shortcut pointer */ 413 zpci_aibv[aisb] = zdev->aibv; 414 415 /* Request MSI interrupts */ 416 hwirq = 0; 417 list_for_each_entry(msi, &pdev->msi_list, list) { 418 rc = -EIO; 419 irq = irq_alloc_desc(0); /* Alloc irq on node 0 */ 420 if (irq < 0) 421 goto out_msi; 422 rc = irq_set_msi_desc(irq, msi); 423 if (rc) 424 goto out_msi; 425 irq_set_chip_and_handler(irq, &zpci_irq_chip, 426 handle_simple_irq); 427 msg.data = hwirq; 428 msg.address_lo = zdev->msi_addr & 0xffffffff; 429 msg.address_hi = zdev->msi_addr >> 32; 430 pci_write_msi_msg(irq, &msg); 431 airq_iv_set_data(zdev->aibv, hwirq, irq); 432 hwirq++; 433 } 434 435 /* Enable adapter interrupts */ 436 rc = zpci_set_airq(zdev); 437 if (rc) 438 goto out_msi; 439 440 return (msi_vecs == nvec) ? 0 : msi_vecs; 441 442 out_msi: 443 list_for_each_entry(msi, &pdev->msi_list, list) { 444 if (hwirq-- == 0) 445 break; 446 irq_set_msi_desc(msi->irq, NULL); 447 irq_free_desc(msi->irq); 448 msi->msg.address_lo = 0; 449 msi->msg.address_hi = 0; 450 msi->msg.data = 0; 451 msi->irq = 0; 452 } 453 zpci_aibv[aisb] = NULL; 454 airq_iv_release(zdev->aibv); 455 out_si: 456 airq_iv_free_bit(zpci_aisb_iv, aisb); 457 out: 458 return rc; 459 } 460 461 void arch_teardown_msi_irqs(struct pci_dev *pdev) 462 { 463 struct zpci_dev *zdev = get_zdev(pdev); 464 struct msi_desc *msi; 465 int rc; 466 467 /* Disable adapter interrupts */ 468 rc = zpci_clear_airq(zdev); 469 if (rc) 470 return; 471 472 /* Release MSI interrupts */ 473 list_for_each_entry(msi, &pdev->msi_list, list) { 474 if (msi->msi_attrib.is_msix) 475 __pci_msix_desc_mask_irq(msi, 1); 476 else 477 __pci_msi_desc_mask_irq(msi, 1, 1); 478 irq_set_msi_desc(msi->irq, NULL); 479 irq_free_desc(msi->irq); 480 msi->msg.address_lo = 0; 481 msi->msg.address_hi = 0; 482 msi->msg.data = 0; 483 msi->irq = 0; 484 } 485 486 zpci_aibv[zdev->aisb] = NULL; 487 airq_iv_release(zdev->aibv); 488 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); 489 } 490 491 static void zpci_map_resources(struct pci_dev *pdev) 492 { 493 resource_size_t len; 494 int i; 495 496 for (i = 0; i < PCI_BAR_COUNT; i++) { 497 len = pci_resource_len(pdev, i); 498 if (!len) 499 continue; 500 pdev->resource[i].start = 501 (resource_size_t __force) pci_iomap(pdev, i, 0); 502 pdev->resource[i].end = pdev->resource[i].start + len - 1; 503 } 504 } 505 506 static void zpci_unmap_resources(struct pci_dev *pdev) 507 { 508 resource_size_t len; 509 int i; 510 511 for (i = 0; i < PCI_BAR_COUNT; i++) { 512 len = pci_resource_len(pdev, i); 513 if (!len) 514 continue; 515 pci_iounmap(pdev, (void __iomem __force *) 516 pdev->resource[i].start); 517 } 518 } 519 520 static int __init zpci_irq_init(void) 521 { 522 int rc; 523 524 rc = register_adapter_interrupt(&zpci_airq); 525 if (rc) 526 goto out; 527 /* Set summary to 1 to be called every time for the ISC. */ 528 *zpci_airq.lsi_ptr = 1; 529 530 rc = -ENOMEM; 531 zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC); 532 if (!zpci_aisb_iv) 533 goto out_airq; 534 535 zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); 536 return 0; 537 538 out_airq: 539 unregister_adapter_interrupt(&zpci_airq); 540 out: 541 return rc; 542 } 543 544 static void zpci_irq_exit(void) 545 { 546 airq_iv_release(zpci_aisb_iv); 547 unregister_adapter_interrupt(&zpci_airq); 548 } 549 550 static int zpci_alloc_iomap(struct zpci_dev *zdev) 551 { 552 int entry; 553 554 spin_lock(&zpci_iomap_lock); 555 entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); 556 if (entry == ZPCI_IOMAP_MAX_ENTRIES) { 557 spin_unlock(&zpci_iomap_lock); 558 return -ENOSPC; 559 } 560 set_bit(entry, zpci_iomap); 561 spin_unlock(&zpci_iomap_lock); 562 return entry; 563 } 564 565 static void zpci_free_iomap(struct zpci_dev *zdev, int entry) 566 { 567 spin_lock(&zpci_iomap_lock); 568 memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry)); 569 clear_bit(entry, zpci_iomap); 570 spin_unlock(&zpci_iomap_lock); 571 } 572 573 static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start, 574 unsigned long size, unsigned long flags) 575 { 576 struct resource *r; 577 578 r = kzalloc(sizeof(*r), GFP_KERNEL); 579 if (!r) 580 return NULL; 581 582 r->start = start; 583 r->end = r->start + size - 1; 584 r->flags = flags; 585 r->name = zdev->res_name; 586 587 if (request_resource(&iomem_resource, r)) { 588 kfree(r); 589 return NULL; 590 } 591 return r; 592 } 593 594 static int zpci_setup_bus_resources(struct zpci_dev *zdev, 595 struct list_head *resources) 596 { 597 unsigned long addr, size, flags; 598 struct resource *res; 599 int i, entry; 600 601 snprintf(zdev->res_name, sizeof(zdev->res_name), 602 "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR); 603 604 for (i = 0; i < PCI_BAR_COUNT; i++) { 605 if (!zdev->bars[i].size) 606 continue; 607 entry = zpci_alloc_iomap(zdev); 608 if (entry < 0) 609 return entry; 610 zdev->bars[i].map_idx = entry; 611 612 /* only MMIO is supported */ 613 flags = IORESOURCE_MEM; 614 if (zdev->bars[i].val & 8) 615 flags |= IORESOURCE_PREFETCH; 616 if (zdev->bars[i].val & 4) 617 flags |= IORESOURCE_MEM_64; 618 619 addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48); 620 621 size = 1UL << zdev->bars[i].size; 622 623 res = __alloc_res(zdev, addr, size, flags); 624 if (!res) { 625 zpci_free_iomap(zdev, entry); 626 return -ENOMEM; 627 } 628 zdev->bars[i].res = res; 629 pci_add_resource(resources, res); 630 } 631 632 return 0; 633 } 634 635 static void zpci_cleanup_bus_resources(struct zpci_dev *zdev) 636 { 637 int i; 638 639 for (i = 0; i < PCI_BAR_COUNT; i++) { 640 if (!zdev->bars[i].size) 641 continue; 642 643 zpci_free_iomap(zdev, zdev->bars[i].map_idx); 644 release_resource(zdev->bars[i].res); 645 kfree(zdev->bars[i].res); 646 } 647 } 648 649 int pcibios_add_device(struct pci_dev *pdev) 650 { 651 struct zpci_dev *zdev = get_zdev(pdev); 652 struct resource *res; 653 int i; 654 655 zdev->pdev = pdev; 656 pdev->dev.groups = zpci_attr_groups; 657 zpci_map_resources(pdev); 658 659 for (i = 0; i < PCI_BAR_COUNT; i++) { 660 res = &pdev->resource[i]; 661 if (res->parent || !res->flags) 662 continue; 663 pci_claim_resource(pdev, i); 664 } 665 666 return 0; 667 } 668 669 void pcibios_release_device(struct pci_dev *pdev) 670 { 671 zpci_unmap_resources(pdev); 672 } 673 674 int pcibios_enable_device(struct pci_dev *pdev, int mask) 675 { 676 struct zpci_dev *zdev = get_zdev(pdev); 677 678 zdev->pdev = pdev; 679 zpci_debug_init_device(zdev); 680 zpci_fmb_enable_device(zdev); 681 682 return pci_enable_resources(pdev, mask); 683 } 684 685 void pcibios_disable_device(struct pci_dev *pdev) 686 { 687 struct zpci_dev *zdev = get_zdev(pdev); 688 689 zpci_fmb_disable_device(zdev); 690 zpci_debug_exit_device(zdev); 691 zdev->pdev = NULL; 692 } 693 694 #ifdef CONFIG_HIBERNATE_CALLBACKS 695 static int zpci_restore(struct device *dev) 696 { 697 struct pci_dev *pdev = to_pci_dev(dev); 698 struct zpci_dev *zdev = get_zdev(pdev); 699 int ret = 0; 700 701 if (zdev->state != ZPCI_FN_STATE_ONLINE) 702 goto out; 703 704 ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); 705 if (ret) 706 goto out; 707 708 zpci_map_resources(pdev); 709 zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET, 710 zdev->start_dma + zdev->iommu_size - 1, 711 (u64) zdev->dma_table); 712 713 out: 714 return ret; 715 } 716 717 static int zpci_freeze(struct device *dev) 718 { 719 struct pci_dev *pdev = to_pci_dev(dev); 720 struct zpci_dev *zdev = get_zdev(pdev); 721 722 if (zdev->state != ZPCI_FN_STATE_ONLINE) 723 return 0; 724 725 zpci_unregister_ioat(zdev, 0); 726 zpci_unmap_resources(pdev); 727 return clp_disable_fh(zdev); 728 } 729 730 struct dev_pm_ops pcibios_pm_ops = { 731 .thaw_noirq = zpci_restore, 732 .freeze_noirq = zpci_freeze, 733 .restore_noirq = zpci_restore, 734 .poweroff_noirq = zpci_freeze, 735 }; 736 #endif /* CONFIG_HIBERNATE_CALLBACKS */ 737 738 static int zpci_alloc_domain(struct zpci_dev *zdev) 739 { 740 spin_lock(&zpci_domain_lock); 741 zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES); 742 if (zdev->domain == ZPCI_NR_DEVICES) { 743 spin_unlock(&zpci_domain_lock); 744 return -ENOSPC; 745 } 746 set_bit(zdev->domain, zpci_domain); 747 spin_unlock(&zpci_domain_lock); 748 return 0; 749 } 750 751 static void zpci_free_domain(struct zpci_dev *zdev) 752 { 753 spin_lock(&zpci_domain_lock); 754 clear_bit(zdev->domain, zpci_domain); 755 spin_unlock(&zpci_domain_lock); 756 } 757 758 void pcibios_remove_bus(struct pci_bus *bus) 759 { 760 struct zpci_dev *zdev = get_zdev_by_bus(bus); 761 762 zpci_exit_slot(zdev); 763 zpci_cleanup_bus_resources(zdev); 764 zpci_free_domain(zdev); 765 766 spin_lock(&zpci_list_lock); 767 list_del(&zdev->entry); 768 spin_unlock(&zpci_list_lock); 769 770 kfree(zdev); 771 } 772 773 static int zpci_scan_bus(struct zpci_dev *zdev) 774 { 775 LIST_HEAD(resources); 776 int ret; 777 778 ret = zpci_setup_bus_resources(zdev, &resources); 779 if (ret) 780 return ret; 781 782 zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops, 783 zdev, &resources); 784 if (!zdev->bus) { 785 zpci_cleanup_bus_resources(zdev); 786 return -EIO; 787 } 788 zdev->bus->max_bus_speed = zdev->max_bus_speed; 789 pci_bus_add_devices(zdev->bus); 790 return 0; 791 } 792 793 int zpci_enable_device(struct zpci_dev *zdev) 794 { 795 int rc; 796 797 rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); 798 if (rc) 799 goto out; 800 801 rc = zpci_dma_init_device(zdev); 802 if (rc) 803 goto out_dma; 804 805 zdev->state = ZPCI_FN_STATE_ONLINE; 806 return 0; 807 808 out_dma: 809 clp_disable_fh(zdev); 810 out: 811 return rc; 812 } 813 EXPORT_SYMBOL_GPL(zpci_enable_device); 814 815 int zpci_disable_device(struct zpci_dev *zdev) 816 { 817 zpci_dma_exit_device(zdev); 818 return clp_disable_fh(zdev); 819 } 820 EXPORT_SYMBOL_GPL(zpci_disable_device); 821 822 int zpci_create_device(struct zpci_dev *zdev) 823 { 824 int rc; 825 826 rc = zpci_alloc_domain(zdev); 827 if (rc) 828 goto out; 829 830 mutex_init(&zdev->lock); 831 if (zdev->state == ZPCI_FN_STATE_CONFIGURED) { 832 rc = zpci_enable_device(zdev); 833 if (rc) 834 goto out_free; 835 } 836 rc = zpci_scan_bus(zdev); 837 if (rc) 838 goto out_disable; 839 840 spin_lock(&zpci_list_lock); 841 list_add_tail(&zdev->entry, &zpci_list); 842 spin_unlock(&zpci_list_lock); 843 844 zpci_init_slot(zdev); 845 846 return 0; 847 848 out_disable: 849 if (zdev->state == ZPCI_FN_STATE_ONLINE) 850 zpci_disable_device(zdev); 851 out_free: 852 zpci_free_domain(zdev); 853 out: 854 return rc; 855 } 856 857 void zpci_stop_device(struct zpci_dev *zdev) 858 { 859 zpci_dma_exit_device(zdev); 860 /* 861 * Note: SCLP disables fh via set-pci-fn so don't 862 * do that here. 863 */ 864 } 865 EXPORT_SYMBOL_GPL(zpci_stop_device); 866 867 static inline int barsize(u8 size) 868 { 869 return (size) ? (1 << size) >> 10 : 0; 870 } 871 872 static int zpci_mem_init(void) 873 { 874 zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb), 875 16, 0, NULL); 876 if (!zdev_fmb_cache) 877 goto error_zdev; 878 879 /* TODO: use realloc */ 880 zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start), 881 GFP_KERNEL); 882 if (!zpci_iomap_start) 883 goto error_iomap; 884 return 0; 885 886 error_iomap: 887 kmem_cache_destroy(zdev_fmb_cache); 888 error_zdev: 889 return -ENOMEM; 890 } 891 892 static void zpci_mem_exit(void) 893 { 894 kfree(zpci_iomap_start); 895 kmem_cache_destroy(zdev_fmb_cache); 896 } 897 898 static unsigned int s390_pci_probe = 1; 899 static unsigned int s390_pci_initialized; 900 901 char * __init pcibios_setup(char *str) 902 { 903 if (!strcmp(str, "off")) { 904 s390_pci_probe = 0; 905 return NULL; 906 } 907 return str; 908 } 909 910 bool zpci_is_enabled(void) 911 { 912 return s390_pci_initialized; 913 } 914 915 static int __init pci_base_init(void) 916 { 917 int rc; 918 919 if (!s390_pci_probe) 920 return 0; 921 922 if (!test_facility(69) || !test_facility(71) || !test_facility(72)) 923 return 0; 924 925 rc = zpci_debug_init(); 926 if (rc) 927 goto out; 928 929 rc = zpci_mem_init(); 930 if (rc) 931 goto out_mem; 932 933 rc = zpci_irq_init(); 934 if (rc) 935 goto out_irq; 936 937 rc = zpci_dma_init(); 938 if (rc) 939 goto out_dma; 940 941 rc = clp_scan_pci_devices(); 942 if (rc) 943 goto out_find; 944 945 s390_pci_initialized = 1; 946 return 0; 947 948 out_find: 949 zpci_dma_exit(); 950 out_dma: 951 zpci_irq_exit(); 952 out_irq: 953 zpci_mem_exit(); 954 out_mem: 955 zpci_debug_exit(); 956 out: 957 return rc; 958 } 959 subsys_initcall_sync(pci_base_init); 960 961 void zpci_rescan(void) 962 { 963 if (zpci_is_enabled()) 964 clp_rescan_pci_devices_simple(); 965 } 966