1 /* 2 * Copyright IBM Corp. 2012 3 * 4 * Author(s): 5 * Jan Glauber <jang@linux.vnet.ibm.com> 6 * 7 * The System z PCI code is a rewrite from a prototype by 8 * the following people (Kudoz!): 9 * Alexander Schmidt 10 * Christoph Raisch 11 * Hannes Hering 12 * Hoang-Nam Nguyen 13 * Jan-Bernd Themann 14 * Stefan Roscher 15 * Thomas Klein 16 */ 17 18 #define COMPONENT "zPCI" 19 #define pr_fmt(fmt) COMPONENT ": " fmt 20 21 #include <linux/kernel.h> 22 #include <linux/slab.h> 23 #include <linux/err.h> 24 #include <linux/export.h> 25 #include <linux/delay.h> 26 #include <linux/irq.h> 27 #include <linux/kernel_stat.h> 28 #include <linux/seq_file.h> 29 #include <linux/pci.h> 30 #include <linux/msi.h> 31 32 #include <asm/isc.h> 33 #include <asm/airq.h> 34 #include <asm/facility.h> 35 #include <asm/pci_insn.h> 36 #include <asm/pci_clp.h> 37 #include <asm/pci_dma.h> 38 39 #define DEBUG /* enable pr_debug */ 40 41 #define SIC_IRQ_MODE_ALL 0 42 #define SIC_IRQ_MODE_SINGLE 1 43 44 #define ZPCI_NR_DMA_SPACES 1 45 #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS 46 47 /* list of all detected zpci devices */ 48 static LIST_HEAD(zpci_list); 49 static DEFINE_SPINLOCK(zpci_list_lock); 50 51 static void zpci_enable_irq(struct irq_data *data); 52 static void zpci_disable_irq(struct irq_data *data); 53 54 static struct irq_chip zpci_irq_chip = { 55 .name = "zPCI", 56 .irq_unmask = zpci_enable_irq, 57 .irq_mask = zpci_disable_irq, 58 }; 59 60 static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES); 61 static DEFINE_SPINLOCK(zpci_domain_lock); 62 63 static struct airq_iv *zpci_aisb_iv; 64 static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES]; 65 66 /* Adapter interrupt definitions */ 67 static void zpci_irq_handler(struct airq_struct *airq); 68 69 static struct airq_struct zpci_airq = { 70 .handler = zpci_irq_handler, 71 .isc = PCI_ISC, 72 }; 73 74 /* I/O Map */ 75 static DEFINE_SPINLOCK(zpci_iomap_lock); 76 static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); 77 struct zpci_iomap_entry *zpci_iomap_start; 78 EXPORT_SYMBOL_GPL(zpci_iomap_start); 79 80 static struct kmem_cache *zdev_fmb_cache; 81 82 struct zpci_dev *get_zdev(struct pci_dev *pdev) 83 { 84 return (struct zpci_dev *) pdev->sysdata; 85 } 86 87 struct zpci_dev *get_zdev_by_fid(u32 fid) 88 { 89 struct zpci_dev *tmp, *zdev = NULL; 90 91 spin_lock(&zpci_list_lock); 92 list_for_each_entry(tmp, &zpci_list, entry) { 93 if (tmp->fid == fid) { 94 zdev = tmp; 95 break; 96 } 97 } 98 spin_unlock(&zpci_list_lock); 99 return zdev; 100 } 101 102 static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus) 103 { 104 return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL; 105 } 106 107 int pci_domain_nr(struct pci_bus *bus) 108 { 109 return ((struct zpci_dev *) bus->sysdata)->domain; 110 } 111 EXPORT_SYMBOL_GPL(pci_domain_nr); 112 113 int pci_proc_domain(struct pci_bus *bus) 114 { 115 return pci_domain_nr(bus); 116 } 117 EXPORT_SYMBOL_GPL(pci_proc_domain); 118 119 /* Modify PCI: Register adapter interruptions */ 120 static int zpci_set_airq(struct zpci_dev *zdev) 121 { 122 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT); 123 struct zpci_fib *fib; 124 int rc; 125 126 fib = (void *) get_zeroed_page(GFP_KERNEL); 127 if (!fib) 128 return -ENOMEM; 129 130 fib->isc = PCI_ISC; 131 fib->sum = 1; /* enable summary notifications */ 132 fib->noi = airq_iv_end(zdev->aibv); 133 fib->aibv = (unsigned long) zdev->aibv->vector; 134 fib->aibvo = 0; /* each zdev has its own interrupt vector */ 135 fib->aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8; 136 fib->aisbo = zdev->aisb & 63; 137 138 rc = zpci_mod_fc(req, fib); 139 pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi); 140 141 free_page((unsigned long) fib); 142 return rc; 143 } 144 145 struct mod_pci_args { 146 u64 base; 147 u64 limit; 148 u64 iota; 149 u64 fmb_addr; 150 }; 151 152 static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args) 153 { 154 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn); 155 struct zpci_fib *fib; 156 int rc; 157 158 /* The FIB must be available even if it's not used */ 159 fib = (void *) get_zeroed_page(GFP_KERNEL); 160 if (!fib) 161 return -ENOMEM; 162 163 fib->pba = args->base; 164 fib->pal = args->limit; 165 fib->iota = args->iota; 166 fib->fmb_addr = args->fmb_addr; 167 168 rc = zpci_mod_fc(req, fib); 169 free_page((unsigned long) fib); 170 return rc; 171 } 172 173 /* Modify PCI: Register I/O address translation parameters */ 174 int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas, 175 u64 base, u64 limit, u64 iota) 176 { 177 struct mod_pci_args args = { base, limit, iota, 0 }; 178 179 WARN_ON_ONCE(iota & 0x3fff); 180 args.iota |= ZPCI_IOTA_RTTO_FLAG; 181 return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args); 182 } 183 184 /* Modify PCI: Unregister I/O address translation parameters */ 185 int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas) 186 { 187 struct mod_pci_args args = { 0, 0, 0, 0 }; 188 189 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args); 190 } 191 192 /* Modify PCI: Unregister adapter interruptions */ 193 static int zpci_clear_airq(struct zpci_dev *zdev) 194 { 195 struct mod_pci_args args = { 0, 0, 0, 0 }; 196 197 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args); 198 } 199 200 /* Modify PCI: Set PCI function measurement parameters */ 201 int zpci_fmb_enable_device(struct zpci_dev *zdev) 202 { 203 struct mod_pci_args args = { 0, 0, 0, 0 }; 204 205 if (zdev->fmb) 206 return -EINVAL; 207 208 zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL); 209 if (!zdev->fmb) 210 return -ENOMEM; 211 WARN_ON((u64) zdev->fmb & 0xf); 212 213 args.fmb_addr = virt_to_phys(zdev->fmb); 214 return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); 215 } 216 217 /* Modify PCI: Disable PCI function measurement */ 218 int zpci_fmb_disable_device(struct zpci_dev *zdev) 219 { 220 struct mod_pci_args args = { 0, 0, 0, 0 }; 221 int rc; 222 223 if (!zdev->fmb) 224 return -EINVAL; 225 226 /* Function measurement is disabled if fmb address is zero */ 227 rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args); 228 229 kmem_cache_free(zdev_fmb_cache, zdev->fmb); 230 zdev->fmb = NULL; 231 return rc; 232 } 233 234 #define ZPCI_PCIAS_CFGSPC 15 235 236 static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len) 237 { 238 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); 239 u64 data; 240 int rc; 241 242 rc = zpci_load(&data, req, offset); 243 if (!rc) { 244 data = data << ((8 - len) * 8); 245 data = le64_to_cpu(data); 246 *val = (u32) data; 247 } else 248 *val = 0xffffffff; 249 return rc; 250 } 251 252 static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len) 253 { 254 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len); 255 u64 data = val; 256 int rc; 257 258 data = cpu_to_le64(data); 259 data = data >> ((8 - len) * 8); 260 rc = zpci_store(data, req, offset); 261 return rc; 262 } 263 264 static int zpci_msi_set_mask_bits(struct msi_desc *msi, u32 mask, u32 flag) 265 { 266 int offset, pos; 267 u32 mask_bits; 268 269 if (msi->msi_attrib.is_msix) { 270 offset = msi->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + 271 PCI_MSIX_ENTRY_VECTOR_CTRL; 272 msi->masked = readl(msi->mask_base + offset); 273 writel(flag, msi->mask_base + offset); 274 } else if (msi->msi_attrib.maskbit) { 275 pos = (long) msi->mask_base; 276 pci_read_config_dword(msi->dev, pos, &mask_bits); 277 mask_bits &= ~(mask); 278 mask_bits |= flag & mask; 279 pci_write_config_dword(msi->dev, pos, mask_bits); 280 } else 281 return 0; 282 283 msi->msi_attrib.maskbit = !!flag; 284 return 1; 285 } 286 287 static void zpci_enable_irq(struct irq_data *data) 288 { 289 struct msi_desc *msi = irq_get_msi_desc(data->irq); 290 291 zpci_msi_set_mask_bits(msi, 1, 0); 292 } 293 294 static void zpci_disable_irq(struct irq_data *data) 295 { 296 struct msi_desc *msi = irq_get_msi_desc(data->irq); 297 298 zpci_msi_set_mask_bits(msi, 1, 1); 299 } 300 301 void pcibios_fixup_bus(struct pci_bus *bus) 302 { 303 } 304 305 resource_size_t pcibios_align_resource(void *data, const struct resource *res, 306 resource_size_t size, 307 resource_size_t align) 308 { 309 return 0; 310 } 311 312 /* combine single writes by using store-block insn */ 313 void __iowrite64_copy(void __iomem *to, const void *from, size_t count) 314 { 315 zpci_memcpy_toio(to, from, count); 316 } 317 318 /* Create a virtual mapping cookie for a PCI BAR */ 319 void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max) 320 { 321 struct zpci_dev *zdev = get_zdev(pdev); 322 u64 addr; 323 int idx; 324 325 if ((bar & 7) != bar) 326 return NULL; 327 328 idx = zdev->bars[bar].map_idx; 329 spin_lock(&zpci_iomap_lock); 330 zpci_iomap_start[idx].fh = zdev->fh; 331 zpci_iomap_start[idx].bar = bar; 332 spin_unlock(&zpci_iomap_lock); 333 334 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48); 335 return (void __iomem *) addr; 336 } 337 EXPORT_SYMBOL_GPL(pci_iomap); 338 339 void pci_iounmap(struct pci_dev *pdev, void __iomem *addr) 340 { 341 unsigned int idx; 342 343 idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48; 344 spin_lock(&zpci_iomap_lock); 345 zpci_iomap_start[idx].fh = 0; 346 zpci_iomap_start[idx].bar = 0; 347 spin_unlock(&zpci_iomap_lock); 348 } 349 EXPORT_SYMBOL_GPL(pci_iounmap); 350 351 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, 352 int size, u32 *val) 353 { 354 struct zpci_dev *zdev = get_zdev_by_bus(bus); 355 int ret; 356 357 if (!zdev || devfn != ZPCI_DEVFN) 358 ret = -ENODEV; 359 else 360 ret = zpci_cfg_load(zdev, where, val, size); 361 362 return ret; 363 } 364 365 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, 366 int size, u32 val) 367 { 368 struct zpci_dev *zdev = get_zdev_by_bus(bus); 369 int ret; 370 371 if (!zdev || devfn != ZPCI_DEVFN) 372 ret = -ENODEV; 373 else 374 ret = zpci_cfg_store(zdev, where, val, size); 375 376 return ret; 377 } 378 379 static struct pci_ops pci_root_ops = { 380 .read = pci_read, 381 .write = pci_write, 382 }; 383 384 static void zpci_irq_handler(struct airq_struct *airq) 385 { 386 unsigned long si, ai; 387 struct airq_iv *aibv; 388 int irqs_on = 0; 389 390 inc_irq_stat(IRQIO_PCI); 391 for (si = 0;;) { 392 /* Scan adapter summary indicator bit vector */ 393 si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv)); 394 if (si == -1UL) { 395 if (irqs_on++) 396 /* End of second scan with interrupts on. */ 397 break; 398 /* First scan complete, reenable interrupts. */ 399 zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); 400 si = 0; 401 continue; 402 } 403 404 /* Scan the adapter interrupt vector for this device. */ 405 aibv = zpci_aibv[si]; 406 for (ai = 0;;) { 407 ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv)); 408 if (ai == -1UL) 409 break; 410 inc_irq_stat(IRQIO_MSI); 411 airq_iv_lock(aibv, ai); 412 generic_handle_irq(airq_iv_get_data(aibv, ai)); 413 airq_iv_unlock(aibv, ai); 414 } 415 } 416 } 417 418 int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 419 { 420 struct zpci_dev *zdev = get_zdev(pdev); 421 unsigned int hwirq, irq, msi_vecs; 422 unsigned long aisb; 423 struct msi_desc *msi; 424 struct msi_msg msg; 425 int rc; 426 427 pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec); 428 if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI) 429 return -EINVAL; 430 msi_vecs = min(nvec, ZPCI_MSI_VEC_MAX); 431 msi_vecs = min_t(unsigned int, msi_vecs, CONFIG_PCI_NR_MSI); 432 433 /* Allocate adapter summary indicator bit */ 434 rc = -EIO; 435 aisb = airq_iv_alloc_bit(zpci_aisb_iv); 436 if (aisb == -1UL) 437 goto out; 438 zdev->aisb = aisb; 439 440 /* Create adapter interrupt vector */ 441 rc = -ENOMEM; 442 zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK); 443 if (!zdev->aibv) 444 goto out_si; 445 446 /* Wire up shortcut pointer */ 447 zpci_aibv[aisb] = zdev->aibv; 448 449 /* Request MSI interrupts */ 450 hwirq = 0; 451 list_for_each_entry(msi, &pdev->msi_list, list) { 452 rc = -EIO; 453 irq = irq_alloc_desc(0); /* Alloc irq on node 0 */ 454 if (irq == NO_IRQ) 455 goto out_msi; 456 rc = irq_set_msi_desc(irq, msi); 457 if (rc) 458 goto out_msi; 459 irq_set_chip_and_handler(irq, &zpci_irq_chip, 460 handle_simple_irq); 461 msg.data = hwirq; 462 msg.address_lo = zdev->msi_addr & 0xffffffff; 463 msg.address_hi = zdev->msi_addr >> 32; 464 write_msi_msg(irq, &msg); 465 airq_iv_set_data(zdev->aibv, hwirq, irq); 466 hwirq++; 467 } 468 469 /* Enable adapter interrupts */ 470 rc = zpci_set_airq(zdev); 471 if (rc) 472 goto out_msi; 473 474 return (msi_vecs == nvec) ? 0 : msi_vecs; 475 476 out_msi: 477 list_for_each_entry(msi, &pdev->msi_list, list) { 478 if (hwirq-- == 0) 479 break; 480 irq_set_msi_desc(msi->irq, NULL); 481 irq_free_desc(msi->irq); 482 msi->msg.address_lo = 0; 483 msi->msg.address_hi = 0; 484 msi->msg.data = 0; 485 msi->irq = 0; 486 } 487 zpci_aibv[aisb] = NULL; 488 airq_iv_release(zdev->aibv); 489 out_si: 490 airq_iv_free_bit(zpci_aisb_iv, aisb); 491 out: 492 dev_err(&pdev->dev, "register MSI failed with: %d\n", rc); 493 return rc; 494 } 495 496 void arch_teardown_msi_irqs(struct pci_dev *pdev) 497 { 498 struct zpci_dev *zdev = get_zdev(pdev); 499 struct msi_desc *msi; 500 int rc; 501 502 pr_info("%s: on pdev: %p\n", __func__, pdev); 503 504 /* Disable adapter interrupts */ 505 rc = zpci_clear_airq(zdev); 506 if (rc) { 507 dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc); 508 return; 509 } 510 511 /* Release MSI interrupts */ 512 list_for_each_entry(msi, &pdev->msi_list, list) { 513 zpci_msi_set_mask_bits(msi, 1, 1); 514 irq_set_msi_desc(msi->irq, NULL); 515 irq_free_desc(msi->irq); 516 msi->msg.address_lo = 0; 517 msi->msg.address_hi = 0; 518 msi->msg.data = 0; 519 msi->irq = 0; 520 } 521 522 zpci_aibv[zdev->aisb] = NULL; 523 airq_iv_release(zdev->aibv); 524 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); 525 } 526 527 static void zpci_map_resources(struct zpci_dev *zdev) 528 { 529 struct pci_dev *pdev = zdev->pdev; 530 resource_size_t len; 531 int i; 532 533 for (i = 0; i < PCI_BAR_COUNT; i++) { 534 len = pci_resource_len(pdev, i); 535 if (!len) 536 continue; 537 pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0); 538 pdev->resource[i].end = pdev->resource[i].start + len - 1; 539 } 540 } 541 542 static void zpci_unmap_resources(struct zpci_dev *zdev) 543 { 544 struct pci_dev *pdev = zdev->pdev; 545 resource_size_t len; 546 int i; 547 548 for (i = 0; i < PCI_BAR_COUNT; i++) { 549 len = pci_resource_len(pdev, i); 550 if (!len) 551 continue; 552 pci_iounmap(pdev, (void *) pdev->resource[i].start); 553 } 554 } 555 556 struct zpci_dev *zpci_alloc_device(void) 557 { 558 struct zpci_dev *zdev; 559 560 /* Alloc memory for our private pci device data */ 561 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); 562 return zdev ? : ERR_PTR(-ENOMEM); 563 } 564 565 void zpci_free_device(struct zpci_dev *zdev) 566 { 567 kfree(zdev); 568 } 569 570 int pcibios_add_platform_entries(struct pci_dev *pdev) 571 { 572 return zpci_sysfs_add_device(&pdev->dev); 573 } 574 575 static int __init zpci_irq_init(void) 576 { 577 int rc; 578 579 rc = register_adapter_interrupt(&zpci_airq); 580 if (rc) 581 goto out; 582 /* Set summary to 1 to be called every time for the ISC. */ 583 *zpci_airq.lsi_ptr = 1; 584 585 rc = -ENOMEM; 586 zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC); 587 if (!zpci_aisb_iv) 588 goto out_airq; 589 590 zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC); 591 return 0; 592 593 out_airq: 594 unregister_adapter_interrupt(&zpci_airq); 595 out: 596 return rc; 597 } 598 599 static void zpci_irq_exit(void) 600 { 601 airq_iv_release(zpci_aisb_iv); 602 unregister_adapter_interrupt(&zpci_airq); 603 } 604 605 static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size, 606 unsigned long flags, int domain) 607 { 608 struct resource *r; 609 char *name; 610 int rc; 611 612 r = kzalloc(sizeof(*r), GFP_KERNEL); 613 if (!r) 614 return ERR_PTR(-ENOMEM); 615 r->start = start; 616 r->end = r->start + size - 1; 617 r->flags = flags; 618 r->parent = &iomem_resource; 619 name = kmalloc(18, GFP_KERNEL); 620 if (!name) { 621 kfree(r); 622 return ERR_PTR(-ENOMEM); 623 } 624 sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR); 625 r->name = name; 626 627 rc = request_resource(&iomem_resource, r); 628 if (rc) 629 pr_debug("request resource %pR failed\n", r); 630 return r; 631 } 632 633 static int zpci_alloc_iomap(struct zpci_dev *zdev) 634 { 635 int entry; 636 637 spin_lock(&zpci_iomap_lock); 638 entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES); 639 if (entry == ZPCI_IOMAP_MAX_ENTRIES) { 640 spin_unlock(&zpci_iomap_lock); 641 return -ENOSPC; 642 } 643 set_bit(entry, zpci_iomap); 644 spin_unlock(&zpci_iomap_lock); 645 return entry; 646 } 647 648 static void zpci_free_iomap(struct zpci_dev *zdev, int entry) 649 { 650 spin_lock(&zpci_iomap_lock); 651 memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry)); 652 clear_bit(entry, zpci_iomap); 653 spin_unlock(&zpci_iomap_lock); 654 } 655 656 int pcibios_add_device(struct pci_dev *pdev) 657 { 658 struct zpci_dev *zdev = get_zdev(pdev); 659 struct resource *res; 660 int i; 661 662 zdev->pdev = pdev; 663 zpci_map_resources(zdev); 664 665 for (i = 0; i < PCI_BAR_COUNT; i++) { 666 res = &pdev->resource[i]; 667 if (res->parent || !res->flags) 668 continue; 669 pci_claim_resource(pdev, i); 670 } 671 672 return 0; 673 } 674 675 int pcibios_enable_device(struct pci_dev *pdev, int mask) 676 { 677 struct zpci_dev *zdev = get_zdev(pdev); 678 struct resource *res; 679 u16 cmd; 680 int i; 681 682 zdev->pdev = pdev; 683 zpci_debug_init_device(zdev); 684 zpci_fmb_enable_device(zdev); 685 zpci_map_resources(zdev); 686 687 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 688 for (i = 0; i < PCI_BAR_COUNT; i++) { 689 res = &pdev->resource[i]; 690 691 if (res->flags & IORESOURCE_IO) 692 return -EINVAL; 693 694 if (res->flags & IORESOURCE_MEM) 695 cmd |= PCI_COMMAND_MEMORY; 696 } 697 pci_write_config_word(pdev, PCI_COMMAND, cmd); 698 return 0; 699 } 700 701 void pcibios_disable_device(struct pci_dev *pdev) 702 { 703 struct zpci_dev *zdev = get_zdev(pdev); 704 705 zpci_unmap_resources(zdev); 706 zpci_fmb_disable_device(zdev); 707 zpci_debug_exit_device(zdev); 708 zdev->pdev = NULL; 709 } 710 711 static int zpci_scan_bus(struct zpci_dev *zdev) 712 { 713 struct resource *res; 714 LIST_HEAD(resources); 715 int i; 716 717 /* allocate mapping entry for each used bar */ 718 for (i = 0; i < PCI_BAR_COUNT; i++) { 719 unsigned long addr, size, flags; 720 int entry; 721 722 if (!zdev->bars[i].size) 723 continue; 724 entry = zpci_alloc_iomap(zdev); 725 if (entry < 0) 726 return entry; 727 zdev->bars[i].map_idx = entry; 728 729 /* only MMIO is supported */ 730 flags = IORESOURCE_MEM; 731 if (zdev->bars[i].val & 8) 732 flags |= IORESOURCE_PREFETCH; 733 if (zdev->bars[i].val & 4) 734 flags |= IORESOURCE_MEM_64; 735 736 addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48); 737 738 size = 1UL << zdev->bars[i].size; 739 740 res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain); 741 if (IS_ERR(res)) { 742 zpci_free_iomap(zdev, entry); 743 return PTR_ERR(res); 744 } 745 pci_add_resource(&resources, res); 746 } 747 748 zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops, 749 zdev, &resources); 750 if (!zdev->bus) 751 return -EIO; 752 753 zdev->bus->max_bus_speed = zdev->max_bus_speed; 754 return 0; 755 } 756 757 static int zpci_alloc_domain(struct zpci_dev *zdev) 758 { 759 spin_lock(&zpci_domain_lock); 760 zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES); 761 if (zdev->domain == ZPCI_NR_DEVICES) { 762 spin_unlock(&zpci_domain_lock); 763 return -ENOSPC; 764 } 765 set_bit(zdev->domain, zpci_domain); 766 spin_unlock(&zpci_domain_lock); 767 return 0; 768 } 769 770 static void zpci_free_domain(struct zpci_dev *zdev) 771 { 772 spin_lock(&zpci_domain_lock); 773 clear_bit(zdev->domain, zpci_domain); 774 spin_unlock(&zpci_domain_lock); 775 } 776 777 int zpci_enable_device(struct zpci_dev *zdev) 778 { 779 int rc; 780 781 rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES); 782 if (rc) 783 goto out; 784 pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid); 785 786 rc = zpci_dma_init_device(zdev); 787 if (rc) 788 goto out_dma; 789 790 zdev->state = ZPCI_FN_STATE_ONLINE; 791 return 0; 792 793 out_dma: 794 clp_disable_fh(zdev); 795 out: 796 return rc; 797 } 798 EXPORT_SYMBOL_GPL(zpci_enable_device); 799 800 int zpci_disable_device(struct zpci_dev *zdev) 801 { 802 zpci_dma_exit_device(zdev); 803 return clp_disable_fh(zdev); 804 } 805 EXPORT_SYMBOL_GPL(zpci_disable_device); 806 807 int zpci_create_device(struct zpci_dev *zdev) 808 { 809 int rc; 810 811 rc = zpci_alloc_domain(zdev); 812 if (rc) 813 goto out; 814 815 if (zdev->state == ZPCI_FN_STATE_CONFIGURED) { 816 rc = zpci_enable_device(zdev); 817 if (rc) 818 goto out_free; 819 } 820 rc = zpci_scan_bus(zdev); 821 if (rc) 822 goto out_disable; 823 824 spin_lock(&zpci_list_lock); 825 list_add_tail(&zdev->entry, &zpci_list); 826 spin_unlock(&zpci_list_lock); 827 828 zpci_init_slot(zdev); 829 830 return 0; 831 832 out_disable: 833 if (zdev->state == ZPCI_FN_STATE_ONLINE) 834 zpci_disable_device(zdev); 835 out_free: 836 zpci_free_domain(zdev); 837 out: 838 return rc; 839 } 840 841 void zpci_stop_device(struct zpci_dev *zdev) 842 { 843 zpci_dma_exit_device(zdev); 844 /* 845 * Note: SCLP disables fh via set-pci-fn so don't 846 * do that here. 847 */ 848 } 849 EXPORT_SYMBOL_GPL(zpci_stop_device); 850 851 static inline int barsize(u8 size) 852 { 853 return (size) ? (1 << size) >> 10 : 0; 854 } 855 856 static int zpci_mem_init(void) 857 { 858 zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb), 859 16, 0, NULL); 860 if (!zdev_fmb_cache) 861 goto error_zdev; 862 863 /* TODO: use realloc */ 864 zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start), 865 GFP_KERNEL); 866 if (!zpci_iomap_start) 867 goto error_iomap; 868 return 0; 869 870 error_iomap: 871 kmem_cache_destroy(zdev_fmb_cache); 872 error_zdev: 873 return -ENOMEM; 874 } 875 876 static void zpci_mem_exit(void) 877 { 878 kfree(zpci_iomap_start); 879 kmem_cache_destroy(zdev_fmb_cache); 880 } 881 882 static unsigned int s390_pci_probe; 883 884 char * __init pcibios_setup(char *str) 885 { 886 if (!strcmp(str, "on")) { 887 s390_pci_probe = 1; 888 return NULL; 889 } 890 return str; 891 } 892 893 static int __init pci_base_init(void) 894 { 895 int rc; 896 897 if (!s390_pci_probe) 898 return 0; 899 900 if (!test_facility(2) || !test_facility(69) 901 || !test_facility(71) || !test_facility(72)) 902 return 0; 903 904 pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n", 905 test_facility(69), test_facility(70), 906 test_facility(71)); 907 908 rc = zpci_debug_init(); 909 if (rc) 910 goto out; 911 912 rc = zpci_mem_init(); 913 if (rc) 914 goto out_mem; 915 916 rc = zpci_irq_init(); 917 if (rc) 918 goto out_irq; 919 920 rc = zpci_dma_init(); 921 if (rc) 922 goto out_dma; 923 924 rc = clp_scan_pci_devices(); 925 if (rc) 926 goto out_find; 927 928 return 0; 929 930 out_find: 931 zpci_dma_exit(); 932 out_dma: 933 zpci_irq_exit(); 934 out_irq: 935 zpci_mem_exit(); 936 out_mem: 937 zpci_debug_exit(); 938 out: 939 return rc; 940 } 941 subsys_initcall_sync(pci_base_init); 942 943 void zpci_rescan(void) 944 { 945 clp_rescan_pci_devices_simple(); 946 } 947