1 /* 2 * BPF Jit compiler for s390. 3 * 4 * Minimum build requirements: 5 * 6 * - HAVE_MARCH_Z196_FEATURES: laal, laalg 7 * - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj 8 * - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf 9 * - PACK_STACK 10 * - 64BIT 11 * 12 * Copyright IBM Corp. 2012,2015 13 * 14 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> 15 * Michael Holzheu <holzheu@linux.vnet.ibm.com> 16 */ 17 18 #define KMSG_COMPONENT "bpf_jit" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/netdevice.h> 22 #include <linux/filter.h> 23 #include <linux/init.h> 24 #include <linux/bpf.h> 25 #include <asm/cacheflush.h> 26 #include <asm/dis.h> 27 #include "bpf_jit.h" 28 29 int bpf_jit_enable __read_mostly; 30 31 struct bpf_jit { 32 u32 seen; /* Flags to remember seen eBPF instructions */ 33 u32 seen_reg[16]; /* Array to remember which registers are used */ 34 u32 *addrs; /* Array with relative instruction addresses */ 35 u8 *prg_buf; /* Start of program */ 36 int size; /* Size of program and literal pool */ 37 int size_prg; /* Size of program */ 38 int prg; /* Current position in program */ 39 int lit_start; /* Start of literal pool */ 40 int lit; /* Current position in literal pool */ 41 int base_ip; /* Base address for literal pool */ 42 int ret0_ip; /* Address of return 0 */ 43 int exit_ip; /* Address of exit */ 44 int tail_call_start; /* Tail call start offset */ 45 int labels[1]; /* Labels for local jumps */ 46 }; 47 48 #define BPF_SIZE_MAX 0xffff /* Max size for program (16 bit branches) */ 49 50 #define SEEN_SKB 1 /* skb access */ 51 #define SEEN_MEM 2 /* use mem[] for temporary storage */ 52 #define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */ 53 #define SEEN_LITERAL 8 /* code uses literals */ 54 #define SEEN_FUNC 16 /* calls C functions */ 55 #define SEEN_TAIL_CALL 32 /* code uses tail calls */ 56 #define SEEN_SKB_CHANGE 64 /* code changes skb data */ 57 #define SEEN_REG_AX 128 /* code uses constant blinding */ 58 #define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB) 59 60 /* 61 * s390 registers 62 */ 63 #define REG_W0 (MAX_BPF_JIT_REG + 0) /* Work register 1 (even) */ 64 #define REG_W1 (MAX_BPF_JIT_REG + 1) /* Work register 2 (odd) */ 65 #define REG_SKB_DATA (MAX_BPF_JIT_REG + 2) /* SKB data register */ 66 #define REG_L (MAX_BPF_JIT_REG + 3) /* Literal pool register */ 67 #define REG_15 (MAX_BPF_JIT_REG + 4) /* Register 15 */ 68 #define REG_0 REG_W0 /* Register 0 */ 69 #define REG_1 REG_W1 /* Register 1 */ 70 #define REG_2 BPF_REG_1 /* Register 2 */ 71 #define REG_14 BPF_REG_0 /* Register 14 */ 72 73 /* 74 * Mapping of BPF registers to s390 registers 75 */ 76 static const int reg2hex[] = { 77 /* Return code */ 78 [BPF_REG_0] = 14, 79 /* Function parameters */ 80 [BPF_REG_1] = 2, 81 [BPF_REG_2] = 3, 82 [BPF_REG_3] = 4, 83 [BPF_REG_4] = 5, 84 [BPF_REG_5] = 6, 85 /* Call saved registers */ 86 [BPF_REG_6] = 7, 87 [BPF_REG_7] = 8, 88 [BPF_REG_8] = 9, 89 [BPF_REG_9] = 10, 90 /* BPF stack pointer */ 91 [BPF_REG_FP] = 13, 92 /* Register for blinding (shared with REG_SKB_DATA) */ 93 [BPF_REG_AX] = 12, 94 /* SKB data pointer */ 95 [REG_SKB_DATA] = 12, 96 /* Work registers for s390x backend */ 97 [REG_W0] = 0, 98 [REG_W1] = 1, 99 [REG_L] = 11, 100 [REG_15] = 15, 101 }; 102 103 static inline u32 reg(u32 dst_reg, u32 src_reg) 104 { 105 return reg2hex[dst_reg] << 4 | reg2hex[src_reg]; 106 } 107 108 static inline u32 reg_high(u32 reg) 109 { 110 return reg2hex[reg] << 4; 111 } 112 113 static inline void reg_set_seen(struct bpf_jit *jit, u32 b1) 114 { 115 u32 r1 = reg2hex[b1]; 116 117 if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15) 118 jit->seen_reg[r1] = 1; 119 } 120 121 #define REG_SET_SEEN(b1) \ 122 ({ \ 123 reg_set_seen(jit, b1); \ 124 }) 125 126 #define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]] 127 128 /* 129 * EMIT macros for code generation 130 */ 131 132 #define _EMIT2(op) \ 133 ({ \ 134 if (jit->prg_buf) \ 135 *(u16 *) (jit->prg_buf + jit->prg) = op; \ 136 jit->prg += 2; \ 137 }) 138 139 #define EMIT2(op, b1, b2) \ 140 ({ \ 141 _EMIT2(op | reg(b1, b2)); \ 142 REG_SET_SEEN(b1); \ 143 REG_SET_SEEN(b2); \ 144 }) 145 146 #define _EMIT4(op) \ 147 ({ \ 148 if (jit->prg_buf) \ 149 *(u32 *) (jit->prg_buf + jit->prg) = op; \ 150 jit->prg += 4; \ 151 }) 152 153 #define EMIT4(op, b1, b2) \ 154 ({ \ 155 _EMIT4(op | reg(b1, b2)); \ 156 REG_SET_SEEN(b1); \ 157 REG_SET_SEEN(b2); \ 158 }) 159 160 #define EMIT4_RRF(op, b1, b2, b3) \ 161 ({ \ 162 _EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \ 163 REG_SET_SEEN(b1); \ 164 REG_SET_SEEN(b2); \ 165 REG_SET_SEEN(b3); \ 166 }) 167 168 #define _EMIT4_DISP(op, disp) \ 169 ({ \ 170 unsigned int __disp = (disp) & 0xfff; \ 171 _EMIT4(op | __disp); \ 172 }) 173 174 #define EMIT4_DISP(op, b1, b2, disp) \ 175 ({ \ 176 _EMIT4_DISP(op | reg_high(b1) << 16 | \ 177 reg_high(b2) << 8, disp); \ 178 REG_SET_SEEN(b1); \ 179 REG_SET_SEEN(b2); \ 180 }) 181 182 #define EMIT4_IMM(op, b1, imm) \ 183 ({ \ 184 unsigned int __imm = (imm) & 0xffff; \ 185 _EMIT4(op | reg_high(b1) << 16 | __imm); \ 186 REG_SET_SEEN(b1); \ 187 }) 188 189 #define EMIT4_PCREL(op, pcrel) \ 190 ({ \ 191 long __pcrel = ((pcrel) >> 1) & 0xffff; \ 192 _EMIT4(op | __pcrel); \ 193 }) 194 195 #define _EMIT6(op1, op2) \ 196 ({ \ 197 if (jit->prg_buf) { \ 198 *(u32 *) (jit->prg_buf + jit->prg) = op1; \ 199 *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \ 200 } \ 201 jit->prg += 6; \ 202 }) 203 204 #define _EMIT6_DISP(op1, op2, disp) \ 205 ({ \ 206 unsigned int __disp = (disp) & 0xfff; \ 207 _EMIT6(op1 | __disp, op2); \ 208 }) 209 210 #define _EMIT6_DISP_LH(op1, op2, disp) \ 211 ({ \ 212 u32 _disp = (u32) disp; \ 213 unsigned int __disp_h = _disp & 0xff000; \ 214 unsigned int __disp_l = _disp & 0x00fff; \ 215 _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \ 216 }) 217 218 #define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \ 219 ({ \ 220 _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \ 221 reg_high(b3) << 8, op2, disp); \ 222 REG_SET_SEEN(b1); \ 223 REG_SET_SEEN(b2); \ 224 REG_SET_SEEN(b3); \ 225 }) 226 227 #define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask) \ 228 ({ \ 229 int rel = (jit->labels[label] - jit->prg) >> 1; \ 230 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), \ 231 op2 | mask << 12); \ 232 REG_SET_SEEN(b1); \ 233 REG_SET_SEEN(b2); \ 234 }) 235 236 #define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \ 237 ({ \ 238 int rel = (jit->labels[label] - jit->prg) >> 1; \ 239 _EMIT6(op1 | (reg_high(b1) | mask) << 16 | \ 240 (rel & 0xffff), op2 | (imm & 0xff) << 8); \ 241 REG_SET_SEEN(b1); \ 242 BUILD_BUG_ON(((unsigned long) imm) > 0xff); \ 243 }) 244 245 #define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \ 246 ({ \ 247 /* Branch instruction needs 6 bytes */ \ 248 int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\ 249 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask); \ 250 REG_SET_SEEN(b1); \ 251 REG_SET_SEEN(b2); \ 252 }) 253 254 #define _EMIT6_IMM(op, imm) \ 255 ({ \ 256 unsigned int __imm = (imm); \ 257 _EMIT6(op | (__imm >> 16), __imm & 0xffff); \ 258 }) 259 260 #define EMIT6_IMM(op, b1, imm) \ 261 ({ \ 262 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \ 263 REG_SET_SEEN(b1); \ 264 }) 265 266 #define EMIT_CONST_U32(val) \ 267 ({ \ 268 unsigned int ret; \ 269 ret = jit->lit - jit->base_ip; \ 270 jit->seen |= SEEN_LITERAL; \ 271 if (jit->prg_buf) \ 272 *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \ 273 jit->lit += 4; \ 274 ret; \ 275 }) 276 277 #define EMIT_CONST_U64(val) \ 278 ({ \ 279 unsigned int ret; \ 280 ret = jit->lit - jit->base_ip; \ 281 jit->seen |= SEEN_LITERAL; \ 282 if (jit->prg_buf) \ 283 *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \ 284 jit->lit += 8; \ 285 ret; \ 286 }) 287 288 #define EMIT_ZERO(b1) \ 289 ({ \ 290 /* llgfr %dst,%dst (zero extend to 64 bit) */ \ 291 EMIT4(0xb9160000, b1, b1); \ 292 REG_SET_SEEN(b1); \ 293 }) 294 295 /* 296 * Fill whole space with illegal instructions 297 */ 298 static void jit_fill_hole(void *area, unsigned int size) 299 { 300 memset(area, 0, size); 301 } 302 303 /* 304 * Save registers from "rs" (register start) to "re" (register end) on stack 305 */ 306 static void save_regs(struct bpf_jit *jit, u32 rs, u32 re) 307 { 308 u32 off = STK_OFF_R6 + (rs - 6) * 8; 309 310 if (rs == re) 311 /* stg %rs,off(%r15) */ 312 _EMIT6(0xe300f000 | rs << 20 | off, 0x0024); 313 else 314 /* stmg %rs,%re,off(%r15) */ 315 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off); 316 } 317 318 /* 319 * Restore registers from "rs" (register start) to "re" (register end) on stack 320 */ 321 static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re) 322 { 323 u32 off = STK_OFF_R6 + (rs - 6) * 8; 324 325 if (jit->seen & SEEN_STACK) 326 off += STK_OFF; 327 328 if (rs == re) 329 /* lg %rs,off(%r15) */ 330 _EMIT6(0xe300f000 | rs << 20 | off, 0x0004); 331 else 332 /* lmg %rs,%re,off(%r15) */ 333 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off); 334 } 335 336 /* 337 * Return first seen register (from start) 338 */ 339 static int get_start(struct bpf_jit *jit, int start) 340 { 341 int i; 342 343 for (i = start; i <= 15; i++) { 344 if (jit->seen_reg[i]) 345 return i; 346 } 347 return 0; 348 } 349 350 /* 351 * Return last seen register (from start) (gap >= 2) 352 */ 353 static int get_end(struct bpf_jit *jit, int start) 354 { 355 int i; 356 357 for (i = start; i < 15; i++) { 358 if (!jit->seen_reg[i] && !jit->seen_reg[i + 1]) 359 return i - 1; 360 } 361 return jit->seen_reg[15] ? 15 : 14; 362 } 363 364 #define REGS_SAVE 1 365 #define REGS_RESTORE 0 366 /* 367 * Save and restore clobbered registers (6-15) on stack. 368 * We save/restore registers in chunks with gap >= 2 registers. 369 */ 370 static void save_restore_regs(struct bpf_jit *jit, int op) 371 { 372 373 int re = 6, rs; 374 375 do { 376 rs = get_start(jit, re); 377 if (!rs) 378 break; 379 re = get_end(jit, rs + 1); 380 if (op == REGS_SAVE) 381 save_regs(jit, rs, re); 382 else 383 restore_regs(jit, rs, re); 384 re++; 385 } while (re <= 15); 386 } 387 388 /* 389 * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S" 390 * we store the SKB header length on the stack and the SKB data 391 * pointer in REG_SKB_DATA if BPF_REG_AX is not used. 392 */ 393 static void emit_load_skb_data_hlen(struct bpf_jit *jit) 394 { 395 /* Header length: llgf %w1,<len>(%b1) */ 396 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1, 397 offsetof(struct sk_buff, len)); 398 /* s %w1,<data_len>(%b1) */ 399 EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1, 400 offsetof(struct sk_buff, data_len)); 401 /* stg %w1,ST_OFF_HLEN(%r0,%r15) */ 402 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15, STK_OFF_HLEN); 403 if (!(jit->seen & SEEN_REG_AX)) 404 /* lg %skb_data,data_off(%b1) */ 405 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0, 406 BPF_REG_1, offsetof(struct sk_buff, data)); 407 } 408 409 /* 410 * Emit function prologue 411 * 412 * Save registers and create stack frame if necessary. 413 * See stack frame layout desription in "bpf_jit.h"! 414 */ 415 static void bpf_jit_prologue(struct bpf_jit *jit) 416 { 417 if (jit->seen & SEEN_TAIL_CALL) { 418 /* xc STK_OFF_TCCNT(4,%r15),STK_OFF_TCCNT(%r15) */ 419 _EMIT6(0xd703f000 | STK_OFF_TCCNT, 0xf000 | STK_OFF_TCCNT); 420 } else { 421 /* j tail_call_start: NOP if no tail calls are used */ 422 EMIT4_PCREL(0xa7f40000, 6); 423 _EMIT2(0); 424 } 425 /* Tail calls have to skip above initialization */ 426 jit->tail_call_start = jit->prg; 427 /* Save registers */ 428 save_restore_regs(jit, REGS_SAVE); 429 /* Setup literal pool */ 430 if (jit->seen & SEEN_LITERAL) { 431 /* basr %r13,0 */ 432 EMIT2(0x0d00, REG_L, REG_0); 433 jit->base_ip = jit->prg; 434 } 435 /* Setup stack and backchain */ 436 if (jit->seen & SEEN_STACK) { 437 if (jit->seen & SEEN_FUNC) 438 /* lgr %w1,%r15 (backchain) */ 439 EMIT4(0xb9040000, REG_W1, REG_15); 440 /* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */ 441 EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED); 442 /* aghi %r15,-STK_OFF */ 443 EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF); 444 if (jit->seen & SEEN_FUNC) 445 /* stg %w1,152(%r15) (backchain) */ 446 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, 447 REG_15, 152); 448 } 449 if (jit->seen & SEEN_SKB) 450 emit_load_skb_data_hlen(jit); 451 if (jit->seen & SEEN_SKB_CHANGE) 452 /* stg %b1,ST_OFF_SKBP(%r0,%r15) */ 453 EMIT6_DISP_LH(0xe3000000, 0x0024, BPF_REG_1, REG_0, REG_15, 454 STK_OFF_SKBP); 455 } 456 457 /* 458 * Function epilogue 459 */ 460 static void bpf_jit_epilogue(struct bpf_jit *jit) 461 { 462 /* Return 0 */ 463 if (jit->seen & SEEN_RET0) { 464 jit->ret0_ip = jit->prg; 465 /* lghi %b0,0 */ 466 EMIT4_IMM(0xa7090000, BPF_REG_0, 0); 467 } 468 jit->exit_ip = jit->prg; 469 /* Load exit code: lgr %r2,%b0 */ 470 EMIT4(0xb9040000, REG_2, BPF_REG_0); 471 /* Restore registers */ 472 save_restore_regs(jit, REGS_RESTORE); 473 /* br %r14 */ 474 _EMIT2(0x07fe); 475 } 476 477 /* 478 * Compile one eBPF instruction into s390x code 479 * 480 * NOTE: Use noinline because for gcov (-fprofile-arcs) gcc allocates a lot of 481 * stack space for the large switch statement. 482 */ 483 static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i) 484 { 485 struct bpf_insn *insn = &fp->insnsi[i]; 486 int jmp_off, last, insn_count = 1; 487 unsigned int func_addr, mask; 488 u32 dst_reg = insn->dst_reg; 489 u32 src_reg = insn->src_reg; 490 u32 *addrs = jit->addrs; 491 s32 imm = insn->imm; 492 s16 off = insn->off; 493 494 if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX) 495 jit->seen |= SEEN_REG_AX; 496 switch (insn->code) { 497 /* 498 * BPF_MOV 499 */ 500 case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */ 501 /* llgfr %dst,%src */ 502 EMIT4(0xb9160000, dst_reg, src_reg); 503 break; 504 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ 505 /* lgr %dst,%src */ 506 EMIT4(0xb9040000, dst_reg, src_reg); 507 break; 508 case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */ 509 /* llilf %dst,imm */ 510 EMIT6_IMM(0xc00f0000, dst_reg, imm); 511 break; 512 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */ 513 /* lgfi %dst,imm */ 514 EMIT6_IMM(0xc0010000, dst_reg, imm); 515 break; 516 /* 517 * BPF_LD 64 518 */ 519 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */ 520 { 521 /* 16 byte instruction that uses two 'struct bpf_insn' */ 522 u64 imm64; 523 524 imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32; 525 /* lg %dst,<d(imm)>(%l) */ 526 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L, 527 EMIT_CONST_U64(imm64)); 528 insn_count = 2; 529 break; 530 } 531 /* 532 * BPF_ADD 533 */ 534 case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */ 535 /* ar %dst,%src */ 536 EMIT2(0x1a00, dst_reg, src_reg); 537 EMIT_ZERO(dst_reg); 538 break; 539 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */ 540 /* agr %dst,%src */ 541 EMIT4(0xb9080000, dst_reg, src_reg); 542 break; 543 case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */ 544 if (!imm) 545 break; 546 /* alfi %dst,imm */ 547 EMIT6_IMM(0xc20b0000, dst_reg, imm); 548 EMIT_ZERO(dst_reg); 549 break; 550 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */ 551 if (!imm) 552 break; 553 /* agfi %dst,imm */ 554 EMIT6_IMM(0xc2080000, dst_reg, imm); 555 break; 556 /* 557 * BPF_SUB 558 */ 559 case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */ 560 /* sr %dst,%src */ 561 EMIT2(0x1b00, dst_reg, src_reg); 562 EMIT_ZERO(dst_reg); 563 break; 564 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */ 565 /* sgr %dst,%src */ 566 EMIT4(0xb9090000, dst_reg, src_reg); 567 break; 568 case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */ 569 if (!imm) 570 break; 571 /* alfi %dst,-imm */ 572 EMIT6_IMM(0xc20b0000, dst_reg, -imm); 573 EMIT_ZERO(dst_reg); 574 break; 575 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */ 576 if (!imm) 577 break; 578 /* agfi %dst,-imm */ 579 EMIT6_IMM(0xc2080000, dst_reg, -imm); 580 break; 581 /* 582 * BPF_MUL 583 */ 584 case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */ 585 /* msr %dst,%src */ 586 EMIT4(0xb2520000, dst_reg, src_reg); 587 EMIT_ZERO(dst_reg); 588 break; 589 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */ 590 /* msgr %dst,%src */ 591 EMIT4(0xb90c0000, dst_reg, src_reg); 592 break; 593 case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */ 594 if (imm == 1) 595 break; 596 /* msfi %r5,imm */ 597 EMIT6_IMM(0xc2010000, dst_reg, imm); 598 EMIT_ZERO(dst_reg); 599 break; 600 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */ 601 if (imm == 1) 602 break; 603 /* msgfi %dst,imm */ 604 EMIT6_IMM(0xc2000000, dst_reg, imm); 605 break; 606 /* 607 * BPF_DIV / BPF_MOD 608 */ 609 case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */ 610 case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */ 611 { 612 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 613 614 jit->seen |= SEEN_RET0; 615 /* ltr %src,%src (if src == 0 goto fail) */ 616 EMIT2(0x1200, src_reg, src_reg); 617 /* jz <ret0> */ 618 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 619 /* lhi %w0,0 */ 620 EMIT4_IMM(0xa7080000, REG_W0, 0); 621 /* lr %w1,%dst */ 622 EMIT2(0x1800, REG_W1, dst_reg); 623 /* dlr %w0,%src */ 624 EMIT4(0xb9970000, REG_W0, src_reg); 625 /* llgfr %dst,%rc */ 626 EMIT4(0xb9160000, dst_reg, rc_reg); 627 break; 628 } 629 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / src */ 630 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % src */ 631 { 632 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 633 634 jit->seen |= SEEN_RET0; 635 /* ltgr %src,%src (if src == 0 goto fail) */ 636 EMIT4(0xb9020000, src_reg, src_reg); 637 /* jz <ret0> */ 638 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 639 /* lghi %w0,0 */ 640 EMIT4_IMM(0xa7090000, REG_W0, 0); 641 /* lgr %w1,%dst */ 642 EMIT4(0xb9040000, REG_W1, dst_reg); 643 /* dlgr %w0,%dst */ 644 EMIT4(0xb9870000, REG_W0, src_reg); 645 /* lgr %dst,%rc */ 646 EMIT4(0xb9040000, dst_reg, rc_reg); 647 break; 648 } 649 case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */ 650 case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */ 651 { 652 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 653 654 if (imm == 1) { 655 if (BPF_OP(insn->code) == BPF_MOD) 656 /* lhgi %dst,0 */ 657 EMIT4_IMM(0xa7090000, dst_reg, 0); 658 break; 659 } 660 /* lhi %w0,0 */ 661 EMIT4_IMM(0xa7080000, REG_W0, 0); 662 /* lr %w1,%dst */ 663 EMIT2(0x1800, REG_W1, dst_reg); 664 /* dl %w0,<d(imm)>(%l) */ 665 EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L, 666 EMIT_CONST_U32(imm)); 667 /* llgfr %dst,%rc */ 668 EMIT4(0xb9160000, dst_reg, rc_reg); 669 break; 670 } 671 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / imm */ 672 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % imm */ 673 { 674 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 675 676 if (imm == 1) { 677 if (BPF_OP(insn->code) == BPF_MOD) 678 /* lhgi %dst,0 */ 679 EMIT4_IMM(0xa7090000, dst_reg, 0); 680 break; 681 } 682 /* lghi %w0,0 */ 683 EMIT4_IMM(0xa7090000, REG_W0, 0); 684 /* lgr %w1,%dst */ 685 EMIT4(0xb9040000, REG_W1, dst_reg); 686 /* dlg %w0,<d(imm)>(%l) */ 687 EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L, 688 EMIT_CONST_U64(imm)); 689 /* lgr %dst,%rc */ 690 EMIT4(0xb9040000, dst_reg, rc_reg); 691 break; 692 } 693 /* 694 * BPF_AND 695 */ 696 case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */ 697 /* nr %dst,%src */ 698 EMIT2(0x1400, dst_reg, src_reg); 699 EMIT_ZERO(dst_reg); 700 break; 701 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */ 702 /* ngr %dst,%src */ 703 EMIT4(0xb9800000, dst_reg, src_reg); 704 break; 705 case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */ 706 /* nilf %dst,imm */ 707 EMIT6_IMM(0xc00b0000, dst_reg, imm); 708 EMIT_ZERO(dst_reg); 709 break; 710 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */ 711 /* ng %dst,<d(imm)>(%l) */ 712 EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L, 713 EMIT_CONST_U64(imm)); 714 break; 715 /* 716 * BPF_OR 717 */ 718 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */ 719 /* or %dst,%src */ 720 EMIT2(0x1600, dst_reg, src_reg); 721 EMIT_ZERO(dst_reg); 722 break; 723 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */ 724 /* ogr %dst,%src */ 725 EMIT4(0xb9810000, dst_reg, src_reg); 726 break; 727 case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */ 728 /* oilf %dst,imm */ 729 EMIT6_IMM(0xc00d0000, dst_reg, imm); 730 EMIT_ZERO(dst_reg); 731 break; 732 case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */ 733 /* og %dst,<d(imm)>(%l) */ 734 EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L, 735 EMIT_CONST_U64(imm)); 736 break; 737 /* 738 * BPF_XOR 739 */ 740 case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */ 741 /* xr %dst,%src */ 742 EMIT2(0x1700, dst_reg, src_reg); 743 EMIT_ZERO(dst_reg); 744 break; 745 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */ 746 /* xgr %dst,%src */ 747 EMIT4(0xb9820000, dst_reg, src_reg); 748 break; 749 case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */ 750 if (!imm) 751 break; 752 /* xilf %dst,imm */ 753 EMIT6_IMM(0xc0070000, dst_reg, imm); 754 EMIT_ZERO(dst_reg); 755 break; 756 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */ 757 /* xg %dst,<d(imm)>(%l) */ 758 EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L, 759 EMIT_CONST_U64(imm)); 760 break; 761 /* 762 * BPF_LSH 763 */ 764 case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */ 765 /* sll %dst,0(%src) */ 766 EMIT4_DISP(0x89000000, dst_reg, src_reg, 0); 767 EMIT_ZERO(dst_reg); 768 break; 769 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */ 770 /* sllg %dst,%dst,0(%src) */ 771 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0); 772 break; 773 case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */ 774 if (imm == 0) 775 break; 776 /* sll %dst,imm(%r0) */ 777 EMIT4_DISP(0x89000000, dst_reg, REG_0, imm); 778 EMIT_ZERO(dst_reg); 779 break; 780 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */ 781 if (imm == 0) 782 break; 783 /* sllg %dst,%dst,imm(%r0) */ 784 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm); 785 break; 786 /* 787 * BPF_RSH 788 */ 789 case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */ 790 /* srl %dst,0(%src) */ 791 EMIT4_DISP(0x88000000, dst_reg, src_reg, 0); 792 EMIT_ZERO(dst_reg); 793 break; 794 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */ 795 /* srlg %dst,%dst,0(%src) */ 796 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0); 797 break; 798 case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */ 799 if (imm == 0) 800 break; 801 /* srl %dst,imm(%r0) */ 802 EMIT4_DISP(0x88000000, dst_reg, REG_0, imm); 803 EMIT_ZERO(dst_reg); 804 break; 805 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */ 806 if (imm == 0) 807 break; 808 /* srlg %dst,%dst,imm(%r0) */ 809 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm); 810 break; 811 /* 812 * BPF_ARSH 813 */ 814 case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */ 815 /* srag %dst,%dst,0(%src) */ 816 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0); 817 break; 818 case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */ 819 if (imm == 0) 820 break; 821 /* srag %dst,%dst,imm(%r0) */ 822 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm); 823 break; 824 /* 825 * BPF_NEG 826 */ 827 case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */ 828 /* lcr %dst,%dst */ 829 EMIT2(0x1300, dst_reg, dst_reg); 830 EMIT_ZERO(dst_reg); 831 break; 832 case BPF_ALU64 | BPF_NEG: /* dst = -dst */ 833 /* lcgr %dst,%dst */ 834 EMIT4(0xb9130000, dst_reg, dst_reg); 835 break; 836 /* 837 * BPF_FROM_BE/LE 838 */ 839 case BPF_ALU | BPF_END | BPF_FROM_BE: 840 /* s390 is big endian, therefore only clear high order bytes */ 841 switch (imm) { 842 case 16: /* dst = (u16) cpu_to_be16(dst) */ 843 /* llghr %dst,%dst */ 844 EMIT4(0xb9850000, dst_reg, dst_reg); 845 break; 846 case 32: /* dst = (u32) cpu_to_be32(dst) */ 847 /* llgfr %dst,%dst */ 848 EMIT4(0xb9160000, dst_reg, dst_reg); 849 break; 850 case 64: /* dst = (u64) cpu_to_be64(dst) */ 851 break; 852 } 853 break; 854 case BPF_ALU | BPF_END | BPF_FROM_LE: 855 switch (imm) { 856 case 16: /* dst = (u16) cpu_to_le16(dst) */ 857 /* lrvr %dst,%dst */ 858 EMIT4(0xb91f0000, dst_reg, dst_reg); 859 /* srl %dst,16(%r0) */ 860 EMIT4_DISP(0x88000000, dst_reg, REG_0, 16); 861 /* llghr %dst,%dst */ 862 EMIT4(0xb9850000, dst_reg, dst_reg); 863 break; 864 case 32: /* dst = (u32) cpu_to_le32(dst) */ 865 /* lrvr %dst,%dst */ 866 EMIT4(0xb91f0000, dst_reg, dst_reg); 867 /* llgfr %dst,%dst */ 868 EMIT4(0xb9160000, dst_reg, dst_reg); 869 break; 870 case 64: /* dst = (u64) cpu_to_le64(dst) */ 871 /* lrvgr %dst,%dst */ 872 EMIT4(0xb90f0000, dst_reg, dst_reg); 873 break; 874 } 875 break; 876 /* 877 * BPF_ST(X) 878 */ 879 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */ 880 /* stcy %src,off(%dst) */ 881 EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off); 882 jit->seen |= SEEN_MEM; 883 break; 884 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */ 885 /* sthy %src,off(%dst) */ 886 EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off); 887 jit->seen |= SEEN_MEM; 888 break; 889 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */ 890 /* sty %src,off(%dst) */ 891 EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off); 892 jit->seen |= SEEN_MEM; 893 break; 894 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */ 895 /* stg %src,off(%dst) */ 896 EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off); 897 jit->seen |= SEEN_MEM; 898 break; 899 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */ 900 /* lhi %w0,imm */ 901 EMIT4_IMM(0xa7080000, REG_W0, (u8) imm); 902 /* stcy %w0,off(dst) */ 903 EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off); 904 jit->seen |= SEEN_MEM; 905 break; 906 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */ 907 /* lhi %w0,imm */ 908 EMIT4_IMM(0xa7080000, REG_W0, (u16) imm); 909 /* sthy %w0,off(dst) */ 910 EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off); 911 jit->seen |= SEEN_MEM; 912 break; 913 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */ 914 /* llilf %w0,imm */ 915 EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm); 916 /* sty %w0,off(%dst) */ 917 EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off); 918 jit->seen |= SEEN_MEM; 919 break; 920 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */ 921 /* lgfi %w0,imm */ 922 EMIT6_IMM(0xc0010000, REG_W0, imm); 923 /* stg %w0,off(%dst) */ 924 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off); 925 jit->seen |= SEEN_MEM; 926 break; 927 /* 928 * BPF_STX XADD (atomic_add) 929 */ 930 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */ 931 /* laal %w0,%src,off(%dst) */ 932 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg, 933 dst_reg, off); 934 jit->seen |= SEEN_MEM; 935 break; 936 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */ 937 /* laalg %w0,%src,off(%dst) */ 938 EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg, 939 dst_reg, off); 940 jit->seen |= SEEN_MEM; 941 break; 942 /* 943 * BPF_LDX 944 */ 945 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */ 946 /* llgc %dst,0(off,%src) */ 947 EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off); 948 jit->seen |= SEEN_MEM; 949 break; 950 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */ 951 /* llgh %dst,0(off,%src) */ 952 EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off); 953 jit->seen |= SEEN_MEM; 954 break; 955 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */ 956 /* llgf %dst,off(%src) */ 957 jit->seen |= SEEN_MEM; 958 EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off); 959 break; 960 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */ 961 /* lg %dst,0(off,%src) */ 962 jit->seen |= SEEN_MEM; 963 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off); 964 break; 965 /* 966 * BPF_JMP / CALL 967 */ 968 case BPF_JMP | BPF_CALL: 969 { 970 /* 971 * b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5) 972 */ 973 const u64 func = (u64)__bpf_call_base + imm; 974 975 REG_SET_SEEN(BPF_REG_5); 976 jit->seen |= SEEN_FUNC; 977 /* lg %w1,<d(imm)>(%l) */ 978 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_W1, REG_0, REG_L, 979 EMIT_CONST_U64(func)); 980 /* basr %r14,%w1 */ 981 EMIT2(0x0d00, REG_14, REG_W1); 982 /* lgr %b0,%r2: load return value into %b0 */ 983 EMIT4(0xb9040000, BPF_REG_0, REG_2); 984 if (bpf_helper_changes_skb_data((void *)func)) { 985 jit->seen |= SEEN_SKB_CHANGE; 986 /* lg %b1,ST_OFF_SKBP(%r15) */ 987 EMIT6_DISP_LH(0xe3000000, 0x0004, BPF_REG_1, REG_0, 988 REG_15, STK_OFF_SKBP); 989 emit_load_skb_data_hlen(jit); 990 } 991 break; 992 } 993 case BPF_JMP | BPF_CALL | BPF_X: 994 /* 995 * Implicit input: 996 * B1: pointer to ctx 997 * B2: pointer to bpf_array 998 * B3: index in bpf_array 999 */ 1000 jit->seen |= SEEN_TAIL_CALL; 1001 1002 /* 1003 * if (index >= array->map.max_entries) 1004 * goto out; 1005 */ 1006 1007 /* llgf %w1,map.max_entries(%b2) */ 1008 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2, 1009 offsetof(struct bpf_array, map.max_entries)); 1010 /* clgrj %b3,%w1,0xa,label0: if %b3 >= %w1 goto out */ 1011 EMIT6_PCREL_LABEL(0xec000000, 0x0065, BPF_REG_3, 1012 REG_W1, 0, 0xa); 1013 1014 /* 1015 * if (tail_call_cnt++ > MAX_TAIL_CALL_CNT) 1016 * goto out; 1017 */ 1018 1019 if (jit->seen & SEEN_STACK) 1020 off = STK_OFF_TCCNT + STK_OFF; 1021 else 1022 off = STK_OFF_TCCNT; 1023 /* lhi %w0,1 */ 1024 EMIT4_IMM(0xa7080000, REG_W0, 1); 1025 /* laal %w1,%w0,off(%r15) */ 1026 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W1, REG_W0, REG_15, off); 1027 /* clij %w1,MAX_TAIL_CALL_CNT,0x2,label0 */ 1028 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007f, REG_W1, 1029 MAX_TAIL_CALL_CNT, 0, 0x2); 1030 1031 /* 1032 * prog = array->ptrs[index]; 1033 * if (prog == NULL) 1034 * goto out; 1035 */ 1036 1037 /* sllg %r1,%b3,3: %r1 = index * 8 */ 1038 EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, BPF_REG_3, REG_0, 3); 1039 /* lg %r1,prog(%b2,%r1) */ 1040 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2, 1041 REG_1, offsetof(struct bpf_array, ptrs)); 1042 /* clgij %r1,0,0x8,label0 */ 1043 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007d, REG_1, 0, 0, 0x8); 1044 1045 /* 1046 * Restore registers before calling function 1047 */ 1048 save_restore_regs(jit, REGS_RESTORE); 1049 1050 /* 1051 * goto *(prog->bpf_func + tail_call_start); 1052 */ 1053 1054 /* lg %r1,bpf_func(%r1) */ 1055 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, REG_1, REG_0, 1056 offsetof(struct bpf_prog, bpf_func)); 1057 /* bc 0xf,tail_call_start(%r1) */ 1058 _EMIT4(0x47f01000 + jit->tail_call_start); 1059 /* out: */ 1060 jit->labels[0] = jit->prg; 1061 break; 1062 case BPF_JMP | BPF_EXIT: /* return b0 */ 1063 last = (i == fp->len - 1) ? 1 : 0; 1064 if (last && !(jit->seen & SEEN_RET0)) 1065 break; 1066 /* j <exit> */ 1067 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg); 1068 break; 1069 /* 1070 * Branch relative (number of skipped instructions) to offset on 1071 * condition. 1072 * 1073 * Condition code to mask mapping: 1074 * 1075 * CC | Description | Mask 1076 * ------------------------------ 1077 * 0 | Operands equal | 8 1078 * 1 | First operand low | 4 1079 * 2 | First operand high | 2 1080 * 3 | Unused | 1 1081 * 1082 * For s390x relative branches: ip = ip + off_bytes 1083 * For BPF relative branches: insn = insn + off_insns + 1 1084 * 1085 * For example for s390x with offset 0 we jump to the branch 1086 * instruction itself (loop) and for BPF with offset 0 we 1087 * branch to the instruction behind the branch. 1088 */ 1089 case BPF_JMP | BPF_JA: /* if (true) */ 1090 mask = 0xf000; /* j */ 1091 goto branch_oc; 1092 case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */ 1093 mask = 0x2000; /* jh */ 1094 goto branch_ks; 1095 case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */ 1096 mask = 0xa000; /* jhe */ 1097 goto branch_ks; 1098 case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */ 1099 mask = 0x2000; /* jh */ 1100 goto branch_ku; 1101 case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */ 1102 mask = 0xa000; /* jhe */ 1103 goto branch_ku; 1104 case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */ 1105 mask = 0x7000; /* jne */ 1106 goto branch_ku; 1107 case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */ 1108 mask = 0x8000; /* je */ 1109 goto branch_ku; 1110 case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */ 1111 mask = 0x7000; /* jnz */ 1112 /* lgfi %w1,imm (load sign extend imm) */ 1113 EMIT6_IMM(0xc0010000, REG_W1, imm); 1114 /* ngr %w1,%dst */ 1115 EMIT4(0xb9800000, REG_W1, dst_reg); 1116 goto branch_oc; 1117 1118 case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */ 1119 mask = 0x2000; /* jh */ 1120 goto branch_xs; 1121 case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */ 1122 mask = 0xa000; /* jhe */ 1123 goto branch_xs; 1124 case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */ 1125 mask = 0x2000; /* jh */ 1126 goto branch_xu; 1127 case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */ 1128 mask = 0xa000; /* jhe */ 1129 goto branch_xu; 1130 case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */ 1131 mask = 0x7000; /* jne */ 1132 goto branch_xu; 1133 case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */ 1134 mask = 0x8000; /* je */ 1135 goto branch_xu; 1136 case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */ 1137 mask = 0x7000; /* jnz */ 1138 /* ngrk %w1,%dst,%src */ 1139 EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg); 1140 goto branch_oc; 1141 branch_ks: 1142 /* lgfi %w1,imm (load sign extend imm) */ 1143 EMIT6_IMM(0xc0010000, REG_W1, imm); 1144 /* cgrj %dst,%w1,mask,off */ 1145 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask); 1146 break; 1147 branch_ku: 1148 /* lgfi %w1,imm (load sign extend imm) */ 1149 EMIT6_IMM(0xc0010000, REG_W1, imm); 1150 /* clgrj %dst,%w1,mask,off */ 1151 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask); 1152 break; 1153 branch_xs: 1154 /* cgrj %dst,%src,mask,off */ 1155 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask); 1156 break; 1157 branch_xu: 1158 /* clgrj %dst,%src,mask,off */ 1159 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask); 1160 break; 1161 branch_oc: 1162 /* brc mask,jmp_off (branch instruction needs 4 bytes) */ 1163 jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4); 1164 EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off); 1165 break; 1166 /* 1167 * BPF_LD 1168 */ 1169 case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */ 1170 case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */ 1171 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0)) 1172 func_addr = __pa(sk_load_byte_pos); 1173 else 1174 func_addr = __pa(sk_load_byte); 1175 goto call_fn; 1176 case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */ 1177 case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */ 1178 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0)) 1179 func_addr = __pa(sk_load_half_pos); 1180 else 1181 func_addr = __pa(sk_load_half); 1182 goto call_fn; 1183 case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */ 1184 case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */ 1185 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0)) 1186 func_addr = __pa(sk_load_word_pos); 1187 else 1188 func_addr = __pa(sk_load_word); 1189 goto call_fn; 1190 call_fn: 1191 jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC; 1192 REG_SET_SEEN(REG_14); /* Return address of possible func call */ 1193 1194 /* 1195 * Implicit input: 1196 * BPF_REG_6 (R7) : skb pointer 1197 * REG_SKB_DATA (R12): skb data pointer (if no BPF_REG_AX) 1198 * 1199 * Calculated input: 1200 * BPF_REG_2 (R3) : offset of byte(s) to fetch in skb 1201 * BPF_REG_5 (R6) : return address 1202 * 1203 * Output: 1204 * BPF_REG_0 (R14): data read from skb 1205 * 1206 * Scratch registers (BPF_REG_1-5) 1207 */ 1208 1209 /* Call function: llilf %w1,func_addr */ 1210 EMIT6_IMM(0xc00f0000, REG_W1, func_addr); 1211 1212 /* Offset: lgfi %b2,imm */ 1213 EMIT6_IMM(0xc0010000, BPF_REG_2, imm); 1214 if (BPF_MODE(insn->code) == BPF_IND) 1215 /* agfr %b2,%src (%src is s32 here) */ 1216 EMIT4(0xb9180000, BPF_REG_2, src_reg); 1217 1218 /* Reload REG_SKB_DATA if BPF_REG_AX is used */ 1219 if (jit->seen & SEEN_REG_AX) 1220 /* lg %skb_data,data_off(%b6) */ 1221 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0, 1222 BPF_REG_6, offsetof(struct sk_buff, data)); 1223 /* basr %b5,%w1 (%b5 is call saved) */ 1224 EMIT2(0x0d00, BPF_REG_5, REG_W1); 1225 1226 /* 1227 * Note: For fast access we jump directly after the 1228 * jnz instruction from bpf_jit.S 1229 */ 1230 /* jnz <ret0> */ 1231 EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg); 1232 break; 1233 default: /* too complex, give up */ 1234 pr_err("Unknown opcode %02x\n", insn->code); 1235 return -1; 1236 } 1237 return insn_count; 1238 } 1239 1240 /* 1241 * Compile eBPF program into s390x code 1242 */ 1243 static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp) 1244 { 1245 int i, insn_count; 1246 1247 jit->lit = jit->lit_start; 1248 jit->prg = 0; 1249 1250 bpf_jit_prologue(jit); 1251 for (i = 0; i < fp->len; i += insn_count) { 1252 insn_count = bpf_jit_insn(jit, fp, i); 1253 if (insn_count < 0) 1254 return -1; 1255 jit->addrs[i + 1] = jit->prg; /* Next instruction address */ 1256 } 1257 bpf_jit_epilogue(jit); 1258 1259 jit->lit_start = jit->prg; 1260 jit->size = jit->lit; 1261 jit->size_prg = jit->prg; 1262 return 0; 1263 } 1264 1265 /* 1266 * Classic BPF function stub. BPF programs will be converted into 1267 * eBPF and then bpf_int_jit_compile() will be called. 1268 */ 1269 void bpf_jit_compile(struct bpf_prog *fp) 1270 { 1271 } 1272 1273 /* 1274 * Compile eBPF program "fp" 1275 */ 1276 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp) 1277 { 1278 struct bpf_prog *tmp, *orig_fp = fp; 1279 struct bpf_binary_header *header; 1280 bool tmp_blinded = false; 1281 struct bpf_jit jit; 1282 int pass; 1283 1284 if (!bpf_jit_enable) 1285 return orig_fp; 1286 1287 tmp = bpf_jit_blind_constants(fp); 1288 /* 1289 * If blinding was requested and we failed during blinding, 1290 * we must fall back to the interpreter. 1291 */ 1292 if (IS_ERR(tmp)) 1293 return orig_fp; 1294 if (tmp != fp) { 1295 tmp_blinded = true; 1296 fp = tmp; 1297 } 1298 1299 memset(&jit, 0, sizeof(jit)); 1300 jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL); 1301 if (jit.addrs == NULL) { 1302 fp = orig_fp; 1303 goto out; 1304 } 1305 /* 1306 * Three initial passes: 1307 * - 1/2: Determine clobbered registers 1308 * - 3: Calculate program size and addrs arrray 1309 */ 1310 for (pass = 1; pass <= 3; pass++) { 1311 if (bpf_jit_prog(&jit, fp)) { 1312 fp = orig_fp; 1313 goto free_addrs; 1314 } 1315 } 1316 /* 1317 * Final pass: Allocate and generate program 1318 */ 1319 if (jit.size >= BPF_SIZE_MAX) { 1320 fp = orig_fp; 1321 goto free_addrs; 1322 } 1323 header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole); 1324 if (!header) { 1325 fp = orig_fp; 1326 goto free_addrs; 1327 } 1328 if (bpf_jit_prog(&jit, fp)) { 1329 fp = orig_fp; 1330 goto free_addrs; 1331 } 1332 if (bpf_jit_enable > 1) { 1333 bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf); 1334 if (jit.prg_buf) 1335 print_fn_code(jit.prg_buf, jit.size_prg); 1336 } 1337 if (jit.prg_buf) { 1338 set_memory_ro((unsigned long)header, header->pages); 1339 fp->bpf_func = (void *) jit.prg_buf; 1340 fp->jited = 1; 1341 } 1342 free_addrs: 1343 kfree(jit.addrs); 1344 out: 1345 if (tmp_blinded) 1346 bpf_jit_prog_release_other(fp, fp == orig_fp ? 1347 tmp : orig_fp); 1348 return fp; 1349 } 1350 1351 /* 1352 * Free eBPF program 1353 */ 1354 void bpf_jit_free(struct bpf_prog *fp) 1355 { 1356 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; 1357 struct bpf_binary_header *header = (void *)addr; 1358 1359 if (!fp->jited) 1360 goto free_filter; 1361 1362 set_memory_rw(addr, header->pages); 1363 bpf_jit_binary_free(header); 1364 1365 free_filter: 1366 bpf_prog_unlock_free(fp); 1367 } 1368