1 /* 2 * BPF Jit compiler for s390. 3 * 4 * Minimum build requirements: 5 * 6 * - HAVE_MARCH_Z196_FEATURES: laal, laalg 7 * - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj 8 * - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf 9 * - PACK_STACK 10 * - 64BIT 11 * 12 * Copyright IBM Corp. 2012,2015 13 * 14 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> 15 * Michael Holzheu <holzheu@linux.vnet.ibm.com> 16 */ 17 18 #define KMSG_COMPONENT "bpf_jit" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/netdevice.h> 22 #include <linux/filter.h> 23 #include <linux/init.h> 24 #include <linux/bpf.h> 25 #include <asm/cacheflush.h> 26 #include <asm/dis.h> 27 #include <asm/set_memory.h> 28 #include "bpf_jit.h" 29 30 int bpf_jit_enable __read_mostly; 31 32 struct bpf_jit { 33 u32 seen; /* Flags to remember seen eBPF instructions */ 34 u32 seen_reg[16]; /* Array to remember which registers are used */ 35 u32 *addrs; /* Array with relative instruction addresses */ 36 u8 *prg_buf; /* Start of program */ 37 int size; /* Size of program and literal pool */ 38 int size_prg; /* Size of program */ 39 int prg; /* Current position in program */ 40 int lit_start; /* Start of literal pool */ 41 int lit; /* Current position in literal pool */ 42 int base_ip; /* Base address for literal pool */ 43 int ret0_ip; /* Address of return 0 */ 44 int exit_ip; /* Address of exit */ 45 int tail_call_start; /* Tail call start offset */ 46 int labels[1]; /* Labels for local jumps */ 47 }; 48 49 #define BPF_SIZE_MAX 0xffff /* Max size for program (16 bit branches) */ 50 51 #define SEEN_SKB 1 /* skb access */ 52 #define SEEN_MEM 2 /* use mem[] for temporary storage */ 53 #define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */ 54 #define SEEN_LITERAL 8 /* code uses literals */ 55 #define SEEN_FUNC 16 /* calls C functions */ 56 #define SEEN_TAIL_CALL 32 /* code uses tail calls */ 57 #define SEEN_SKB_CHANGE 64 /* code changes skb data */ 58 #define SEEN_REG_AX 128 /* code uses constant blinding */ 59 #define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB) 60 61 /* 62 * s390 registers 63 */ 64 #define REG_W0 (MAX_BPF_JIT_REG + 0) /* Work register 1 (even) */ 65 #define REG_W1 (MAX_BPF_JIT_REG + 1) /* Work register 2 (odd) */ 66 #define REG_SKB_DATA (MAX_BPF_JIT_REG + 2) /* SKB data register */ 67 #define REG_L (MAX_BPF_JIT_REG + 3) /* Literal pool register */ 68 #define REG_15 (MAX_BPF_JIT_REG + 4) /* Register 15 */ 69 #define REG_0 REG_W0 /* Register 0 */ 70 #define REG_1 REG_W1 /* Register 1 */ 71 #define REG_2 BPF_REG_1 /* Register 2 */ 72 #define REG_14 BPF_REG_0 /* Register 14 */ 73 74 /* 75 * Mapping of BPF registers to s390 registers 76 */ 77 static const int reg2hex[] = { 78 /* Return code */ 79 [BPF_REG_0] = 14, 80 /* Function parameters */ 81 [BPF_REG_1] = 2, 82 [BPF_REG_2] = 3, 83 [BPF_REG_3] = 4, 84 [BPF_REG_4] = 5, 85 [BPF_REG_5] = 6, 86 /* Call saved registers */ 87 [BPF_REG_6] = 7, 88 [BPF_REG_7] = 8, 89 [BPF_REG_8] = 9, 90 [BPF_REG_9] = 10, 91 /* BPF stack pointer */ 92 [BPF_REG_FP] = 13, 93 /* Register for blinding (shared with REG_SKB_DATA) */ 94 [BPF_REG_AX] = 12, 95 /* SKB data pointer */ 96 [REG_SKB_DATA] = 12, 97 /* Work registers for s390x backend */ 98 [REG_W0] = 0, 99 [REG_W1] = 1, 100 [REG_L] = 11, 101 [REG_15] = 15, 102 }; 103 104 static inline u32 reg(u32 dst_reg, u32 src_reg) 105 { 106 return reg2hex[dst_reg] << 4 | reg2hex[src_reg]; 107 } 108 109 static inline u32 reg_high(u32 reg) 110 { 111 return reg2hex[reg] << 4; 112 } 113 114 static inline void reg_set_seen(struct bpf_jit *jit, u32 b1) 115 { 116 u32 r1 = reg2hex[b1]; 117 118 if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15) 119 jit->seen_reg[r1] = 1; 120 } 121 122 #define REG_SET_SEEN(b1) \ 123 ({ \ 124 reg_set_seen(jit, b1); \ 125 }) 126 127 #define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]] 128 129 /* 130 * EMIT macros for code generation 131 */ 132 133 #define _EMIT2(op) \ 134 ({ \ 135 if (jit->prg_buf) \ 136 *(u16 *) (jit->prg_buf + jit->prg) = op; \ 137 jit->prg += 2; \ 138 }) 139 140 #define EMIT2(op, b1, b2) \ 141 ({ \ 142 _EMIT2(op | reg(b1, b2)); \ 143 REG_SET_SEEN(b1); \ 144 REG_SET_SEEN(b2); \ 145 }) 146 147 #define _EMIT4(op) \ 148 ({ \ 149 if (jit->prg_buf) \ 150 *(u32 *) (jit->prg_buf + jit->prg) = op; \ 151 jit->prg += 4; \ 152 }) 153 154 #define EMIT4(op, b1, b2) \ 155 ({ \ 156 _EMIT4(op | reg(b1, b2)); \ 157 REG_SET_SEEN(b1); \ 158 REG_SET_SEEN(b2); \ 159 }) 160 161 #define EMIT4_RRF(op, b1, b2, b3) \ 162 ({ \ 163 _EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \ 164 REG_SET_SEEN(b1); \ 165 REG_SET_SEEN(b2); \ 166 REG_SET_SEEN(b3); \ 167 }) 168 169 #define _EMIT4_DISP(op, disp) \ 170 ({ \ 171 unsigned int __disp = (disp) & 0xfff; \ 172 _EMIT4(op | __disp); \ 173 }) 174 175 #define EMIT4_DISP(op, b1, b2, disp) \ 176 ({ \ 177 _EMIT4_DISP(op | reg_high(b1) << 16 | \ 178 reg_high(b2) << 8, disp); \ 179 REG_SET_SEEN(b1); \ 180 REG_SET_SEEN(b2); \ 181 }) 182 183 #define EMIT4_IMM(op, b1, imm) \ 184 ({ \ 185 unsigned int __imm = (imm) & 0xffff; \ 186 _EMIT4(op | reg_high(b1) << 16 | __imm); \ 187 REG_SET_SEEN(b1); \ 188 }) 189 190 #define EMIT4_PCREL(op, pcrel) \ 191 ({ \ 192 long __pcrel = ((pcrel) >> 1) & 0xffff; \ 193 _EMIT4(op | __pcrel); \ 194 }) 195 196 #define _EMIT6(op1, op2) \ 197 ({ \ 198 if (jit->prg_buf) { \ 199 *(u32 *) (jit->prg_buf + jit->prg) = op1; \ 200 *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \ 201 } \ 202 jit->prg += 6; \ 203 }) 204 205 #define _EMIT6_DISP(op1, op2, disp) \ 206 ({ \ 207 unsigned int __disp = (disp) & 0xfff; \ 208 _EMIT6(op1 | __disp, op2); \ 209 }) 210 211 #define _EMIT6_DISP_LH(op1, op2, disp) \ 212 ({ \ 213 u32 _disp = (u32) disp; \ 214 unsigned int __disp_h = _disp & 0xff000; \ 215 unsigned int __disp_l = _disp & 0x00fff; \ 216 _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \ 217 }) 218 219 #define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \ 220 ({ \ 221 _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \ 222 reg_high(b3) << 8, op2, disp); \ 223 REG_SET_SEEN(b1); \ 224 REG_SET_SEEN(b2); \ 225 REG_SET_SEEN(b3); \ 226 }) 227 228 #define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask) \ 229 ({ \ 230 int rel = (jit->labels[label] - jit->prg) >> 1; \ 231 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), \ 232 op2 | mask << 12); \ 233 REG_SET_SEEN(b1); \ 234 REG_SET_SEEN(b2); \ 235 }) 236 237 #define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \ 238 ({ \ 239 int rel = (jit->labels[label] - jit->prg) >> 1; \ 240 _EMIT6(op1 | (reg_high(b1) | mask) << 16 | \ 241 (rel & 0xffff), op2 | (imm & 0xff) << 8); \ 242 REG_SET_SEEN(b1); \ 243 BUILD_BUG_ON(((unsigned long) imm) > 0xff); \ 244 }) 245 246 #define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \ 247 ({ \ 248 /* Branch instruction needs 6 bytes */ \ 249 int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\ 250 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask); \ 251 REG_SET_SEEN(b1); \ 252 REG_SET_SEEN(b2); \ 253 }) 254 255 #define _EMIT6_IMM(op, imm) \ 256 ({ \ 257 unsigned int __imm = (imm); \ 258 _EMIT6(op | (__imm >> 16), __imm & 0xffff); \ 259 }) 260 261 #define EMIT6_IMM(op, b1, imm) \ 262 ({ \ 263 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \ 264 REG_SET_SEEN(b1); \ 265 }) 266 267 #define EMIT_CONST_U32(val) \ 268 ({ \ 269 unsigned int ret; \ 270 ret = jit->lit - jit->base_ip; \ 271 jit->seen |= SEEN_LITERAL; \ 272 if (jit->prg_buf) \ 273 *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \ 274 jit->lit += 4; \ 275 ret; \ 276 }) 277 278 #define EMIT_CONST_U64(val) \ 279 ({ \ 280 unsigned int ret; \ 281 ret = jit->lit - jit->base_ip; \ 282 jit->seen |= SEEN_LITERAL; \ 283 if (jit->prg_buf) \ 284 *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \ 285 jit->lit += 8; \ 286 ret; \ 287 }) 288 289 #define EMIT_ZERO(b1) \ 290 ({ \ 291 /* llgfr %dst,%dst (zero extend to 64 bit) */ \ 292 EMIT4(0xb9160000, b1, b1); \ 293 REG_SET_SEEN(b1); \ 294 }) 295 296 /* 297 * Fill whole space with illegal instructions 298 */ 299 static void jit_fill_hole(void *area, unsigned int size) 300 { 301 memset(area, 0, size); 302 } 303 304 /* 305 * Save registers from "rs" (register start) to "re" (register end) on stack 306 */ 307 static void save_regs(struct bpf_jit *jit, u32 rs, u32 re) 308 { 309 u32 off = STK_OFF_R6 + (rs - 6) * 8; 310 311 if (rs == re) 312 /* stg %rs,off(%r15) */ 313 _EMIT6(0xe300f000 | rs << 20 | off, 0x0024); 314 else 315 /* stmg %rs,%re,off(%r15) */ 316 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off); 317 } 318 319 /* 320 * Restore registers from "rs" (register start) to "re" (register end) on stack 321 */ 322 static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re) 323 { 324 u32 off = STK_OFF_R6 + (rs - 6) * 8; 325 326 if (jit->seen & SEEN_STACK) 327 off += STK_OFF; 328 329 if (rs == re) 330 /* lg %rs,off(%r15) */ 331 _EMIT6(0xe300f000 | rs << 20 | off, 0x0004); 332 else 333 /* lmg %rs,%re,off(%r15) */ 334 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off); 335 } 336 337 /* 338 * Return first seen register (from start) 339 */ 340 static int get_start(struct bpf_jit *jit, int start) 341 { 342 int i; 343 344 for (i = start; i <= 15; i++) { 345 if (jit->seen_reg[i]) 346 return i; 347 } 348 return 0; 349 } 350 351 /* 352 * Return last seen register (from start) (gap >= 2) 353 */ 354 static int get_end(struct bpf_jit *jit, int start) 355 { 356 int i; 357 358 for (i = start; i < 15; i++) { 359 if (!jit->seen_reg[i] && !jit->seen_reg[i + 1]) 360 return i - 1; 361 } 362 return jit->seen_reg[15] ? 15 : 14; 363 } 364 365 #define REGS_SAVE 1 366 #define REGS_RESTORE 0 367 /* 368 * Save and restore clobbered registers (6-15) on stack. 369 * We save/restore registers in chunks with gap >= 2 registers. 370 */ 371 static void save_restore_regs(struct bpf_jit *jit, int op) 372 { 373 374 int re = 6, rs; 375 376 do { 377 rs = get_start(jit, re); 378 if (!rs) 379 break; 380 re = get_end(jit, rs + 1); 381 if (op == REGS_SAVE) 382 save_regs(jit, rs, re); 383 else 384 restore_regs(jit, rs, re); 385 re++; 386 } while (re <= 15); 387 } 388 389 /* 390 * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S" 391 * we store the SKB header length on the stack and the SKB data 392 * pointer in REG_SKB_DATA if BPF_REG_AX is not used. 393 */ 394 static void emit_load_skb_data_hlen(struct bpf_jit *jit) 395 { 396 /* Header length: llgf %w1,<len>(%b1) */ 397 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1, 398 offsetof(struct sk_buff, len)); 399 /* s %w1,<data_len>(%b1) */ 400 EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1, 401 offsetof(struct sk_buff, data_len)); 402 /* stg %w1,ST_OFF_HLEN(%r0,%r15) */ 403 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15, STK_OFF_HLEN); 404 if (!(jit->seen & SEEN_REG_AX)) 405 /* lg %skb_data,data_off(%b1) */ 406 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0, 407 BPF_REG_1, offsetof(struct sk_buff, data)); 408 } 409 410 /* 411 * Emit function prologue 412 * 413 * Save registers and create stack frame if necessary. 414 * See stack frame layout desription in "bpf_jit.h"! 415 */ 416 static void bpf_jit_prologue(struct bpf_jit *jit) 417 { 418 if (jit->seen & SEEN_TAIL_CALL) { 419 /* xc STK_OFF_TCCNT(4,%r15),STK_OFF_TCCNT(%r15) */ 420 _EMIT6(0xd703f000 | STK_OFF_TCCNT, 0xf000 | STK_OFF_TCCNT); 421 } else { 422 /* j tail_call_start: NOP if no tail calls are used */ 423 EMIT4_PCREL(0xa7f40000, 6); 424 _EMIT2(0); 425 } 426 /* Tail calls have to skip above initialization */ 427 jit->tail_call_start = jit->prg; 428 /* Save registers */ 429 save_restore_regs(jit, REGS_SAVE); 430 /* Setup literal pool */ 431 if (jit->seen & SEEN_LITERAL) { 432 /* basr %r13,0 */ 433 EMIT2(0x0d00, REG_L, REG_0); 434 jit->base_ip = jit->prg; 435 } 436 /* Setup stack and backchain */ 437 if (jit->seen & SEEN_STACK) { 438 if (jit->seen & SEEN_FUNC) 439 /* lgr %w1,%r15 (backchain) */ 440 EMIT4(0xb9040000, REG_W1, REG_15); 441 /* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */ 442 EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED); 443 /* aghi %r15,-STK_OFF */ 444 EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF); 445 if (jit->seen & SEEN_FUNC) 446 /* stg %w1,152(%r15) (backchain) */ 447 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, 448 REG_15, 152); 449 } 450 if (jit->seen & SEEN_SKB) 451 emit_load_skb_data_hlen(jit); 452 if (jit->seen & SEEN_SKB_CHANGE) 453 /* stg %b1,ST_OFF_SKBP(%r0,%r15) */ 454 EMIT6_DISP_LH(0xe3000000, 0x0024, BPF_REG_1, REG_0, REG_15, 455 STK_OFF_SKBP); 456 } 457 458 /* 459 * Function epilogue 460 */ 461 static void bpf_jit_epilogue(struct bpf_jit *jit) 462 { 463 /* Return 0 */ 464 if (jit->seen & SEEN_RET0) { 465 jit->ret0_ip = jit->prg; 466 /* lghi %b0,0 */ 467 EMIT4_IMM(0xa7090000, BPF_REG_0, 0); 468 } 469 jit->exit_ip = jit->prg; 470 /* Load exit code: lgr %r2,%b0 */ 471 EMIT4(0xb9040000, REG_2, BPF_REG_0); 472 /* Restore registers */ 473 save_restore_regs(jit, REGS_RESTORE); 474 /* br %r14 */ 475 _EMIT2(0x07fe); 476 } 477 478 /* 479 * Compile one eBPF instruction into s390x code 480 * 481 * NOTE: Use noinline because for gcov (-fprofile-arcs) gcc allocates a lot of 482 * stack space for the large switch statement. 483 */ 484 static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i) 485 { 486 struct bpf_insn *insn = &fp->insnsi[i]; 487 int jmp_off, last, insn_count = 1; 488 unsigned int func_addr, mask; 489 u32 dst_reg = insn->dst_reg; 490 u32 src_reg = insn->src_reg; 491 u32 *addrs = jit->addrs; 492 s32 imm = insn->imm; 493 s16 off = insn->off; 494 495 if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX) 496 jit->seen |= SEEN_REG_AX; 497 switch (insn->code) { 498 /* 499 * BPF_MOV 500 */ 501 case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */ 502 /* llgfr %dst,%src */ 503 EMIT4(0xb9160000, dst_reg, src_reg); 504 break; 505 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ 506 /* lgr %dst,%src */ 507 EMIT4(0xb9040000, dst_reg, src_reg); 508 break; 509 case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */ 510 /* llilf %dst,imm */ 511 EMIT6_IMM(0xc00f0000, dst_reg, imm); 512 break; 513 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */ 514 /* lgfi %dst,imm */ 515 EMIT6_IMM(0xc0010000, dst_reg, imm); 516 break; 517 /* 518 * BPF_LD 64 519 */ 520 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */ 521 { 522 /* 16 byte instruction that uses two 'struct bpf_insn' */ 523 u64 imm64; 524 525 imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32; 526 /* lg %dst,<d(imm)>(%l) */ 527 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L, 528 EMIT_CONST_U64(imm64)); 529 insn_count = 2; 530 break; 531 } 532 /* 533 * BPF_ADD 534 */ 535 case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */ 536 /* ar %dst,%src */ 537 EMIT2(0x1a00, dst_reg, src_reg); 538 EMIT_ZERO(dst_reg); 539 break; 540 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */ 541 /* agr %dst,%src */ 542 EMIT4(0xb9080000, dst_reg, src_reg); 543 break; 544 case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */ 545 if (!imm) 546 break; 547 /* alfi %dst,imm */ 548 EMIT6_IMM(0xc20b0000, dst_reg, imm); 549 EMIT_ZERO(dst_reg); 550 break; 551 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */ 552 if (!imm) 553 break; 554 /* agfi %dst,imm */ 555 EMIT6_IMM(0xc2080000, dst_reg, imm); 556 break; 557 /* 558 * BPF_SUB 559 */ 560 case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */ 561 /* sr %dst,%src */ 562 EMIT2(0x1b00, dst_reg, src_reg); 563 EMIT_ZERO(dst_reg); 564 break; 565 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */ 566 /* sgr %dst,%src */ 567 EMIT4(0xb9090000, dst_reg, src_reg); 568 break; 569 case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */ 570 if (!imm) 571 break; 572 /* alfi %dst,-imm */ 573 EMIT6_IMM(0xc20b0000, dst_reg, -imm); 574 EMIT_ZERO(dst_reg); 575 break; 576 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */ 577 if (!imm) 578 break; 579 /* agfi %dst,-imm */ 580 EMIT6_IMM(0xc2080000, dst_reg, -imm); 581 break; 582 /* 583 * BPF_MUL 584 */ 585 case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */ 586 /* msr %dst,%src */ 587 EMIT4(0xb2520000, dst_reg, src_reg); 588 EMIT_ZERO(dst_reg); 589 break; 590 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */ 591 /* msgr %dst,%src */ 592 EMIT4(0xb90c0000, dst_reg, src_reg); 593 break; 594 case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */ 595 if (imm == 1) 596 break; 597 /* msfi %r5,imm */ 598 EMIT6_IMM(0xc2010000, dst_reg, imm); 599 EMIT_ZERO(dst_reg); 600 break; 601 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */ 602 if (imm == 1) 603 break; 604 /* msgfi %dst,imm */ 605 EMIT6_IMM(0xc2000000, dst_reg, imm); 606 break; 607 /* 608 * BPF_DIV / BPF_MOD 609 */ 610 case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */ 611 case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */ 612 { 613 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 614 615 jit->seen |= SEEN_RET0; 616 /* ltr %src,%src (if src == 0 goto fail) */ 617 EMIT2(0x1200, src_reg, src_reg); 618 /* jz <ret0> */ 619 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 620 /* lhi %w0,0 */ 621 EMIT4_IMM(0xa7080000, REG_W0, 0); 622 /* lr %w1,%dst */ 623 EMIT2(0x1800, REG_W1, dst_reg); 624 /* dlr %w0,%src */ 625 EMIT4(0xb9970000, REG_W0, src_reg); 626 /* llgfr %dst,%rc */ 627 EMIT4(0xb9160000, dst_reg, rc_reg); 628 break; 629 } 630 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / src */ 631 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % src */ 632 { 633 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 634 635 jit->seen |= SEEN_RET0; 636 /* ltgr %src,%src (if src == 0 goto fail) */ 637 EMIT4(0xb9020000, src_reg, src_reg); 638 /* jz <ret0> */ 639 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 640 /* lghi %w0,0 */ 641 EMIT4_IMM(0xa7090000, REG_W0, 0); 642 /* lgr %w1,%dst */ 643 EMIT4(0xb9040000, REG_W1, dst_reg); 644 /* dlgr %w0,%dst */ 645 EMIT4(0xb9870000, REG_W0, src_reg); 646 /* lgr %dst,%rc */ 647 EMIT4(0xb9040000, dst_reg, rc_reg); 648 break; 649 } 650 case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */ 651 case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */ 652 { 653 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 654 655 if (imm == 1) { 656 if (BPF_OP(insn->code) == BPF_MOD) 657 /* lhgi %dst,0 */ 658 EMIT4_IMM(0xa7090000, dst_reg, 0); 659 break; 660 } 661 /* lhi %w0,0 */ 662 EMIT4_IMM(0xa7080000, REG_W0, 0); 663 /* lr %w1,%dst */ 664 EMIT2(0x1800, REG_W1, dst_reg); 665 /* dl %w0,<d(imm)>(%l) */ 666 EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L, 667 EMIT_CONST_U32(imm)); 668 /* llgfr %dst,%rc */ 669 EMIT4(0xb9160000, dst_reg, rc_reg); 670 break; 671 } 672 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / imm */ 673 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % imm */ 674 { 675 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0; 676 677 if (imm == 1) { 678 if (BPF_OP(insn->code) == BPF_MOD) 679 /* lhgi %dst,0 */ 680 EMIT4_IMM(0xa7090000, dst_reg, 0); 681 break; 682 } 683 /* lghi %w0,0 */ 684 EMIT4_IMM(0xa7090000, REG_W0, 0); 685 /* lgr %w1,%dst */ 686 EMIT4(0xb9040000, REG_W1, dst_reg); 687 /* dlg %w0,<d(imm)>(%l) */ 688 EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L, 689 EMIT_CONST_U64(imm)); 690 /* lgr %dst,%rc */ 691 EMIT4(0xb9040000, dst_reg, rc_reg); 692 break; 693 } 694 /* 695 * BPF_AND 696 */ 697 case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */ 698 /* nr %dst,%src */ 699 EMIT2(0x1400, dst_reg, src_reg); 700 EMIT_ZERO(dst_reg); 701 break; 702 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */ 703 /* ngr %dst,%src */ 704 EMIT4(0xb9800000, dst_reg, src_reg); 705 break; 706 case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */ 707 /* nilf %dst,imm */ 708 EMIT6_IMM(0xc00b0000, dst_reg, imm); 709 EMIT_ZERO(dst_reg); 710 break; 711 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */ 712 /* ng %dst,<d(imm)>(%l) */ 713 EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L, 714 EMIT_CONST_U64(imm)); 715 break; 716 /* 717 * BPF_OR 718 */ 719 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */ 720 /* or %dst,%src */ 721 EMIT2(0x1600, dst_reg, src_reg); 722 EMIT_ZERO(dst_reg); 723 break; 724 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */ 725 /* ogr %dst,%src */ 726 EMIT4(0xb9810000, dst_reg, src_reg); 727 break; 728 case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */ 729 /* oilf %dst,imm */ 730 EMIT6_IMM(0xc00d0000, dst_reg, imm); 731 EMIT_ZERO(dst_reg); 732 break; 733 case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */ 734 /* og %dst,<d(imm)>(%l) */ 735 EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L, 736 EMIT_CONST_U64(imm)); 737 break; 738 /* 739 * BPF_XOR 740 */ 741 case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */ 742 /* xr %dst,%src */ 743 EMIT2(0x1700, dst_reg, src_reg); 744 EMIT_ZERO(dst_reg); 745 break; 746 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */ 747 /* xgr %dst,%src */ 748 EMIT4(0xb9820000, dst_reg, src_reg); 749 break; 750 case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */ 751 if (!imm) 752 break; 753 /* xilf %dst,imm */ 754 EMIT6_IMM(0xc0070000, dst_reg, imm); 755 EMIT_ZERO(dst_reg); 756 break; 757 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */ 758 /* xg %dst,<d(imm)>(%l) */ 759 EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L, 760 EMIT_CONST_U64(imm)); 761 break; 762 /* 763 * BPF_LSH 764 */ 765 case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */ 766 /* sll %dst,0(%src) */ 767 EMIT4_DISP(0x89000000, dst_reg, src_reg, 0); 768 EMIT_ZERO(dst_reg); 769 break; 770 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */ 771 /* sllg %dst,%dst,0(%src) */ 772 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0); 773 break; 774 case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */ 775 if (imm == 0) 776 break; 777 /* sll %dst,imm(%r0) */ 778 EMIT4_DISP(0x89000000, dst_reg, REG_0, imm); 779 EMIT_ZERO(dst_reg); 780 break; 781 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */ 782 if (imm == 0) 783 break; 784 /* sllg %dst,%dst,imm(%r0) */ 785 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm); 786 break; 787 /* 788 * BPF_RSH 789 */ 790 case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */ 791 /* srl %dst,0(%src) */ 792 EMIT4_DISP(0x88000000, dst_reg, src_reg, 0); 793 EMIT_ZERO(dst_reg); 794 break; 795 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */ 796 /* srlg %dst,%dst,0(%src) */ 797 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0); 798 break; 799 case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */ 800 if (imm == 0) 801 break; 802 /* srl %dst,imm(%r0) */ 803 EMIT4_DISP(0x88000000, dst_reg, REG_0, imm); 804 EMIT_ZERO(dst_reg); 805 break; 806 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */ 807 if (imm == 0) 808 break; 809 /* srlg %dst,%dst,imm(%r0) */ 810 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm); 811 break; 812 /* 813 * BPF_ARSH 814 */ 815 case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */ 816 /* srag %dst,%dst,0(%src) */ 817 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0); 818 break; 819 case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */ 820 if (imm == 0) 821 break; 822 /* srag %dst,%dst,imm(%r0) */ 823 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm); 824 break; 825 /* 826 * BPF_NEG 827 */ 828 case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */ 829 /* lcr %dst,%dst */ 830 EMIT2(0x1300, dst_reg, dst_reg); 831 EMIT_ZERO(dst_reg); 832 break; 833 case BPF_ALU64 | BPF_NEG: /* dst = -dst */ 834 /* lcgr %dst,%dst */ 835 EMIT4(0xb9130000, dst_reg, dst_reg); 836 break; 837 /* 838 * BPF_FROM_BE/LE 839 */ 840 case BPF_ALU | BPF_END | BPF_FROM_BE: 841 /* s390 is big endian, therefore only clear high order bytes */ 842 switch (imm) { 843 case 16: /* dst = (u16) cpu_to_be16(dst) */ 844 /* llghr %dst,%dst */ 845 EMIT4(0xb9850000, dst_reg, dst_reg); 846 break; 847 case 32: /* dst = (u32) cpu_to_be32(dst) */ 848 /* llgfr %dst,%dst */ 849 EMIT4(0xb9160000, dst_reg, dst_reg); 850 break; 851 case 64: /* dst = (u64) cpu_to_be64(dst) */ 852 break; 853 } 854 break; 855 case BPF_ALU | BPF_END | BPF_FROM_LE: 856 switch (imm) { 857 case 16: /* dst = (u16) cpu_to_le16(dst) */ 858 /* lrvr %dst,%dst */ 859 EMIT4(0xb91f0000, dst_reg, dst_reg); 860 /* srl %dst,16(%r0) */ 861 EMIT4_DISP(0x88000000, dst_reg, REG_0, 16); 862 /* llghr %dst,%dst */ 863 EMIT4(0xb9850000, dst_reg, dst_reg); 864 break; 865 case 32: /* dst = (u32) cpu_to_le32(dst) */ 866 /* lrvr %dst,%dst */ 867 EMIT4(0xb91f0000, dst_reg, dst_reg); 868 /* llgfr %dst,%dst */ 869 EMIT4(0xb9160000, dst_reg, dst_reg); 870 break; 871 case 64: /* dst = (u64) cpu_to_le64(dst) */ 872 /* lrvgr %dst,%dst */ 873 EMIT4(0xb90f0000, dst_reg, dst_reg); 874 break; 875 } 876 break; 877 /* 878 * BPF_ST(X) 879 */ 880 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */ 881 /* stcy %src,off(%dst) */ 882 EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off); 883 jit->seen |= SEEN_MEM; 884 break; 885 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */ 886 /* sthy %src,off(%dst) */ 887 EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off); 888 jit->seen |= SEEN_MEM; 889 break; 890 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */ 891 /* sty %src,off(%dst) */ 892 EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off); 893 jit->seen |= SEEN_MEM; 894 break; 895 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */ 896 /* stg %src,off(%dst) */ 897 EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off); 898 jit->seen |= SEEN_MEM; 899 break; 900 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */ 901 /* lhi %w0,imm */ 902 EMIT4_IMM(0xa7080000, REG_W0, (u8) imm); 903 /* stcy %w0,off(dst) */ 904 EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off); 905 jit->seen |= SEEN_MEM; 906 break; 907 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */ 908 /* lhi %w0,imm */ 909 EMIT4_IMM(0xa7080000, REG_W0, (u16) imm); 910 /* sthy %w0,off(dst) */ 911 EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off); 912 jit->seen |= SEEN_MEM; 913 break; 914 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */ 915 /* llilf %w0,imm */ 916 EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm); 917 /* sty %w0,off(%dst) */ 918 EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off); 919 jit->seen |= SEEN_MEM; 920 break; 921 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */ 922 /* lgfi %w0,imm */ 923 EMIT6_IMM(0xc0010000, REG_W0, imm); 924 /* stg %w0,off(%dst) */ 925 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off); 926 jit->seen |= SEEN_MEM; 927 break; 928 /* 929 * BPF_STX XADD (atomic_add) 930 */ 931 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */ 932 /* laal %w0,%src,off(%dst) */ 933 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg, 934 dst_reg, off); 935 jit->seen |= SEEN_MEM; 936 break; 937 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */ 938 /* laalg %w0,%src,off(%dst) */ 939 EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg, 940 dst_reg, off); 941 jit->seen |= SEEN_MEM; 942 break; 943 /* 944 * BPF_LDX 945 */ 946 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */ 947 /* llgc %dst,0(off,%src) */ 948 EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off); 949 jit->seen |= SEEN_MEM; 950 break; 951 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */ 952 /* llgh %dst,0(off,%src) */ 953 EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off); 954 jit->seen |= SEEN_MEM; 955 break; 956 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */ 957 /* llgf %dst,off(%src) */ 958 jit->seen |= SEEN_MEM; 959 EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off); 960 break; 961 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */ 962 /* lg %dst,0(off,%src) */ 963 jit->seen |= SEEN_MEM; 964 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off); 965 break; 966 /* 967 * BPF_JMP / CALL 968 */ 969 case BPF_JMP | BPF_CALL: 970 { 971 /* 972 * b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5) 973 */ 974 const u64 func = (u64)__bpf_call_base + imm; 975 976 REG_SET_SEEN(BPF_REG_5); 977 jit->seen |= SEEN_FUNC; 978 /* lg %w1,<d(imm)>(%l) */ 979 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_W1, REG_0, REG_L, 980 EMIT_CONST_U64(func)); 981 /* basr %r14,%w1 */ 982 EMIT2(0x0d00, REG_14, REG_W1); 983 /* lgr %b0,%r2: load return value into %b0 */ 984 EMIT4(0xb9040000, BPF_REG_0, REG_2); 985 if (bpf_helper_changes_pkt_data((void *)func)) { 986 jit->seen |= SEEN_SKB_CHANGE; 987 /* lg %b1,ST_OFF_SKBP(%r15) */ 988 EMIT6_DISP_LH(0xe3000000, 0x0004, BPF_REG_1, REG_0, 989 REG_15, STK_OFF_SKBP); 990 emit_load_skb_data_hlen(jit); 991 } 992 break; 993 } 994 case BPF_JMP | BPF_CALL | BPF_X: 995 /* 996 * Implicit input: 997 * B1: pointer to ctx 998 * B2: pointer to bpf_array 999 * B3: index in bpf_array 1000 */ 1001 jit->seen |= SEEN_TAIL_CALL; 1002 1003 /* 1004 * if (index >= array->map.max_entries) 1005 * goto out; 1006 */ 1007 1008 /* llgf %w1,map.max_entries(%b2) */ 1009 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2, 1010 offsetof(struct bpf_array, map.max_entries)); 1011 /* clgrj %b3,%w1,0xa,label0: if %b3 >= %w1 goto out */ 1012 EMIT6_PCREL_LABEL(0xec000000, 0x0065, BPF_REG_3, 1013 REG_W1, 0, 0xa); 1014 1015 /* 1016 * if (tail_call_cnt++ > MAX_TAIL_CALL_CNT) 1017 * goto out; 1018 */ 1019 1020 if (jit->seen & SEEN_STACK) 1021 off = STK_OFF_TCCNT + STK_OFF; 1022 else 1023 off = STK_OFF_TCCNT; 1024 /* lhi %w0,1 */ 1025 EMIT4_IMM(0xa7080000, REG_W0, 1); 1026 /* laal %w1,%w0,off(%r15) */ 1027 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W1, REG_W0, REG_15, off); 1028 /* clij %w1,MAX_TAIL_CALL_CNT,0x2,label0 */ 1029 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007f, REG_W1, 1030 MAX_TAIL_CALL_CNT, 0, 0x2); 1031 1032 /* 1033 * prog = array->ptrs[index]; 1034 * if (prog == NULL) 1035 * goto out; 1036 */ 1037 1038 /* sllg %r1,%b3,3: %r1 = index * 8 */ 1039 EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, BPF_REG_3, REG_0, 3); 1040 /* lg %r1,prog(%b2,%r1) */ 1041 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2, 1042 REG_1, offsetof(struct bpf_array, ptrs)); 1043 /* clgij %r1,0,0x8,label0 */ 1044 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007d, REG_1, 0, 0, 0x8); 1045 1046 /* 1047 * Restore registers before calling function 1048 */ 1049 save_restore_regs(jit, REGS_RESTORE); 1050 1051 /* 1052 * goto *(prog->bpf_func + tail_call_start); 1053 */ 1054 1055 /* lg %r1,bpf_func(%r1) */ 1056 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, REG_1, REG_0, 1057 offsetof(struct bpf_prog, bpf_func)); 1058 /* bc 0xf,tail_call_start(%r1) */ 1059 _EMIT4(0x47f01000 + jit->tail_call_start); 1060 /* out: */ 1061 jit->labels[0] = jit->prg; 1062 break; 1063 case BPF_JMP | BPF_EXIT: /* return b0 */ 1064 last = (i == fp->len - 1) ? 1 : 0; 1065 if (last && !(jit->seen & SEEN_RET0)) 1066 break; 1067 /* j <exit> */ 1068 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg); 1069 break; 1070 /* 1071 * Branch relative (number of skipped instructions) to offset on 1072 * condition. 1073 * 1074 * Condition code to mask mapping: 1075 * 1076 * CC | Description | Mask 1077 * ------------------------------ 1078 * 0 | Operands equal | 8 1079 * 1 | First operand low | 4 1080 * 2 | First operand high | 2 1081 * 3 | Unused | 1 1082 * 1083 * For s390x relative branches: ip = ip + off_bytes 1084 * For BPF relative branches: insn = insn + off_insns + 1 1085 * 1086 * For example for s390x with offset 0 we jump to the branch 1087 * instruction itself (loop) and for BPF with offset 0 we 1088 * branch to the instruction behind the branch. 1089 */ 1090 case BPF_JMP | BPF_JA: /* if (true) */ 1091 mask = 0xf000; /* j */ 1092 goto branch_oc; 1093 case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */ 1094 mask = 0x2000; /* jh */ 1095 goto branch_ks; 1096 case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */ 1097 mask = 0xa000; /* jhe */ 1098 goto branch_ks; 1099 case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */ 1100 mask = 0x2000; /* jh */ 1101 goto branch_ku; 1102 case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */ 1103 mask = 0xa000; /* jhe */ 1104 goto branch_ku; 1105 case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */ 1106 mask = 0x7000; /* jne */ 1107 goto branch_ku; 1108 case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */ 1109 mask = 0x8000; /* je */ 1110 goto branch_ku; 1111 case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */ 1112 mask = 0x7000; /* jnz */ 1113 /* lgfi %w1,imm (load sign extend imm) */ 1114 EMIT6_IMM(0xc0010000, REG_W1, imm); 1115 /* ngr %w1,%dst */ 1116 EMIT4(0xb9800000, REG_W1, dst_reg); 1117 goto branch_oc; 1118 1119 case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */ 1120 mask = 0x2000; /* jh */ 1121 goto branch_xs; 1122 case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */ 1123 mask = 0xa000; /* jhe */ 1124 goto branch_xs; 1125 case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */ 1126 mask = 0x2000; /* jh */ 1127 goto branch_xu; 1128 case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */ 1129 mask = 0xa000; /* jhe */ 1130 goto branch_xu; 1131 case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */ 1132 mask = 0x7000; /* jne */ 1133 goto branch_xu; 1134 case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */ 1135 mask = 0x8000; /* je */ 1136 goto branch_xu; 1137 case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */ 1138 mask = 0x7000; /* jnz */ 1139 /* ngrk %w1,%dst,%src */ 1140 EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg); 1141 goto branch_oc; 1142 branch_ks: 1143 /* lgfi %w1,imm (load sign extend imm) */ 1144 EMIT6_IMM(0xc0010000, REG_W1, imm); 1145 /* cgrj %dst,%w1,mask,off */ 1146 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask); 1147 break; 1148 branch_ku: 1149 /* lgfi %w1,imm (load sign extend imm) */ 1150 EMIT6_IMM(0xc0010000, REG_W1, imm); 1151 /* clgrj %dst,%w1,mask,off */ 1152 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask); 1153 break; 1154 branch_xs: 1155 /* cgrj %dst,%src,mask,off */ 1156 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask); 1157 break; 1158 branch_xu: 1159 /* clgrj %dst,%src,mask,off */ 1160 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask); 1161 break; 1162 branch_oc: 1163 /* brc mask,jmp_off (branch instruction needs 4 bytes) */ 1164 jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4); 1165 EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off); 1166 break; 1167 /* 1168 * BPF_LD 1169 */ 1170 case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */ 1171 case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */ 1172 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0)) 1173 func_addr = __pa(sk_load_byte_pos); 1174 else 1175 func_addr = __pa(sk_load_byte); 1176 goto call_fn; 1177 case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */ 1178 case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */ 1179 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0)) 1180 func_addr = __pa(sk_load_half_pos); 1181 else 1182 func_addr = __pa(sk_load_half); 1183 goto call_fn; 1184 case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */ 1185 case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */ 1186 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0)) 1187 func_addr = __pa(sk_load_word_pos); 1188 else 1189 func_addr = __pa(sk_load_word); 1190 goto call_fn; 1191 call_fn: 1192 jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC; 1193 REG_SET_SEEN(REG_14); /* Return address of possible func call */ 1194 1195 /* 1196 * Implicit input: 1197 * BPF_REG_6 (R7) : skb pointer 1198 * REG_SKB_DATA (R12): skb data pointer (if no BPF_REG_AX) 1199 * 1200 * Calculated input: 1201 * BPF_REG_2 (R3) : offset of byte(s) to fetch in skb 1202 * BPF_REG_5 (R6) : return address 1203 * 1204 * Output: 1205 * BPF_REG_0 (R14): data read from skb 1206 * 1207 * Scratch registers (BPF_REG_1-5) 1208 */ 1209 1210 /* Call function: llilf %w1,func_addr */ 1211 EMIT6_IMM(0xc00f0000, REG_W1, func_addr); 1212 1213 /* Offset: lgfi %b2,imm */ 1214 EMIT6_IMM(0xc0010000, BPF_REG_2, imm); 1215 if (BPF_MODE(insn->code) == BPF_IND) 1216 /* agfr %b2,%src (%src is s32 here) */ 1217 EMIT4(0xb9180000, BPF_REG_2, src_reg); 1218 1219 /* Reload REG_SKB_DATA if BPF_REG_AX is used */ 1220 if (jit->seen & SEEN_REG_AX) 1221 /* lg %skb_data,data_off(%b6) */ 1222 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0, 1223 BPF_REG_6, offsetof(struct sk_buff, data)); 1224 /* basr %b5,%w1 (%b5 is call saved) */ 1225 EMIT2(0x0d00, BPF_REG_5, REG_W1); 1226 1227 /* 1228 * Note: For fast access we jump directly after the 1229 * jnz instruction from bpf_jit.S 1230 */ 1231 /* jnz <ret0> */ 1232 EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg); 1233 break; 1234 default: /* too complex, give up */ 1235 pr_err("Unknown opcode %02x\n", insn->code); 1236 return -1; 1237 } 1238 return insn_count; 1239 } 1240 1241 /* 1242 * Compile eBPF program into s390x code 1243 */ 1244 static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp) 1245 { 1246 int i, insn_count; 1247 1248 jit->lit = jit->lit_start; 1249 jit->prg = 0; 1250 1251 bpf_jit_prologue(jit); 1252 for (i = 0; i < fp->len; i += insn_count) { 1253 insn_count = bpf_jit_insn(jit, fp, i); 1254 if (insn_count < 0) 1255 return -1; 1256 jit->addrs[i + 1] = jit->prg; /* Next instruction address */ 1257 } 1258 bpf_jit_epilogue(jit); 1259 1260 jit->lit_start = jit->prg; 1261 jit->size = jit->lit; 1262 jit->size_prg = jit->prg; 1263 return 0; 1264 } 1265 1266 /* 1267 * Compile eBPF program "fp" 1268 */ 1269 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp) 1270 { 1271 struct bpf_prog *tmp, *orig_fp = fp; 1272 struct bpf_binary_header *header; 1273 bool tmp_blinded = false; 1274 struct bpf_jit jit; 1275 int pass; 1276 1277 if (!bpf_jit_enable) 1278 return orig_fp; 1279 1280 tmp = bpf_jit_blind_constants(fp); 1281 /* 1282 * If blinding was requested and we failed during blinding, 1283 * we must fall back to the interpreter. 1284 */ 1285 if (IS_ERR(tmp)) 1286 return orig_fp; 1287 if (tmp != fp) { 1288 tmp_blinded = true; 1289 fp = tmp; 1290 } 1291 1292 memset(&jit, 0, sizeof(jit)); 1293 jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL); 1294 if (jit.addrs == NULL) { 1295 fp = orig_fp; 1296 goto out; 1297 } 1298 /* 1299 * Three initial passes: 1300 * - 1/2: Determine clobbered registers 1301 * - 3: Calculate program size and addrs arrray 1302 */ 1303 for (pass = 1; pass <= 3; pass++) { 1304 if (bpf_jit_prog(&jit, fp)) { 1305 fp = orig_fp; 1306 goto free_addrs; 1307 } 1308 } 1309 /* 1310 * Final pass: Allocate and generate program 1311 */ 1312 if (jit.size >= BPF_SIZE_MAX) { 1313 fp = orig_fp; 1314 goto free_addrs; 1315 } 1316 header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole); 1317 if (!header) { 1318 fp = orig_fp; 1319 goto free_addrs; 1320 } 1321 if (bpf_jit_prog(&jit, fp)) { 1322 fp = orig_fp; 1323 goto free_addrs; 1324 } 1325 if (bpf_jit_enable > 1) { 1326 bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf); 1327 print_fn_code(jit.prg_buf, jit.size_prg); 1328 } 1329 bpf_jit_binary_lock_ro(header); 1330 fp->bpf_func = (void *) jit.prg_buf; 1331 fp->jited = 1; 1332 free_addrs: 1333 kfree(jit.addrs); 1334 out: 1335 if (tmp_blinded) 1336 bpf_jit_prog_release_other(fp, fp == orig_fp ? 1337 tmp : orig_fp); 1338 return fp; 1339 } 1340