1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Optimized xor_block operation for RAID4/5 4 * 5 * Copyright IBM Corp. 2016 6 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> 7 */ 8 9 #include <linux/types.h> 10 #include <linux/export.h> 11 #include <linux/raid/xor.h> 12 #include <asm/xor.h> 13 14 static void xor_xc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) 15 { 16 asm volatile( 17 " larl 1,2f\n" 18 " aghi %0,-1\n" 19 " jm 3f\n" 20 " srlg 0,%0,8\n" 21 " ltgr 0,0\n" 22 " jz 1f\n" 23 "0: xc 0(256,%1),0(%2)\n" 24 " la %1,256(%1)\n" 25 " la %2,256(%2)\n" 26 " brctg 0,0b\n" 27 "1: ex %0,0(1)\n" 28 " j 3f\n" 29 "2: xc 0(1,%1),0(%2)\n" 30 "3:\n" 31 : : "d" (bytes), "a" (p1), "a" (p2) 32 : "0", "1", "cc", "memory"); 33 } 34 35 static void xor_xc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, 36 unsigned long *p3) 37 { 38 asm volatile( 39 " larl 1,2f\n" 40 " aghi %0,-1\n" 41 " jm 3f\n" 42 " srlg 0,%0,8\n" 43 " ltgr 0,0\n" 44 " jz 1f\n" 45 "0: xc 0(256,%1),0(%2)\n" 46 " xc 0(256,%1),0(%3)\n" 47 " la %1,256(%1)\n" 48 " la %2,256(%2)\n" 49 " la %3,256(%3)\n" 50 " brctg 0,0b\n" 51 "1: ex %0,0(1)\n" 52 " ex %0,6(1)\n" 53 " j 3f\n" 54 "2: xc 0(1,%1),0(%2)\n" 55 " xc 0(1,%1),0(%3)\n" 56 "3:\n" 57 : "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3) 58 : : "0", "1", "cc", "memory"); 59 } 60 61 static void xor_xc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, 62 unsigned long *p3, unsigned long *p4) 63 { 64 asm volatile( 65 " larl 1,2f\n" 66 " aghi %0,-1\n" 67 " jm 3f\n" 68 " srlg 0,%0,8\n" 69 " ltgr 0,0\n" 70 " jz 1f\n" 71 "0: xc 0(256,%1),0(%2)\n" 72 " xc 0(256,%1),0(%3)\n" 73 " xc 0(256,%1),0(%4)\n" 74 " la %1,256(%1)\n" 75 " la %2,256(%2)\n" 76 " la %3,256(%3)\n" 77 " la %4,256(%4)\n" 78 " brctg 0,0b\n" 79 "1: ex %0,0(1)\n" 80 " ex %0,6(1)\n" 81 " ex %0,12(1)\n" 82 " j 3f\n" 83 "2: xc 0(1,%1),0(%2)\n" 84 " xc 0(1,%1),0(%3)\n" 85 " xc 0(1,%1),0(%4)\n" 86 "3:\n" 87 : "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4) 88 : : "0", "1", "cc", "memory"); 89 } 90 91 static void xor_xc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, 92 unsigned long *p3, unsigned long *p4, unsigned long *p5) 93 { 94 asm volatile( 95 " larl 1,2f\n" 96 " aghi %0,-1\n" 97 " jm 3f\n" 98 " srlg 0,%0,8\n" 99 " ltgr 0,0\n" 100 " jz 1f\n" 101 "0: xc 0(256,%1),0(%2)\n" 102 " xc 0(256,%1),0(%3)\n" 103 " xc 0(256,%1),0(%4)\n" 104 " xc 0(256,%1),0(%5)\n" 105 " la %1,256(%1)\n" 106 " la %2,256(%2)\n" 107 " la %3,256(%3)\n" 108 " la %4,256(%4)\n" 109 " la %5,256(%5)\n" 110 " brctg 0,0b\n" 111 "1: ex %0,0(1)\n" 112 " ex %0,6(1)\n" 113 " ex %0,12(1)\n" 114 " ex %0,18(1)\n" 115 " j 3f\n" 116 "2: xc 0(1,%1),0(%2)\n" 117 " xc 0(1,%1),0(%3)\n" 118 " xc 0(1,%1),0(%4)\n" 119 " xc 0(1,%1),0(%5)\n" 120 "3:\n" 121 : "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4), 122 "+a" (p5) 123 : : "0", "1", "cc", "memory"); 124 } 125 126 struct xor_block_template xor_block_xc = { 127 .name = "xc", 128 .do_2 = xor_xc_2, 129 .do_3 = xor_xc_3, 130 .do_4 = xor_xc_4, 131 .do_5 = xor_xc_5, 132 }; 133 EXPORT_SYMBOL(xor_block_xc); 134