1 /* 2 * guest access functions 3 * 4 * Copyright IBM Corp. 2014 5 * 6 */ 7 8 #include <linux/vmalloc.h> 9 #include <linux/err.h> 10 #include <asm/pgtable.h> 11 #include <asm/gmap.h> 12 #include "kvm-s390.h" 13 #include "gaccess.h" 14 #include <asm/switch_to.h> 15 16 union asce { 17 unsigned long val; 18 struct { 19 unsigned long origin : 52; /* Region- or Segment-Table Origin */ 20 unsigned long : 2; 21 unsigned long g : 1; /* Subspace Group Control */ 22 unsigned long p : 1; /* Private Space Control */ 23 unsigned long s : 1; /* Storage-Alteration-Event Control */ 24 unsigned long x : 1; /* Space-Switch-Event Control */ 25 unsigned long r : 1; /* Real-Space Control */ 26 unsigned long : 1; 27 unsigned long dt : 2; /* Designation-Type Control */ 28 unsigned long tl : 2; /* Region- or Segment-Table Length */ 29 }; 30 }; 31 32 enum { 33 ASCE_TYPE_SEGMENT = 0, 34 ASCE_TYPE_REGION3 = 1, 35 ASCE_TYPE_REGION2 = 2, 36 ASCE_TYPE_REGION1 = 3 37 }; 38 39 union region1_table_entry { 40 unsigned long val; 41 struct { 42 unsigned long rto: 52;/* Region-Table Origin */ 43 unsigned long : 2; 44 unsigned long p : 1; /* DAT-Protection Bit */ 45 unsigned long : 1; 46 unsigned long tf : 2; /* Region-Second-Table Offset */ 47 unsigned long i : 1; /* Region-Invalid Bit */ 48 unsigned long : 1; 49 unsigned long tt : 2; /* Table-Type Bits */ 50 unsigned long tl : 2; /* Region-Second-Table Length */ 51 }; 52 }; 53 54 union region2_table_entry { 55 unsigned long val; 56 struct { 57 unsigned long rto: 52;/* Region-Table Origin */ 58 unsigned long : 2; 59 unsigned long p : 1; /* DAT-Protection Bit */ 60 unsigned long : 1; 61 unsigned long tf : 2; /* Region-Third-Table Offset */ 62 unsigned long i : 1; /* Region-Invalid Bit */ 63 unsigned long : 1; 64 unsigned long tt : 2; /* Table-Type Bits */ 65 unsigned long tl : 2; /* Region-Third-Table Length */ 66 }; 67 }; 68 69 struct region3_table_entry_fc0 { 70 unsigned long sto: 52;/* Segment-Table Origin */ 71 unsigned long : 1; 72 unsigned long fc : 1; /* Format-Control */ 73 unsigned long p : 1; /* DAT-Protection Bit */ 74 unsigned long : 1; 75 unsigned long tf : 2; /* Segment-Table Offset */ 76 unsigned long i : 1; /* Region-Invalid Bit */ 77 unsigned long cr : 1; /* Common-Region Bit */ 78 unsigned long tt : 2; /* Table-Type Bits */ 79 unsigned long tl : 2; /* Segment-Table Length */ 80 }; 81 82 struct region3_table_entry_fc1 { 83 unsigned long rfaa : 33; /* Region-Frame Absolute Address */ 84 unsigned long : 14; 85 unsigned long av : 1; /* ACCF-Validity Control */ 86 unsigned long acc: 4; /* Access-Control Bits */ 87 unsigned long f : 1; /* Fetch-Protection Bit */ 88 unsigned long fc : 1; /* Format-Control */ 89 unsigned long p : 1; /* DAT-Protection Bit */ 90 unsigned long co : 1; /* Change-Recording Override */ 91 unsigned long : 2; 92 unsigned long i : 1; /* Region-Invalid Bit */ 93 unsigned long cr : 1; /* Common-Region Bit */ 94 unsigned long tt : 2; /* Table-Type Bits */ 95 unsigned long : 2; 96 }; 97 98 union region3_table_entry { 99 unsigned long val; 100 struct region3_table_entry_fc0 fc0; 101 struct region3_table_entry_fc1 fc1; 102 struct { 103 unsigned long : 53; 104 unsigned long fc : 1; /* Format-Control */ 105 unsigned long : 4; 106 unsigned long i : 1; /* Region-Invalid Bit */ 107 unsigned long cr : 1; /* Common-Region Bit */ 108 unsigned long tt : 2; /* Table-Type Bits */ 109 unsigned long : 2; 110 }; 111 }; 112 113 struct segment_entry_fc0 { 114 unsigned long pto: 53;/* Page-Table Origin */ 115 unsigned long fc : 1; /* Format-Control */ 116 unsigned long p : 1; /* DAT-Protection Bit */ 117 unsigned long : 3; 118 unsigned long i : 1; /* Segment-Invalid Bit */ 119 unsigned long cs : 1; /* Common-Segment Bit */ 120 unsigned long tt : 2; /* Table-Type Bits */ 121 unsigned long : 2; 122 }; 123 124 struct segment_entry_fc1 { 125 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ 126 unsigned long : 3; 127 unsigned long av : 1; /* ACCF-Validity Control */ 128 unsigned long acc: 4; /* Access-Control Bits */ 129 unsigned long f : 1; /* Fetch-Protection Bit */ 130 unsigned long fc : 1; /* Format-Control */ 131 unsigned long p : 1; /* DAT-Protection Bit */ 132 unsigned long co : 1; /* Change-Recording Override */ 133 unsigned long : 2; 134 unsigned long i : 1; /* Segment-Invalid Bit */ 135 unsigned long cs : 1; /* Common-Segment Bit */ 136 unsigned long tt : 2; /* Table-Type Bits */ 137 unsigned long : 2; 138 }; 139 140 union segment_table_entry { 141 unsigned long val; 142 struct segment_entry_fc0 fc0; 143 struct segment_entry_fc1 fc1; 144 struct { 145 unsigned long : 53; 146 unsigned long fc : 1; /* Format-Control */ 147 unsigned long : 4; 148 unsigned long i : 1; /* Segment-Invalid Bit */ 149 unsigned long cs : 1; /* Common-Segment Bit */ 150 unsigned long tt : 2; /* Table-Type Bits */ 151 unsigned long : 2; 152 }; 153 }; 154 155 enum { 156 TABLE_TYPE_SEGMENT = 0, 157 TABLE_TYPE_REGION3 = 1, 158 TABLE_TYPE_REGION2 = 2, 159 TABLE_TYPE_REGION1 = 3 160 }; 161 162 union page_table_entry { 163 unsigned long val; 164 struct { 165 unsigned long pfra : 52; /* Page-Frame Real Address */ 166 unsigned long z : 1; /* Zero Bit */ 167 unsigned long i : 1; /* Page-Invalid Bit */ 168 unsigned long p : 1; /* DAT-Protection Bit */ 169 unsigned long co : 1; /* Change-Recording Override */ 170 unsigned long : 8; 171 }; 172 }; 173 174 /* 175 * vaddress union in order to easily decode a virtual address into its 176 * region first index, region second index etc. parts. 177 */ 178 union vaddress { 179 unsigned long addr; 180 struct { 181 unsigned long rfx : 11; 182 unsigned long rsx : 11; 183 unsigned long rtx : 11; 184 unsigned long sx : 11; 185 unsigned long px : 8; 186 unsigned long bx : 12; 187 }; 188 struct { 189 unsigned long rfx01 : 2; 190 unsigned long : 9; 191 unsigned long rsx01 : 2; 192 unsigned long : 9; 193 unsigned long rtx01 : 2; 194 unsigned long : 9; 195 unsigned long sx01 : 2; 196 unsigned long : 29; 197 }; 198 }; 199 200 /* 201 * raddress union which will contain the result (real or absolute address) 202 * after a page table walk. The rfaa, sfaa and pfra members are used to 203 * simply assign them the value of a region, segment or page table entry. 204 */ 205 union raddress { 206 unsigned long addr; 207 unsigned long rfaa : 33; /* Region-Frame Absolute Address */ 208 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ 209 unsigned long pfra : 52; /* Page-Frame Real Address */ 210 }; 211 212 union alet { 213 u32 val; 214 struct { 215 u32 reserved : 7; 216 u32 p : 1; 217 u32 alesn : 8; 218 u32 alen : 16; 219 }; 220 }; 221 222 union ald { 223 u32 val; 224 struct { 225 u32 : 1; 226 u32 alo : 24; 227 u32 all : 7; 228 }; 229 }; 230 231 struct ale { 232 unsigned long i : 1; /* ALEN-Invalid Bit */ 233 unsigned long : 5; 234 unsigned long fo : 1; /* Fetch-Only Bit */ 235 unsigned long p : 1; /* Private Bit */ 236 unsigned long alesn : 8; /* Access-List-Entry Sequence Number */ 237 unsigned long aleax : 16; /* Access-List-Entry Authorization Index */ 238 unsigned long : 32; 239 unsigned long : 1; 240 unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */ 241 unsigned long : 6; 242 unsigned long astesn : 32; /* ASTE Sequence Number */ 243 } __packed; 244 245 struct aste { 246 unsigned long i : 1; /* ASX-Invalid Bit */ 247 unsigned long ato : 29; /* Authority-Table Origin */ 248 unsigned long : 1; 249 unsigned long b : 1; /* Base-Space Bit */ 250 unsigned long ax : 16; /* Authorization Index */ 251 unsigned long atl : 12; /* Authority-Table Length */ 252 unsigned long : 2; 253 unsigned long ca : 1; /* Controlled-ASN Bit */ 254 unsigned long ra : 1; /* Reusable-ASN Bit */ 255 unsigned long asce : 64; /* Address-Space-Control Element */ 256 unsigned long ald : 32; 257 unsigned long astesn : 32; 258 /* .. more fields there */ 259 } __packed; 260 261 int ipte_lock_held(struct kvm_vcpu *vcpu) 262 { 263 if (vcpu->arch.sie_block->eca & 1) { 264 int rc; 265 266 read_lock(&vcpu->kvm->arch.sca_lock); 267 rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0; 268 read_unlock(&vcpu->kvm->arch.sca_lock); 269 return rc; 270 } 271 return vcpu->kvm->arch.ipte_lock_count != 0; 272 } 273 274 static void ipte_lock_simple(struct kvm_vcpu *vcpu) 275 { 276 union ipte_control old, new, *ic; 277 278 mutex_lock(&vcpu->kvm->arch.ipte_mutex); 279 vcpu->kvm->arch.ipte_lock_count++; 280 if (vcpu->kvm->arch.ipte_lock_count > 1) 281 goto out; 282 retry: 283 read_lock(&vcpu->kvm->arch.sca_lock); 284 ic = kvm_s390_get_ipte_control(vcpu->kvm); 285 do { 286 old = READ_ONCE(*ic); 287 if (old.k) { 288 read_unlock(&vcpu->kvm->arch.sca_lock); 289 cond_resched(); 290 goto retry; 291 } 292 new = old; 293 new.k = 1; 294 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 295 read_unlock(&vcpu->kvm->arch.sca_lock); 296 out: 297 mutex_unlock(&vcpu->kvm->arch.ipte_mutex); 298 } 299 300 static void ipte_unlock_simple(struct kvm_vcpu *vcpu) 301 { 302 union ipte_control old, new, *ic; 303 304 mutex_lock(&vcpu->kvm->arch.ipte_mutex); 305 vcpu->kvm->arch.ipte_lock_count--; 306 if (vcpu->kvm->arch.ipte_lock_count) 307 goto out; 308 read_lock(&vcpu->kvm->arch.sca_lock); 309 ic = kvm_s390_get_ipte_control(vcpu->kvm); 310 do { 311 old = READ_ONCE(*ic); 312 new = old; 313 new.k = 0; 314 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 315 read_unlock(&vcpu->kvm->arch.sca_lock); 316 wake_up(&vcpu->kvm->arch.ipte_wq); 317 out: 318 mutex_unlock(&vcpu->kvm->arch.ipte_mutex); 319 } 320 321 static void ipte_lock_siif(struct kvm_vcpu *vcpu) 322 { 323 union ipte_control old, new, *ic; 324 325 retry: 326 read_lock(&vcpu->kvm->arch.sca_lock); 327 ic = kvm_s390_get_ipte_control(vcpu->kvm); 328 do { 329 old = READ_ONCE(*ic); 330 if (old.kg) { 331 read_unlock(&vcpu->kvm->arch.sca_lock); 332 cond_resched(); 333 goto retry; 334 } 335 new = old; 336 new.k = 1; 337 new.kh++; 338 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 339 read_unlock(&vcpu->kvm->arch.sca_lock); 340 } 341 342 static void ipte_unlock_siif(struct kvm_vcpu *vcpu) 343 { 344 union ipte_control old, new, *ic; 345 346 read_lock(&vcpu->kvm->arch.sca_lock); 347 ic = kvm_s390_get_ipte_control(vcpu->kvm); 348 do { 349 old = READ_ONCE(*ic); 350 new = old; 351 new.kh--; 352 if (!new.kh) 353 new.k = 0; 354 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 355 read_unlock(&vcpu->kvm->arch.sca_lock); 356 if (!new.kh) 357 wake_up(&vcpu->kvm->arch.ipte_wq); 358 } 359 360 void ipte_lock(struct kvm_vcpu *vcpu) 361 { 362 if (vcpu->arch.sie_block->eca & 1) 363 ipte_lock_siif(vcpu); 364 else 365 ipte_lock_simple(vcpu); 366 } 367 368 void ipte_unlock(struct kvm_vcpu *vcpu) 369 { 370 if (vcpu->arch.sie_block->eca & 1) 371 ipte_unlock_siif(vcpu); 372 else 373 ipte_unlock_simple(vcpu); 374 } 375 376 static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, ar_t ar, 377 enum gacc_mode mode) 378 { 379 union alet alet; 380 struct ale ale; 381 struct aste aste; 382 unsigned long ald_addr, authority_table_addr; 383 union ald ald; 384 int eax, rc; 385 u8 authority_table; 386 387 if (ar >= NUM_ACRS) 388 return -EINVAL; 389 390 save_access_regs(vcpu->run->s.regs.acrs); 391 alet.val = vcpu->run->s.regs.acrs[ar]; 392 393 if (ar == 0 || alet.val == 0) { 394 asce->val = vcpu->arch.sie_block->gcr[1]; 395 return 0; 396 } else if (alet.val == 1) { 397 asce->val = vcpu->arch.sie_block->gcr[7]; 398 return 0; 399 } 400 401 if (alet.reserved) 402 return PGM_ALET_SPECIFICATION; 403 404 if (alet.p) 405 ald_addr = vcpu->arch.sie_block->gcr[5]; 406 else 407 ald_addr = vcpu->arch.sie_block->gcr[2]; 408 ald_addr &= 0x7fffffc0; 409 410 rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald)); 411 if (rc) 412 return rc; 413 414 if (alet.alen / 8 > ald.all) 415 return PGM_ALEN_TRANSLATION; 416 417 if (0x7fffffff - ald.alo * 128 < alet.alen * 16) 418 return PGM_ADDRESSING; 419 420 rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale, 421 sizeof(struct ale)); 422 if (rc) 423 return rc; 424 425 if (ale.i == 1) 426 return PGM_ALEN_TRANSLATION; 427 if (ale.alesn != alet.alesn) 428 return PGM_ALE_SEQUENCE; 429 430 rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste)); 431 if (rc) 432 return rc; 433 434 if (aste.i) 435 return PGM_ASTE_VALIDITY; 436 if (aste.astesn != ale.astesn) 437 return PGM_ASTE_SEQUENCE; 438 439 if (ale.p == 1) { 440 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; 441 if (ale.aleax != eax) { 442 if (eax / 16 > aste.atl) 443 return PGM_EXTENDED_AUTHORITY; 444 445 authority_table_addr = aste.ato * 4 + eax / 4; 446 447 rc = read_guest_real(vcpu, authority_table_addr, 448 &authority_table, 449 sizeof(u8)); 450 if (rc) 451 return rc; 452 453 if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0) 454 return PGM_EXTENDED_AUTHORITY; 455 } 456 } 457 458 if (ale.fo == 1 && mode == GACC_STORE) 459 return PGM_PROTECTION; 460 461 asce->val = aste.asce; 462 return 0; 463 } 464 465 struct trans_exc_code_bits { 466 unsigned long addr : 52; /* Translation-exception Address */ 467 unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */ 468 unsigned long : 6; 469 unsigned long b60 : 1; 470 unsigned long b61 : 1; 471 unsigned long as : 2; /* ASCE Identifier */ 472 }; 473 474 enum { 475 FSI_UNKNOWN = 0, /* Unknown wether fetch or store */ 476 FSI_STORE = 1, /* Exception was due to store operation */ 477 FSI_FETCH = 2 /* Exception was due to fetch operation */ 478 }; 479 480 enum prot_type { 481 PROT_TYPE_LA = 0, 482 PROT_TYPE_KEYC = 1, 483 PROT_TYPE_ALC = 2, 484 PROT_TYPE_DAT = 3, 485 }; 486 487 static int trans_exc(struct kvm_vcpu *vcpu, int code, unsigned long gva, 488 ar_t ar, enum gacc_mode mode, enum prot_type prot) 489 { 490 struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm; 491 struct trans_exc_code_bits *tec; 492 493 memset(pgm, 0, sizeof(*pgm)); 494 pgm->code = code; 495 tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code; 496 497 switch (code) { 498 case PGM_PROTECTION: 499 switch (prot) { 500 case PROT_TYPE_ALC: 501 tec->b60 = 1; 502 /* FALL THROUGH */ 503 case PROT_TYPE_DAT: 504 tec->b61 = 1; 505 break; 506 default: /* LA and KEYC set b61 to 0, other params undefined */ 507 return code; 508 } 509 /* FALL THROUGH */ 510 case PGM_ASCE_TYPE: 511 case PGM_PAGE_TRANSLATION: 512 case PGM_REGION_FIRST_TRANS: 513 case PGM_REGION_SECOND_TRANS: 514 case PGM_REGION_THIRD_TRANS: 515 case PGM_SEGMENT_TRANSLATION: 516 /* 517 * op_access_id only applies to MOVE_PAGE -> set bit 61 518 * exc_access_id has to be set to 0 for some instructions. Both 519 * cases have to be handled by the caller. 520 */ 521 tec->addr = gva >> PAGE_SHIFT; 522 tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH; 523 tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as; 524 /* FALL THROUGH */ 525 case PGM_ALEN_TRANSLATION: 526 case PGM_ALE_SEQUENCE: 527 case PGM_ASTE_VALIDITY: 528 case PGM_ASTE_SEQUENCE: 529 case PGM_EXTENDED_AUTHORITY: 530 /* 531 * We can always store exc_access_id, as it is 532 * undefined for non-ar cases. It is undefined for 533 * most DAT protection exceptions. 534 */ 535 pgm->exc_access_id = ar; 536 break; 537 } 538 return code; 539 } 540 541 static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce, 542 unsigned long ga, ar_t ar, enum gacc_mode mode) 543 { 544 int rc; 545 struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw); 546 547 if (!psw.t) { 548 asce->val = 0; 549 asce->r = 1; 550 return 0; 551 } 552 553 if (mode == GACC_IFETCH) 554 psw.as = psw.as == PSW_AS_HOME ? PSW_AS_HOME : PSW_AS_PRIMARY; 555 556 switch (psw.as) { 557 case PSW_AS_PRIMARY: 558 asce->val = vcpu->arch.sie_block->gcr[1]; 559 return 0; 560 case PSW_AS_SECONDARY: 561 asce->val = vcpu->arch.sie_block->gcr[7]; 562 return 0; 563 case PSW_AS_HOME: 564 asce->val = vcpu->arch.sie_block->gcr[13]; 565 return 0; 566 case PSW_AS_ACCREG: 567 rc = ar_translation(vcpu, asce, ar, mode); 568 if (rc > 0) 569 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_ALC); 570 return rc; 571 } 572 return 0; 573 } 574 575 static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val) 576 { 577 return kvm_read_guest(kvm, gpa, val, sizeof(*val)); 578 } 579 580 /** 581 * guest_translate - translate a guest virtual into a guest absolute address 582 * @vcpu: virtual cpu 583 * @gva: guest virtual address 584 * @gpa: points to where guest physical (absolute) address should be stored 585 * @asce: effective asce 586 * @mode: indicates the access mode to be used 587 * 588 * Translate a guest virtual address into a guest absolute address by means 589 * of dynamic address translation as specified by the architecture. 590 * If the resulting absolute address is not available in the configuration 591 * an addressing exception is indicated and @gpa will not be changed. 592 * 593 * Returns: - zero on success; @gpa contains the resulting absolute address 594 * - a negative value if guest access failed due to e.g. broken 595 * guest mapping 596 * - a positve value if an access exception happened. In this case 597 * the returned value is the program interruption code as defined 598 * by the architecture 599 */ 600 static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva, 601 unsigned long *gpa, const union asce asce, 602 enum gacc_mode mode) 603 { 604 union vaddress vaddr = {.addr = gva}; 605 union raddress raddr = {.addr = gva}; 606 union page_table_entry pte; 607 int dat_protection = 0; 608 union ctlreg0 ctlreg0; 609 unsigned long ptr; 610 int edat1, edat2; 611 612 ctlreg0.val = vcpu->arch.sie_block->gcr[0]; 613 edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8); 614 edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78); 615 if (asce.r) 616 goto real_address; 617 ptr = asce.origin * 4096; 618 switch (asce.dt) { 619 case ASCE_TYPE_REGION1: 620 if (vaddr.rfx01 > asce.tl) 621 return PGM_REGION_FIRST_TRANS; 622 ptr += vaddr.rfx * 8; 623 break; 624 case ASCE_TYPE_REGION2: 625 if (vaddr.rfx) 626 return PGM_ASCE_TYPE; 627 if (vaddr.rsx01 > asce.tl) 628 return PGM_REGION_SECOND_TRANS; 629 ptr += vaddr.rsx * 8; 630 break; 631 case ASCE_TYPE_REGION3: 632 if (vaddr.rfx || vaddr.rsx) 633 return PGM_ASCE_TYPE; 634 if (vaddr.rtx01 > asce.tl) 635 return PGM_REGION_THIRD_TRANS; 636 ptr += vaddr.rtx * 8; 637 break; 638 case ASCE_TYPE_SEGMENT: 639 if (vaddr.rfx || vaddr.rsx || vaddr.rtx) 640 return PGM_ASCE_TYPE; 641 if (vaddr.sx01 > asce.tl) 642 return PGM_SEGMENT_TRANSLATION; 643 ptr += vaddr.sx * 8; 644 break; 645 } 646 switch (asce.dt) { 647 case ASCE_TYPE_REGION1: { 648 union region1_table_entry rfte; 649 650 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 651 return PGM_ADDRESSING; 652 if (deref_table(vcpu->kvm, ptr, &rfte.val)) 653 return -EFAULT; 654 if (rfte.i) 655 return PGM_REGION_FIRST_TRANS; 656 if (rfte.tt != TABLE_TYPE_REGION1) 657 return PGM_TRANSLATION_SPEC; 658 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) 659 return PGM_REGION_SECOND_TRANS; 660 if (edat1) 661 dat_protection |= rfte.p; 662 ptr = rfte.rto * 4096 + vaddr.rsx * 8; 663 } 664 /* fallthrough */ 665 case ASCE_TYPE_REGION2: { 666 union region2_table_entry rste; 667 668 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 669 return PGM_ADDRESSING; 670 if (deref_table(vcpu->kvm, ptr, &rste.val)) 671 return -EFAULT; 672 if (rste.i) 673 return PGM_REGION_SECOND_TRANS; 674 if (rste.tt != TABLE_TYPE_REGION2) 675 return PGM_TRANSLATION_SPEC; 676 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) 677 return PGM_REGION_THIRD_TRANS; 678 if (edat1) 679 dat_protection |= rste.p; 680 ptr = rste.rto * 4096 + vaddr.rtx * 8; 681 } 682 /* fallthrough */ 683 case ASCE_TYPE_REGION3: { 684 union region3_table_entry rtte; 685 686 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 687 return PGM_ADDRESSING; 688 if (deref_table(vcpu->kvm, ptr, &rtte.val)) 689 return -EFAULT; 690 if (rtte.i) 691 return PGM_REGION_THIRD_TRANS; 692 if (rtte.tt != TABLE_TYPE_REGION3) 693 return PGM_TRANSLATION_SPEC; 694 if (rtte.cr && asce.p && edat2) 695 return PGM_TRANSLATION_SPEC; 696 if (rtte.fc && edat2) { 697 dat_protection |= rtte.fc1.p; 698 raddr.rfaa = rtte.fc1.rfaa; 699 goto absolute_address; 700 } 701 if (vaddr.sx01 < rtte.fc0.tf) 702 return PGM_SEGMENT_TRANSLATION; 703 if (vaddr.sx01 > rtte.fc0.tl) 704 return PGM_SEGMENT_TRANSLATION; 705 if (edat1) 706 dat_protection |= rtte.fc0.p; 707 ptr = rtte.fc0.sto * 4096 + vaddr.sx * 8; 708 } 709 /* fallthrough */ 710 case ASCE_TYPE_SEGMENT: { 711 union segment_table_entry ste; 712 713 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 714 return PGM_ADDRESSING; 715 if (deref_table(vcpu->kvm, ptr, &ste.val)) 716 return -EFAULT; 717 if (ste.i) 718 return PGM_SEGMENT_TRANSLATION; 719 if (ste.tt != TABLE_TYPE_SEGMENT) 720 return PGM_TRANSLATION_SPEC; 721 if (ste.cs && asce.p) 722 return PGM_TRANSLATION_SPEC; 723 if (ste.fc && edat1) { 724 dat_protection |= ste.fc1.p; 725 raddr.sfaa = ste.fc1.sfaa; 726 goto absolute_address; 727 } 728 dat_protection |= ste.fc0.p; 729 ptr = ste.fc0.pto * 2048 + vaddr.px * 8; 730 } 731 } 732 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 733 return PGM_ADDRESSING; 734 if (deref_table(vcpu->kvm, ptr, &pte.val)) 735 return -EFAULT; 736 if (pte.i) 737 return PGM_PAGE_TRANSLATION; 738 if (pte.z) 739 return PGM_TRANSLATION_SPEC; 740 if (pte.co && !edat1) 741 return PGM_TRANSLATION_SPEC; 742 dat_protection |= pte.p; 743 raddr.pfra = pte.pfra; 744 real_address: 745 raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr); 746 absolute_address: 747 if (mode == GACC_STORE && dat_protection) 748 return PGM_PROTECTION; 749 if (kvm_is_error_gpa(vcpu->kvm, raddr.addr)) 750 return PGM_ADDRESSING; 751 *gpa = raddr.addr; 752 return 0; 753 } 754 755 static inline int is_low_address(unsigned long ga) 756 { 757 /* Check for address ranges 0..511 and 4096..4607 */ 758 return (ga & ~0x11fful) == 0; 759 } 760 761 static int low_address_protection_enabled(struct kvm_vcpu *vcpu, 762 const union asce asce) 763 { 764 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; 765 psw_t *psw = &vcpu->arch.sie_block->gpsw; 766 767 if (!ctlreg0.lap) 768 return 0; 769 if (psw_bits(*psw).t && asce.p) 770 return 0; 771 return 1; 772 } 773 774 static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, 775 unsigned long *pages, unsigned long nr_pages, 776 const union asce asce, enum gacc_mode mode) 777 { 778 psw_t *psw = &vcpu->arch.sie_block->gpsw; 779 int lap_enabled, rc = 0; 780 781 lap_enabled = low_address_protection_enabled(vcpu, asce); 782 while (nr_pages) { 783 ga = kvm_s390_logical_to_effective(vcpu, ga); 784 if (mode == GACC_STORE && lap_enabled && is_low_address(ga)) 785 return trans_exc(vcpu, PGM_PROTECTION, ga, ar, mode, 786 PROT_TYPE_LA); 787 ga &= PAGE_MASK; 788 if (psw_bits(*psw).t) { 789 rc = guest_translate(vcpu, ga, pages, asce, mode); 790 if (rc < 0) 791 return rc; 792 } else { 793 *pages = kvm_s390_real_to_abs(vcpu, ga); 794 if (kvm_is_error_gpa(vcpu->kvm, *pages)) 795 rc = PGM_ADDRESSING; 796 } 797 if (rc) 798 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_DAT); 799 ga += PAGE_SIZE; 800 pages++; 801 nr_pages--; 802 } 803 return 0; 804 } 805 806 int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data, 807 unsigned long len, enum gacc_mode mode) 808 { 809 psw_t *psw = &vcpu->arch.sie_block->gpsw; 810 unsigned long _len, nr_pages, gpa, idx; 811 unsigned long pages_array[2]; 812 unsigned long *pages; 813 int need_ipte_lock; 814 union asce asce; 815 int rc; 816 817 if (!len) 818 return 0; 819 ga = kvm_s390_logical_to_effective(vcpu, ga); 820 rc = get_vcpu_asce(vcpu, &asce, ga, ar, mode); 821 if (rc) 822 return rc; 823 nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1; 824 pages = pages_array; 825 if (nr_pages > ARRAY_SIZE(pages_array)) 826 pages = vmalloc(nr_pages * sizeof(unsigned long)); 827 if (!pages) 828 return -ENOMEM; 829 need_ipte_lock = psw_bits(*psw).t && !asce.r; 830 if (need_ipte_lock) 831 ipte_lock(vcpu); 832 rc = guest_page_range(vcpu, ga, ar, pages, nr_pages, asce, mode); 833 for (idx = 0; idx < nr_pages && !rc; idx++) { 834 gpa = *(pages + idx) + (ga & ~PAGE_MASK); 835 _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); 836 if (mode == GACC_STORE) 837 rc = kvm_write_guest(vcpu->kvm, gpa, data, _len); 838 else 839 rc = kvm_read_guest(vcpu->kvm, gpa, data, _len); 840 len -= _len; 841 ga += _len; 842 data += _len; 843 } 844 if (need_ipte_lock) 845 ipte_unlock(vcpu); 846 if (nr_pages > ARRAY_SIZE(pages_array)) 847 vfree(pages); 848 return rc; 849 } 850 851 int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra, 852 void *data, unsigned long len, enum gacc_mode mode) 853 { 854 unsigned long _len, gpa; 855 int rc = 0; 856 857 while (len && !rc) { 858 gpa = kvm_s390_real_to_abs(vcpu, gra); 859 _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); 860 if (mode) 861 rc = write_guest_abs(vcpu, gpa, data, _len); 862 else 863 rc = read_guest_abs(vcpu, gpa, data, _len); 864 len -= _len; 865 gra += _len; 866 data += _len; 867 } 868 return rc; 869 } 870 871 /** 872 * guest_translate_address - translate guest logical into guest absolute address 873 * 874 * Parameter semantics are the same as the ones from guest_translate. 875 * The memory contents at the guest address are not changed. 876 * 877 * Note: The IPTE lock is not taken during this function, so the caller 878 * has to take care of this. 879 */ 880 int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar, 881 unsigned long *gpa, enum gacc_mode mode) 882 { 883 psw_t *psw = &vcpu->arch.sie_block->gpsw; 884 union asce asce; 885 int rc; 886 887 gva = kvm_s390_logical_to_effective(vcpu, gva); 888 rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode); 889 if (rc) 890 return rc; 891 if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) { 892 if (mode == GACC_STORE) 893 return trans_exc(vcpu, PGM_PROTECTION, gva, 0, 894 mode, PROT_TYPE_LA); 895 } 896 897 if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */ 898 rc = guest_translate(vcpu, gva, gpa, asce, mode); 899 if (rc > 0) 900 return trans_exc(vcpu, rc, gva, 0, mode, PROT_TYPE_DAT); 901 } else { 902 *gpa = kvm_s390_real_to_abs(vcpu, gva); 903 if (kvm_is_error_gpa(vcpu->kvm, *gpa)) 904 return trans_exc(vcpu, rc, gva, PGM_ADDRESSING, mode, 0); 905 } 906 907 return rc; 908 } 909 910 /** 911 * check_gva_range - test a range of guest virtual addresses for accessibility 912 */ 913 int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar, 914 unsigned long length, enum gacc_mode mode) 915 { 916 unsigned long gpa; 917 unsigned long currlen; 918 int rc = 0; 919 920 ipte_lock(vcpu); 921 while (length > 0 && !rc) { 922 currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE)); 923 rc = guest_translate_address(vcpu, gva, ar, &gpa, mode); 924 gva += currlen; 925 length -= currlen; 926 } 927 ipte_unlock(vcpu); 928 929 return rc; 930 } 931 932 /** 933 * kvm_s390_check_low_addr_prot_real - check for low-address protection 934 * @gra: Guest real address 935 * 936 * Checks whether an address is subject to low-address protection and set 937 * up vcpu->arch.pgm accordingly if necessary. 938 * 939 * Return: 0 if no protection exception, or PGM_PROTECTION if protected. 940 */ 941 int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra) 942 { 943 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; 944 945 if (!ctlreg0.lap || !is_low_address(gra)) 946 return 0; 947 return trans_exc(vcpu, PGM_PROTECTION, gra, 0, GACC_STORE, PROT_TYPE_LA); 948 } 949 950 /** 951 * kvm_s390_shadow_tables - walk the guest page table and create shadow tables 952 * @sg: pointer to the shadow guest address space structure 953 * @saddr: faulting address in the shadow gmap 954 * @pgt: pointer to the page table address result 955 * @fake: pgt references contiguous guest memory block, not a pgtable 956 */ 957 static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr, 958 unsigned long *pgt, int *dat_protection, 959 int *fake) 960 { 961 struct gmap *parent; 962 union asce asce; 963 union vaddress vaddr; 964 unsigned long ptr; 965 int rc; 966 967 *fake = 0; 968 *dat_protection = 0; 969 parent = sg->parent; 970 vaddr.addr = saddr; 971 asce.val = sg->orig_asce; 972 ptr = asce.origin * 4096; 973 if (asce.r) { 974 *fake = 1; 975 asce.dt = ASCE_TYPE_REGION1; 976 } 977 switch (asce.dt) { 978 case ASCE_TYPE_REGION1: 979 if (vaddr.rfx01 > asce.tl && !asce.r) 980 return PGM_REGION_FIRST_TRANS; 981 break; 982 case ASCE_TYPE_REGION2: 983 if (vaddr.rfx) 984 return PGM_ASCE_TYPE; 985 if (vaddr.rsx01 > asce.tl) 986 return PGM_REGION_SECOND_TRANS; 987 break; 988 case ASCE_TYPE_REGION3: 989 if (vaddr.rfx || vaddr.rsx) 990 return PGM_ASCE_TYPE; 991 if (vaddr.rtx01 > asce.tl) 992 return PGM_REGION_THIRD_TRANS; 993 break; 994 case ASCE_TYPE_SEGMENT: 995 if (vaddr.rfx || vaddr.rsx || vaddr.rtx) 996 return PGM_ASCE_TYPE; 997 if (vaddr.sx01 > asce.tl) 998 return PGM_SEGMENT_TRANSLATION; 999 break; 1000 } 1001 1002 switch (asce.dt) { 1003 case ASCE_TYPE_REGION1: { 1004 union region1_table_entry rfte; 1005 1006 if (*fake) { 1007 /* offset in 16EB guest memory block */ 1008 ptr = ptr + ((unsigned long) vaddr.rsx << 53UL); 1009 rfte.val = ptr; 1010 goto shadow_r2t; 1011 } 1012 rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val); 1013 if (rc) 1014 return rc; 1015 if (rfte.i) 1016 return PGM_REGION_FIRST_TRANS; 1017 if (rfte.tt != TABLE_TYPE_REGION1) 1018 return PGM_TRANSLATION_SPEC; 1019 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) 1020 return PGM_REGION_SECOND_TRANS; 1021 if (sg->edat_level >= 1) 1022 *dat_protection |= rfte.p; 1023 ptr = rfte.rto << 12UL; 1024 shadow_r2t: 1025 rc = gmap_shadow_r2t(sg, saddr, rfte.val, *fake); 1026 if (rc) 1027 return rc; 1028 /* fallthrough */ 1029 } 1030 case ASCE_TYPE_REGION2: { 1031 union region2_table_entry rste; 1032 1033 if (*fake) { 1034 /* offset in 8PB guest memory block */ 1035 ptr = ptr + ((unsigned long) vaddr.rtx << 42UL); 1036 rste.val = ptr; 1037 goto shadow_r3t; 1038 } 1039 rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val); 1040 if (rc) 1041 return rc; 1042 if (rste.i) 1043 return PGM_REGION_SECOND_TRANS; 1044 if (rste.tt != TABLE_TYPE_REGION2) 1045 return PGM_TRANSLATION_SPEC; 1046 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) 1047 return PGM_REGION_THIRD_TRANS; 1048 if (sg->edat_level >= 1) 1049 *dat_protection |= rste.p; 1050 ptr = rste.rto << 12UL; 1051 shadow_r3t: 1052 rste.p |= *dat_protection; 1053 rc = gmap_shadow_r3t(sg, saddr, rste.val, *fake); 1054 if (rc) 1055 return rc; 1056 /* fallthrough */ 1057 } 1058 case ASCE_TYPE_REGION3: { 1059 union region3_table_entry rtte; 1060 1061 if (*fake) { 1062 /* offset in 4TB guest memory block */ 1063 ptr = ptr + ((unsigned long) vaddr.sx << 31UL); 1064 rtte.val = ptr; 1065 goto shadow_sgt; 1066 } 1067 rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val); 1068 if (rc) 1069 return rc; 1070 if (rtte.i) 1071 return PGM_REGION_THIRD_TRANS; 1072 if (rtte.tt != TABLE_TYPE_REGION3) 1073 return PGM_TRANSLATION_SPEC; 1074 if (rtte.cr && asce.p && sg->edat_level >= 2) 1075 return PGM_TRANSLATION_SPEC; 1076 if (rtte.fc && sg->edat_level >= 2) { 1077 *dat_protection |= rtte.fc0.p; 1078 *fake = 1; 1079 ptr = rtte.fc1.rfaa << 31UL; 1080 rtte.val = ptr; 1081 goto shadow_sgt; 1082 } 1083 if (vaddr.sx01 < rtte.fc0.tf || vaddr.sx01 > rtte.fc0.tl) 1084 return PGM_SEGMENT_TRANSLATION; 1085 if (sg->edat_level >= 1) 1086 *dat_protection |= rtte.fc0.p; 1087 ptr = rtte.fc0.sto << 12UL; 1088 shadow_sgt: 1089 rtte.fc0.p |= *dat_protection; 1090 rc = gmap_shadow_sgt(sg, saddr, rtte.val, *fake); 1091 if (rc) 1092 return rc; 1093 /* fallthrough */ 1094 } 1095 case ASCE_TYPE_SEGMENT: { 1096 union segment_table_entry ste; 1097 1098 if (*fake) { 1099 /* offset in 2G guest memory block */ 1100 ptr = ptr + ((unsigned long) vaddr.sx << 20UL); 1101 ste.val = ptr; 1102 goto shadow_pgt; 1103 } 1104 rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val); 1105 if (rc) 1106 return rc; 1107 if (ste.i) 1108 return PGM_SEGMENT_TRANSLATION; 1109 if (ste.tt != TABLE_TYPE_SEGMENT) 1110 return PGM_TRANSLATION_SPEC; 1111 if (ste.cs && asce.p) 1112 return PGM_TRANSLATION_SPEC; 1113 *dat_protection |= ste.fc0.p; 1114 if (ste.fc && sg->edat_level >= 1) { 1115 *fake = 1; 1116 ptr = ste.fc1.sfaa << 20UL; 1117 ste.val = ptr; 1118 goto shadow_pgt; 1119 } 1120 ptr = ste.fc0.pto << 11UL; 1121 shadow_pgt: 1122 ste.fc0.p |= *dat_protection; 1123 rc = gmap_shadow_pgt(sg, saddr, ste.val, *fake); 1124 if (rc) 1125 return rc; 1126 } 1127 } 1128 /* Return the parent address of the page table */ 1129 *pgt = ptr; 1130 return 0; 1131 } 1132 1133 /** 1134 * kvm_s390_shadow_fault - handle fault on a shadow page table 1135 * @vcpu: virtual cpu 1136 * @sg: pointer to the shadow guest address space structure 1137 * @saddr: faulting address in the shadow gmap 1138 * 1139 * Returns: - 0 if the shadow fault was successfully resolved 1140 * - > 0 (pgm exception code) on exceptions while faulting 1141 * - -EAGAIN if the caller can retry immediately 1142 * - -EFAULT when accessing invalid guest addresses 1143 * - -ENOMEM if out of memory 1144 */ 1145 int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg, 1146 unsigned long saddr) 1147 { 1148 union vaddress vaddr; 1149 union page_table_entry pte; 1150 unsigned long pgt; 1151 int dat_protection, fake; 1152 int rc; 1153 1154 down_read(&sg->mm->mmap_sem); 1155 /* 1156 * We don't want any guest-2 tables to change - so the parent 1157 * tables/pointers we read stay valid - unshadowing is however 1158 * always possible - only guest_table_lock protects us. 1159 */ 1160 ipte_lock(vcpu); 1161 1162 rc = gmap_shadow_pgt_lookup(sg, saddr, &pgt, &dat_protection, &fake); 1163 if (rc) 1164 rc = kvm_s390_shadow_tables(sg, saddr, &pgt, &dat_protection, 1165 &fake); 1166 1167 vaddr.addr = saddr; 1168 if (fake) { 1169 /* offset in 1MB guest memory block */ 1170 pte.val = pgt + ((unsigned long) vaddr.px << 12UL); 1171 goto shadow_page; 1172 } 1173 if (!rc) 1174 rc = gmap_read_table(sg->parent, pgt + vaddr.px * 8, &pte.val); 1175 if (!rc && pte.i) 1176 rc = PGM_PAGE_TRANSLATION; 1177 if (!rc && (pte.z || (pte.co && sg->edat_level < 1))) 1178 rc = PGM_TRANSLATION_SPEC; 1179 shadow_page: 1180 pte.p |= dat_protection; 1181 if (!rc) 1182 rc = gmap_shadow_page(sg, saddr, __pte(pte.val)); 1183 ipte_unlock(vcpu); 1184 up_read(&sg->mm->mmap_sem); 1185 return rc; 1186 } 1187