1 /* 2 * guest access functions 3 * 4 * Copyright IBM Corp. 2014 5 * 6 */ 7 8 #include <linux/vmalloc.h> 9 #include <linux/err.h> 10 #include <asm/pgtable.h> 11 #include <asm/gmap.h> 12 #include "kvm-s390.h" 13 #include "gaccess.h" 14 #include <asm/switch_to.h> 15 16 union asce { 17 unsigned long val; 18 struct { 19 unsigned long origin : 52; /* Region- or Segment-Table Origin */ 20 unsigned long : 2; 21 unsigned long g : 1; /* Subspace Group Control */ 22 unsigned long p : 1; /* Private Space Control */ 23 unsigned long s : 1; /* Storage-Alteration-Event Control */ 24 unsigned long x : 1; /* Space-Switch-Event Control */ 25 unsigned long r : 1; /* Real-Space Control */ 26 unsigned long : 1; 27 unsigned long dt : 2; /* Designation-Type Control */ 28 unsigned long tl : 2; /* Region- or Segment-Table Length */ 29 }; 30 }; 31 32 enum { 33 ASCE_TYPE_SEGMENT = 0, 34 ASCE_TYPE_REGION3 = 1, 35 ASCE_TYPE_REGION2 = 2, 36 ASCE_TYPE_REGION1 = 3 37 }; 38 39 union region1_table_entry { 40 unsigned long val; 41 struct { 42 unsigned long rto: 52;/* Region-Table Origin */ 43 unsigned long : 2; 44 unsigned long p : 1; /* DAT-Protection Bit */ 45 unsigned long : 1; 46 unsigned long tf : 2; /* Region-Second-Table Offset */ 47 unsigned long i : 1; /* Region-Invalid Bit */ 48 unsigned long : 1; 49 unsigned long tt : 2; /* Table-Type Bits */ 50 unsigned long tl : 2; /* Region-Second-Table Length */ 51 }; 52 }; 53 54 union region2_table_entry { 55 unsigned long val; 56 struct { 57 unsigned long rto: 52;/* Region-Table Origin */ 58 unsigned long : 2; 59 unsigned long p : 1; /* DAT-Protection Bit */ 60 unsigned long : 1; 61 unsigned long tf : 2; /* Region-Third-Table Offset */ 62 unsigned long i : 1; /* Region-Invalid Bit */ 63 unsigned long : 1; 64 unsigned long tt : 2; /* Table-Type Bits */ 65 unsigned long tl : 2; /* Region-Third-Table Length */ 66 }; 67 }; 68 69 struct region3_table_entry_fc0 { 70 unsigned long sto: 52;/* Segment-Table Origin */ 71 unsigned long : 1; 72 unsigned long fc : 1; /* Format-Control */ 73 unsigned long p : 1; /* DAT-Protection Bit */ 74 unsigned long : 1; 75 unsigned long tf : 2; /* Segment-Table Offset */ 76 unsigned long i : 1; /* Region-Invalid Bit */ 77 unsigned long cr : 1; /* Common-Region Bit */ 78 unsigned long tt : 2; /* Table-Type Bits */ 79 unsigned long tl : 2; /* Segment-Table Length */ 80 }; 81 82 struct region3_table_entry_fc1 { 83 unsigned long rfaa : 33; /* Region-Frame Absolute Address */ 84 unsigned long : 14; 85 unsigned long av : 1; /* ACCF-Validity Control */ 86 unsigned long acc: 4; /* Access-Control Bits */ 87 unsigned long f : 1; /* Fetch-Protection Bit */ 88 unsigned long fc : 1; /* Format-Control */ 89 unsigned long p : 1; /* DAT-Protection Bit */ 90 unsigned long co : 1; /* Change-Recording Override */ 91 unsigned long : 2; 92 unsigned long i : 1; /* Region-Invalid Bit */ 93 unsigned long cr : 1; /* Common-Region Bit */ 94 unsigned long tt : 2; /* Table-Type Bits */ 95 unsigned long : 2; 96 }; 97 98 union region3_table_entry { 99 unsigned long val; 100 struct region3_table_entry_fc0 fc0; 101 struct region3_table_entry_fc1 fc1; 102 struct { 103 unsigned long : 53; 104 unsigned long fc : 1; /* Format-Control */ 105 unsigned long : 4; 106 unsigned long i : 1; /* Region-Invalid Bit */ 107 unsigned long cr : 1; /* Common-Region Bit */ 108 unsigned long tt : 2; /* Table-Type Bits */ 109 unsigned long : 2; 110 }; 111 }; 112 113 struct segment_entry_fc0 { 114 unsigned long pto: 53;/* Page-Table Origin */ 115 unsigned long fc : 1; /* Format-Control */ 116 unsigned long p : 1; /* DAT-Protection Bit */ 117 unsigned long : 3; 118 unsigned long i : 1; /* Segment-Invalid Bit */ 119 unsigned long cs : 1; /* Common-Segment Bit */ 120 unsigned long tt : 2; /* Table-Type Bits */ 121 unsigned long : 2; 122 }; 123 124 struct segment_entry_fc1 { 125 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ 126 unsigned long : 3; 127 unsigned long av : 1; /* ACCF-Validity Control */ 128 unsigned long acc: 4; /* Access-Control Bits */ 129 unsigned long f : 1; /* Fetch-Protection Bit */ 130 unsigned long fc : 1; /* Format-Control */ 131 unsigned long p : 1; /* DAT-Protection Bit */ 132 unsigned long co : 1; /* Change-Recording Override */ 133 unsigned long : 2; 134 unsigned long i : 1; /* Segment-Invalid Bit */ 135 unsigned long cs : 1; /* Common-Segment Bit */ 136 unsigned long tt : 2; /* Table-Type Bits */ 137 unsigned long : 2; 138 }; 139 140 union segment_table_entry { 141 unsigned long val; 142 struct segment_entry_fc0 fc0; 143 struct segment_entry_fc1 fc1; 144 struct { 145 unsigned long : 53; 146 unsigned long fc : 1; /* Format-Control */ 147 unsigned long : 4; 148 unsigned long i : 1; /* Segment-Invalid Bit */ 149 unsigned long cs : 1; /* Common-Segment Bit */ 150 unsigned long tt : 2; /* Table-Type Bits */ 151 unsigned long : 2; 152 }; 153 }; 154 155 enum { 156 TABLE_TYPE_SEGMENT = 0, 157 TABLE_TYPE_REGION3 = 1, 158 TABLE_TYPE_REGION2 = 2, 159 TABLE_TYPE_REGION1 = 3 160 }; 161 162 union page_table_entry { 163 unsigned long val; 164 struct { 165 unsigned long pfra : 52; /* Page-Frame Real Address */ 166 unsigned long z : 1; /* Zero Bit */ 167 unsigned long i : 1; /* Page-Invalid Bit */ 168 unsigned long p : 1; /* DAT-Protection Bit */ 169 unsigned long co : 1; /* Change-Recording Override */ 170 unsigned long : 8; 171 }; 172 }; 173 174 /* 175 * vaddress union in order to easily decode a virtual address into its 176 * region first index, region second index etc. parts. 177 */ 178 union vaddress { 179 unsigned long addr; 180 struct { 181 unsigned long rfx : 11; 182 unsigned long rsx : 11; 183 unsigned long rtx : 11; 184 unsigned long sx : 11; 185 unsigned long px : 8; 186 unsigned long bx : 12; 187 }; 188 struct { 189 unsigned long rfx01 : 2; 190 unsigned long : 9; 191 unsigned long rsx01 : 2; 192 unsigned long : 9; 193 unsigned long rtx01 : 2; 194 unsigned long : 9; 195 unsigned long sx01 : 2; 196 unsigned long : 29; 197 }; 198 }; 199 200 /* 201 * raddress union which will contain the result (real or absolute address) 202 * after a page table walk. The rfaa, sfaa and pfra members are used to 203 * simply assign them the value of a region, segment or page table entry. 204 */ 205 union raddress { 206 unsigned long addr; 207 unsigned long rfaa : 33; /* Region-Frame Absolute Address */ 208 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */ 209 unsigned long pfra : 52; /* Page-Frame Real Address */ 210 }; 211 212 union alet { 213 u32 val; 214 struct { 215 u32 reserved : 7; 216 u32 p : 1; 217 u32 alesn : 8; 218 u32 alen : 16; 219 }; 220 }; 221 222 union ald { 223 u32 val; 224 struct { 225 u32 : 1; 226 u32 alo : 24; 227 u32 all : 7; 228 }; 229 }; 230 231 struct ale { 232 unsigned long i : 1; /* ALEN-Invalid Bit */ 233 unsigned long : 5; 234 unsigned long fo : 1; /* Fetch-Only Bit */ 235 unsigned long p : 1; /* Private Bit */ 236 unsigned long alesn : 8; /* Access-List-Entry Sequence Number */ 237 unsigned long aleax : 16; /* Access-List-Entry Authorization Index */ 238 unsigned long : 32; 239 unsigned long : 1; 240 unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */ 241 unsigned long : 6; 242 unsigned long astesn : 32; /* ASTE Sequence Number */ 243 } __packed; 244 245 struct aste { 246 unsigned long i : 1; /* ASX-Invalid Bit */ 247 unsigned long ato : 29; /* Authority-Table Origin */ 248 unsigned long : 1; 249 unsigned long b : 1; /* Base-Space Bit */ 250 unsigned long ax : 16; /* Authorization Index */ 251 unsigned long atl : 12; /* Authority-Table Length */ 252 unsigned long : 2; 253 unsigned long ca : 1; /* Controlled-ASN Bit */ 254 unsigned long ra : 1; /* Reusable-ASN Bit */ 255 unsigned long asce : 64; /* Address-Space-Control Element */ 256 unsigned long ald : 32; 257 unsigned long astesn : 32; 258 /* .. more fields there */ 259 } __packed; 260 261 int ipte_lock_held(struct kvm_vcpu *vcpu) 262 { 263 if (vcpu->arch.sie_block->eca & 1) { 264 int rc; 265 266 read_lock(&vcpu->kvm->arch.sca_lock); 267 rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0; 268 read_unlock(&vcpu->kvm->arch.sca_lock); 269 return rc; 270 } 271 return vcpu->kvm->arch.ipte_lock_count != 0; 272 } 273 274 static void ipte_lock_simple(struct kvm_vcpu *vcpu) 275 { 276 union ipte_control old, new, *ic; 277 278 mutex_lock(&vcpu->kvm->arch.ipte_mutex); 279 vcpu->kvm->arch.ipte_lock_count++; 280 if (vcpu->kvm->arch.ipte_lock_count > 1) 281 goto out; 282 retry: 283 read_lock(&vcpu->kvm->arch.sca_lock); 284 ic = kvm_s390_get_ipte_control(vcpu->kvm); 285 do { 286 old = READ_ONCE(*ic); 287 if (old.k) { 288 read_unlock(&vcpu->kvm->arch.sca_lock); 289 cond_resched(); 290 goto retry; 291 } 292 new = old; 293 new.k = 1; 294 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 295 read_unlock(&vcpu->kvm->arch.sca_lock); 296 out: 297 mutex_unlock(&vcpu->kvm->arch.ipte_mutex); 298 } 299 300 static void ipte_unlock_simple(struct kvm_vcpu *vcpu) 301 { 302 union ipte_control old, new, *ic; 303 304 mutex_lock(&vcpu->kvm->arch.ipte_mutex); 305 vcpu->kvm->arch.ipte_lock_count--; 306 if (vcpu->kvm->arch.ipte_lock_count) 307 goto out; 308 read_lock(&vcpu->kvm->arch.sca_lock); 309 ic = kvm_s390_get_ipte_control(vcpu->kvm); 310 do { 311 old = READ_ONCE(*ic); 312 new = old; 313 new.k = 0; 314 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 315 read_unlock(&vcpu->kvm->arch.sca_lock); 316 wake_up(&vcpu->kvm->arch.ipte_wq); 317 out: 318 mutex_unlock(&vcpu->kvm->arch.ipte_mutex); 319 } 320 321 static void ipte_lock_siif(struct kvm_vcpu *vcpu) 322 { 323 union ipte_control old, new, *ic; 324 325 retry: 326 read_lock(&vcpu->kvm->arch.sca_lock); 327 ic = kvm_s390_get_ipte_control(vcpu->kvm); 328 do { 329 old = READ_ONCE(*ic); 330 if (old.kg) { 331 read_unlock(&vcpu->kvm->arch.sca_lock); 332 cond_resched(); 333 goto retry; 334 } 335 new = old; 336 new.k = 1; 337 new.kh++; 338 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 339 read_unlock(&vcpu->kvm->arch.sca_lock); 340 } 341 342 static void ipte_unlock_siif(struct kvm_vcpu *vcpu) 343 { 344 union ipte_control old, new, *ic; 345 346 read_lock(&vcpu->kvm->arch.sca_lock); 347 ic = kvm_s390_get_ipte_control(vcpu->kvm); 348 do { 349 old = READ_ONCE(*ic); 350 new = old; 351 new.kh--; 352 if (!new.kh) 353 new.k = 0; 354 } while (cmpxchg(&ic->val, old.val, new.val) != old.val); 355 read_unlock(&vcpu->kvm->arch.sca_lock); 356 if (!new.kh) 357 wake_up(&vcpu->kvm->arch.ipte_wq); 358 } 359 360 void ipte_lock(struct kvm_vcpu *vcpu) 361 { 362 if (vcpu->arch.sie_block->eca & 1) 363 ipte_lock_siif(vcpu); 364 else 365 ipte_lock_simple(vcpu); 366 } 367 368 void ipte_unlock(struct kvm_vcpu *vcpu) 369 { 370 if (vcpu->arch.sie_block->eca & 1) 371 ipte_unlock_siif(vcpu); 372 else 373 ipte_unlock_simple(vcpu); 374 } 375 376 static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, u8 ar, 377 enum gacc_mode mode) 378 { 379 union alet alet; 380 struct ale ale; 381 struct aste aste; 382 unsigned long ald_addr, authority_table_addr; 383 union ald ald; 384 int eax, rc; 385 u8 authority_table; 386 387 if (ar >= NUM_ACRS) 388 return -EINVAL; 389 390 save_access_regs(vcpu->run->s.regs.acrs); 391 alet.val = vcpu->run->s.regs.acrs[ar]; 392 393 if (ar == 0 || alet.val == 0) { 394 asce->val = vcpu->arch.sie_block->gcr[1]; 395 return 0; 396 } else if (alet.val == 1) { 397 asce->val = vcpu->arch.sie_block->gcr[7]; 398 return 0; 399 } 400 401 if (alet.reserved) 402 return PGM_ALET_SPECIFICATION; 403 404 if (alet.p) 405 ald_addr = vcpu->arch.sie_block->gcr[5]; 406 else 407 ald_addr = vcpu->arch.sie_block->gcr[2]; 408 ald_addr &= 0x7fffffc0; 409 410 rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald)); 411 if (rc) 412 return rc; 413 414 if (alet.alen / 8 > ald.all) 415 return PGM_ALEN_TRANSLATION; 416 417 if (0x7fffffff - ald.alo * 128 < alet.alen * 16) 418 return PGM_ADDRESSING; 419 420 rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale, 421 sizeof(struct ale)); 422 if (rc) 423 return rc; 424 425 if (ale.i == 1) 426 return PGM_ALEN_TRANSLATION; 427 if (ale.alesn != alet.alesn) 428 return PGM_ALE_SEQUENCE; 429 430 rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste)); 431 if (rc) 432 return rc; 433 434 if (aste.i) 435 return PGM_ASTE_VALIDITY; 436 if (aste.astesn != ale.astesn) 437 return PGM_ASTE_SEQUENCE; 438 439 if (ale.p == 1) { 440 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; 441 if (ale.aleax != eax) { 442 if (eax / 16 > aste.atl) 443 return PGM_EXTENDED_AUTHORITY; 444 445 authority_table_addr = aste.ato * 4 + eax / 4; 446 447 rc = read_guest_real(vcpu, authority_table_addr, 448 &authority_table, 449 sizeof(u8)); 450 if (rc) 451 return rc; 452 453 if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0) 454 return PGM_EXTENDED_AUTHORITY; 455 } 456 } 457 458 if (ale.fo == 1 && mode == GACC_STORE) 459 return PGM_PROTECTION; 460 461 asce->val = aste.asce; 462 return 0; 463 } 464 465 struct trans_exc_code_bits { 466 unsigned long addr : 52; /* Translation-exception Address */ 467 unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */ 468 unsigned long : 2; 469 unsigned long b56 : 1; 470 unsigned long : 3; 471 unsigned long b60 : 1; 472 unsigned long b61 : 1; 473 unsigned long as : 2; /* ASCE Identifier */ 474 }; 475 476 enum { 477 FSI_UNKNOWN = 0, /* Unknown wether fetch or store */ 478 FSI_STORE = 1, /* Exception was due to store operation */ 479 FSI_FETCH = 2 /* Exception was due to fetch operation */ 480 }; 481 482 enum prot_type { 483 PROT_TYPE_LA = 0, 484 PROT_TYPE_KEYC = 1, 485 PROT_TYPE_ALC = 2, 486 PROT_TYPE_DAT = 3, 487 }; 488 489 static int trans_exc(struct kvm_vcpu *vcpu, int code, unsigned long gva, 490 u8 ar, enum gacc_mode mode, enum prot_type prot) 491 { 492 struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm; 493 struct trans_exc_code_bits *tec; 494 495 memset(pgm, 0, sizeof(*pgm)); 496 pgm->code = code; 497 tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code; 498 499 switch (code) { 500 case PGM_PROTECTION: 501 switch (prot) { 502 case PROT_TYPE_LA: 503 tec->b56 = 1; 504 break; 505 case PROT_TYPE_KEYC: 506 tec->b60 = 1; 507 break; 508 case PROT_TYPE_ALC: 509 tec->b60 = 1; 510 /* FALL THROUGH */ 511 case PROT_TYPE_DAT: 512 tec->b61 = 1; 513 break; 514 } 515 /* FALL THROUGH */ 516 case PGM_ASCE_TYPE: 517 case PGM_PAGE_TRANSLATION: 518 case PGM_REGION_FIRST_TRANS: 519 case PGM_REGION_SECOND_TRANS: 520 case PGM_REGION_THIRD_TRANS: 521 case PGM_SEGMENT_TRANSLATION: 522 /* 523 * op_access_id only applies to MOVE_PAGE -> set bit 61 524 * exc_access_id has to be set to 0 for some instructions. Both 525 * cases have to be handled by the caller. 526 */ 527 tec->addr = gva >> PAGE_SHIFT; 528 tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH; 529 tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as; 530 /* FALL THROUGH */ 531 case PGM_ALEN_TRANSLATION: 532 case PGM_ALE_SEQUENCE: 533 case PGM_ASTE_VALIDITY: 534 case PGM_ASTE_SEQUENCE: 535 case PGM_EXTENDED_AUTHORITY: 536 /* 537 * We can always store exc_access_id, as it is 538 * undefined for non-ar cases. It is undefined for 539 * most DAT protection exceptions. 540 */ 541 pgm->exc_access_id = ar; 542 break; 543 } 544 return code; 545 } 546 547 static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce, 548 unsigned long ga, u8 ar, enum gacc_mode mode) 549 { 550 int rc; 551 struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw); 552 553 if (!psw.t) { 554 asce->val = 0; 555 asce->r = 1; 556 return 0; 557 } 558 559 if (mode == GACC_IFETCH) 560 psw.as = psw.as == PSW_AS_HOME ? PSW_AS_HOME : PSW_AS_PRIMARY; 561 562 switch (psw.as) { 563 case PSW_AS_PRIMARY: 564 asce->val = vcpu->arch.sie_block->gcr[1]; 565 return 0; 566 case PSW_AS_SECONDARY: 567 asce->val = vcpu->arch.sie_block->gcr[7]; 568 return 0; 569 case PSW_AS_HOME: 570 asce->val = vcpu->arch.sie_block->gcr[13]; 571 return 0; 572 case PSW_AS_ACCREG: 573 rc = ar_translation(vcpu, asce, ar, mode); 574 if (rc > 0) 575 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_ALC); 576 return rc; 577 } 578 return 0; 579 } 580 581 static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val) 582 { 583 return kvm_read_guest(kvm, gpa, val, sizeof(*val)); 584 } 585 586 /** 587 * guest_translate - translate a guest virtual into a guest absolute address 588 * @vcpu: virtual cpu 589 * @gva: guest virtual address 590 * @gpa: points to where guest physical (absolute) address should be stored 591 * @asce: effective asce 592 * @mode: indicates the access mode to be used 593 * 594 * Translate a guest virtual address into a guest absolute address by means 595 * of dynamic address translation as specified by the architecture. 596 * If the resulting absolute address is not available in the configuration 597 * an addressing exception is indicated and @gpa will not be changed. 598 * 599 * Returns: - zero on success; @gpa contains the resulting absolute address 600 * - a negative value if guest access failed due to e.g. broken 601 * guest mapping 602 * - a positve value if an access exception happened. In this case 603 * the returned value is the program interruption code as defined 604 * by the architecture 605 */ 606 static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva, 607 unsigned long *gpa, const union asce asce, 608 enum gacc_mode mode) 609 { 610 union vaddress vaddr = {.addr = gva}; 611 union raddress raddr = {.addr = gva}; 612 union page_table_entry pte; 613 int dat_protection = 0; 614 union ctlreg0 ctlreg0; 615 unsigned long ptr; 616 int edat1, edat2; 617 618 ctlreg0.val = vcpu->arch.sie_block->gcr[0]; 619 edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8); 620 edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78); 621 if (asce.r) 622 goto real_address; 623 ptr = asce.origin * 4096; 624 switch (asce.dt) { 625 case ASCE_TYPE_REGION1: 626 if (vaddr.rfx01 > asce.tl) 627 return PGM_REGION_FIRST_TRANS; 628 ptr += vaddr.rfx * 8; 629 break; 630 case ASCE_TYPE_REGION2: 631 if (vaddr.rfx) 632 return PGM_ASCE_TYPE; 633 if (vaddr.rsx01 > asce.tl) 634 return PGM_REGION_SECOND_TRANS; 635 ptr += vaddr.rsx * 8; 636 break; 637 case ASCE_TYPE_REGION3: 638 if (vaddr.rfx || vaddr.rsx) 639 return PGM_ASCE_TYPE; 640 if (vaddr.rtx01 > asce.tl) 641 return PGM_REGION_THIRD_TRANS; 642 ptr += vaddr.rtx * 8; 643 break; 644 case ASCE_TYPE_SEGMENT: 645 if (vaddr.rfx || vaddr.rsx || vaddr.rtx) 646 return PGM_ASCE_TYPE; 647 if (vaddr.sx01 > asce.tl) 648 return PGM_SEGMENT_TRANSLATION; 649 ptr += vaddr.sx * 8; 650 break; 651 } 652 switch (asce.dt) { 653 case ASCE_TYPE_REGION1: { 654 union region1_table_entry rfte; 655 656 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 657 return PGM_ADDRESSING; 658 if (deref_table(vcpu->kvm, ptr, &rfte.val)) 659 return -EFAULT; 660 if (rfte.i) 661 return PGM_REGION_FIRST_TRANS; 662 if (rfte.tt != TABLE_TYPE_REGION1) 663 return PGM_TRANSLATION_SPEC; 664 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) 665 return PGM_REGION_SECOND_TRANS; 666 if (edat1) 667 dat_protection |= rfte.p; 668 ptr = rfte.rto * 4096 + vaddr.rsx * 8; 669 } 670 /* fallthrough */ 671 case ASCE_TYPE_REGION2: { 672 union region2_table_entry rste; 673 674 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 675 return PGM_ADDRESSING; 676 if (deref_table(vcpu->kvm, ptr, &rste.val)) 677 return -EFAULT; 678 if (rste.i) 679 return PGM_REGION_SECOND_TRANS; 680 if (rste.tt != TABLE_TYPE_REGION2) 681 return PGM_TRANSLATION_SPEC; 682 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) 683 return PGM_REGION_THIRD_TRANS; 684 if (edat1) 685 dat_protection |= rste.p; 686 ptr = rste.rto * 4096 + vaddr.rtx * 8; 687 } 688 /* fallthrough */ 689 case ASCE_TYPE_REGION3: { 690 union region3_table_entry rtte; 691 692 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 693 return PGM_ADDRESSING; 694 if (deref_table(vcpu->kvm, ptr, &rtte.val)) 695 return -EFAULT; 696 if (rtte.i) 697 return PGM_REGION_THIRD_TRANS; 698 if (rtte.tt != TABLE_TYPE_REGION3) 699 return PGM_TRANSLATION_SPEC; 700 if (rtte.cr && asce.p && edat2) 701 return PGM_TRANSLATION_SPEC; 702 if (rtte.fc && edat2) { 703 dat_protection |= rtte.fc1.p; 704 raddr.rfaa = rtte.fc1.rfaa; 705 goto absolute_address; 706 } 707 if (vaddr.sx01 < rtte.fc0.tf) 708 return PGM_SEGMENT_TRANSLATION; 709 if (vaddr.sx01 > rtte.fc0.tl) 710 return PGM_SEGMENT_TRANSLATION; 711 if (edat1) 712 dat_protection |= rtte.fc0.p; 713 ptr = rtte.fc0.sto * 4096 + vaddr.sx * 8; 714 } 715 /* fallthrough */ 716 case ASCE_TYPE_SEGMENT: { 717 union segment_table_entry ste; 718 719 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 720 return PGM_ADDRESSING; 721 if (deref_table(vcpu->kvm, ptr, &ste.val)) 722 return -EFAULT; 723 if (ste.i) 724 return PGM_SEGMENT_TRANSLATION; 725 if (ste.tt != TABLE_TYPE_SEGMENT) 726 return PGM_TRANSLATION_SPEC; 727 if (ste.cs && asce.p) 728 return PGM_TRANSLATION_SPEC; 729 if (ste.fc && edat1) { 730 dat_protection |= ste.fc1.p; 731 raddr.sfaa = ste.fc1.sfaa; 732 goto absolute_address; 733 } 734 dat_protection |= ste.fc0.p; 735 ptr = ste.fc0.pto * 2048 + vaddr.px * 8; 736 } 737 } 738 if (kvm_is_error_gpa(vcpu->kvm, ptr)) 739 return PGM_ADDRESSING; 740 if (deref_table(vcpu->kvm, ptr, &pte.val)) 741 return -EFAULT; 742 if (pte.i) 743 return PGM_PAGE_TRANSLATION; 744 if (pte.z) 745 return PGM_TRANSLATION_SPEC; 746 if (pte.co && !edat1) 747 return PGM_TRANSLATION_SPEC; 748 dat_protection |= pte.p; 749 raddr.pfra = pte.pfra; 750 real_address: 751 raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr); 752 absolute_address: 753 if (mode == GACC_STORE && dat_protection) 754 return PGM_PROTECTION; 755 if (kvm_is_error_gpa(vcpu->kvm, raddr.addr)) 756 return PGM_ADDRESSING; 757 *gpa = raddr.addr; 758 return 0; 759 } 760 761 static inline int is_low_address(unsigned long ga) 762 { 763 /* Check for address ranges 0..511 and 4096..4607 */ 764 return (ga & ~0x11fful) == 0; 765 } 766 767 static int low_address_protection_enabled(struct kvm_vcpu *vcpu, 768 const union asce asce) 769 { 770 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; 771 psw_t *psw = &vcpu->arch.sie_block->gpsw; 772 773 if (!ctlreg0.lap) 774 return 0; 775 if (psw_bits(*psw).t && asce.p) 776 return 0; 777 return 1; 778 } 779 780 static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar, 781 unsigned long *pages, unsigned long nr_pages, 782 const union asce asce, enum gacc_mode mode) 783 { 784 psw_t *psw = &vcpu->arch.sie_block->gpsw; 785 int lap_enabled, rc = 0; 786 787 lap_enabled = low_address_protection_enabled(vcpu, asce); 788 while (nr_pages) { 789 ga = kvm_s390_logical_to_effective(vcpu, ga); 790 if (mode == GACC_STORE && lap_enabled && is_low_address(ga)) 791 return trans_exc(vcpu, PGM_PROTECTION, ga, ar, mode, 792 PROT_TYPE_LA); 793 ga &= PAGE_MASK; 794 if (psw_bits(*psw).t) { 795 rc = guest_translate(vcpu, ga, pages, asce, mode); 796 if (rc < 0) 797 return rc; 798 } else { 799 *pages = kvm_s390_real_to_abs(vcpu, ga); 800 if (kvm_is_error_gpa(vcpu->kvm, *pages)) 801 rc = PGM_ADDRESSING; 802 } 803 if (rc) 804 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_DAT); 805 ga += PAGE_SIZE; 806 pages++; 807 nr_pages--; 808 } 809 return 0; 810 } 811 812 int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar, void *data, 813 unsigned long len, enum gacc_mode mode) 814 { 815 psw_t *psw = &vcpu->arch.sie_block->gpsw; 816 unsigned long _len, nr_pages, gpa, idx; 817 unsigned long pages_array[2]; 818 unsigned long *pages; 819 int need_ipte_lock; 820 union asce asce; 821 int rc; 822 823 if (!len) 824 return 0; 825 ga = kvm_s390_logical_to_effective(vcpu, ga); 826 rc = get_vcpu_asce(vcpu, &asce, ga, ar, mode); 827 if (rc) 828 return rc; 829 nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1; 830 pages = pages_array; 831 if (nr_pages > ARRAY_SIZE(pages_array)) 832 pages = vmalloc(nr_pages * sizeof(unsigned long)); 833 if (!pages) 834 return -ENOMEM; 835 need_ipte_lock = psw_bits(*psw).t && !asce.r; 836 if (need_ipte_lock) 837 ipte_lock(vcpu); 838 rc = guest_page_range(vcpu, ga, ar, pages, nr_pages, asce, mode); 839 for (idx = 0; idx < nr_pages && !rc; idx++) { 840 gpa = *(pages + idx) + (ga & ~PAGE_MASK); 841 _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); 842 if (mode == GACC_STORE) 843 rc = kvm_write_guest(vcpu->kvm, gpa, data, _len); 844 else 845 rc = kvm_read_guest(vcpu->kvm, gpa, data, _len); 846 len -= _len; 847 ga += _len; 848 data += _len; 849 } 850 if (need_ipte_lock) 851 ipte_unlock(vcpu); 852 if (nr_pages > ARRAY_SIZE(pages_array)) 853 vfree(pages); 854 return rc; 855 } 856 857 int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra, 858 void *data, unsigned long len, enum gacc_mode mode) 859 { 860 unsigned long _len, gpa; 861 int rc = 0; 862 863 while (len && !rc) { 864 gpa = kvm_s390_real_to_abs(vcpu, gra); 865 _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len); 866 if (mode) 867 rc = write_guest_abs(vcpu, gpa, data, _len); 868 else 869 rc = read_guest_abs(vcpu, gpa, data, _len); 870 len -= _len; 871 gra += _len; 872 data += _len; 873 } 874 return rc; 875 } 876 877 /** 878 * guest_translate_address - translate guest logical into guest absolute address 879 * 880 * Parameter semantics are the same as the ones from guest_translate. 881 * The memory contents at the guest address are not changed. 882 * 883 * Note: The IPTE lock is not taken during this function, so the caller 884 * has to take care of this. 885 */ 886 int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar, 887 unsigned long *gpa, enum gacc_mode mode) 888 { 889 psw_t *psw = &vcpu->arch.sie_block->gpsw; 890 union asce asce; 891 int rc; 892 893 gva = kvm_s390_logical_to_effective(vcpu, gva); 894 rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode); 895 if (rc) 896 return rc; 897 if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) { 898 if (mode == GACC_STORE) 899 return trans_exc(vcpu, PGM_PROTECTION, gva, 0, 900 mode, PROT_TYPE_LA); 901 } 902 903 if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */ 904 rc = guest_translate(vcpu, gva, gpa, asce, mode); 905 if (rc > 0) 906 return trans_exc(vcpu, rc, gva, 0, mode, PROT_TYPE_DAT); 907 } else { 908 *gpa = kvm_s390_real_to_abs(vcpu, gva); 909 if (kvm_is_error_gpa(vcpu->kvm, *gpa)) 910 return trans_exc(vcpu, rc, gva, PGM_ADDRESSING, mode, 0); 911 } 912 913 return rc; 914 } 915 916 /** 917 * check_gva_range - test a range of guest virtual addresses for accessibility 918 */ 919 int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, u8 ar, 920 unsigned long length, enum gacc_mode mode) 921 { 922 unsigned long gpa; 923 unsigned long currlen; 924 int rc = 0; 925 926 ipte_lock(vcpu); 927 while (length > 0 && !rc) { 928 currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE)); 929 rc = guest_translate_address(vcpu, gva, ar, &gpa, mode); 930 gva += currlen; 931 length -= currlen; 932 } 933 ipte_unlock(vcpu); 934 935 return rc; 936 } 937 938 /** 939 * kvm_s390_check_low_addr_prot_real - check for low-address protection 940 * @gra: Guest real address 941 * 942 * Checks whether an address is subject to low-address protection and set 943 * up vcpu->arch.pgm accordingly if necessary. 944 * 945 * Return: 0 if no protection exception, or PGM_PROTECTION if protected. 946 */ 947 int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra) 948 { 949 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; 950 951 if (!ctlreg0.lap || !is_low_address(gra)) 952 return 0; 953 return trans_exc(vcpu, PGM_PROTECTION, gra, 0, GACC_STORE, PROT_TYPE_LA); 954 } 955 956 /** 957 * kvm_s390_shadow_tables - walk the guest page table and create shadow tables 958 * @sg: pointer to the shadow guest address space structure 959 * @saddr: faulting address in the shadow gmap 960 * @pgt: pointer to the page table address result 961 * @fake: pgt references contiguous guest memory block, not a pgtable 962 */ 963 static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr, 964 unsigned long *pgt, int *dat_protection, 965 int *fake) 966 { 967 struct gmap *parent; 968 union asce asce; 969 union vaddress vaddr; 970 unsigned long ptr; 971 int rc; 972 973 *fake = 0; 974 *dat_protection = 0; 975 parent = sg->parent; 976 vaddr.addr = saddr; 977 asce.val = sg->orig_asce; 978 ptr = asce.origin * 4096; 979 if (asce.r) { 980 *fake = 1; 981 asce.dt = ASCE_TYPE_REGION1; 982 } 983 switch (asce.dt) { 984 case ASCE_TYPE_REGION1: 985 if (vaddr.rfx01 > asce.tl && !asce.r) 986 return PGM_REGION_FIRST_TRANS; 987 break; 988 case ASCE_TYPE_REGION2: 989 if (vaddr.rfx) 990 return PGM_ASCE_TYPE; 991 if (vaddr.rsx01 > asce.tl) 992 return PGM_REGION_SECOND_TRANS; 993 break; 994 case ASCE_TYPE_REGION3: 995 if (vaddr.rfx || vaddr.rsx) 996 return PGM_ASCE_TYPE; 997 if (vaddr.rtx01 > asce.tl) 998 return PGM_REGION_THIRD_TRANS; 999 break; 1000 case ASCE_TYPE_SEGMENT: 1001 if (vaddr.rfx || vaddr.rsx || vaddr.rtx) 1002 return PGM_ASCE_TYPE; 1003 if (vaddr.sx01 > asce.tl) 1004 return PGM_SEGMENT_TRANSLATION; 1005 break; 1006 } 1007 1008 switch (asce.dt) { 1009 case ASCE_TYPE_REGION1: { 1010 union region1_table_entry rfte; 1011 1012 if (*fake) { 1013 /* offset in 16EB guest memory block */ 1014 ptr = ptr + ((unsigned long) vaddr.rsx << 53UL); 1015 rfte.val = ptr; 1016 goto shadow_r2t; 1017 } 1018 rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val); 1019 if (rc) 1020 return rc; 1021 if (rfte.i) 1022 return PGM_REGION_FIRST_TRANS; 1023 if (rfte.tt != TABLE_TYPE_REGION1) 1024 return PGM_TRANSLATION_SPEC; 1025 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl) 1026 return PGM_REGION_SECOND_TRANS; 1027 if (sg->edat_level >= 1) 1028 *dat_protection |= rfte.p; 1029 ptr = rfte.rto << 12UL; 1030 shadow_r2t: 1031 rc = gmap_shadow_r2t(sg, saddr, rfte.val, *fake); 1032 if (rc) 1033 return rc; 1034 /* fallthrough */ 1035 } 1036 case ASCE_TYPE_REGION2: { 1037 union region2_table_entry rste; 1038 1039 if (*fake) { 1040 /* offset in 8PB guest memory block */ 1041 ptr = ptr + ((unsigned long) vaddr.rtx << 42UL); 1042 rste.val = ptr; 1043 goto shadow_r3t; 1044 } 1045 rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val); 1046 if (rc) 1047 return rc; 1048 if (rste.i) 1049 return PGM_REGION_SECOND_TRANS; 1050 if (rste.tt != TABLE_TYPE_REGION2) 1051 return PGM_TRANSLATION_SPEC; 1052 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl) 1053 return PGM_REGION_THIRD_TRANS; 1054 if (sg->edat_level >= 1) 1055 *dat_protection |= rste.p; 1056 ptr = rste.rto << 12UL; 1057 shadow_r3t: 1058 rste.p |= *dat_protection; 1059 rc = gmap_shadow_r3t(sg, saddr, rste.val, *fake); 1060 if (rc) 1061 return rc; 1062 /* fallthrough */ 1063 } 1064 case ASCE_TYPE_REGION3: { 1065 union region3_table_entry rtte; 1066 1067 if (*fake) { 1068 /* offset in 4TB guest memory block */ 1069 ptr = ptr + ((unsigned long) vaddr.sx << 31UL); 1070 rtte.val = ptr; 1071 goto shadow_sgt; 1072 } 1073 rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val); 1074 if (rc) 1075 return rc; 1076 if (rtte.i) 1077 return PGM_REGION_THIRD_TRANS; 1078 if (rtte.tt != TABLE_TYPE_REGION3) 1079 return PGM_TRANSLATION_SPEC; 1080 if (rtte.cr && asce.p && sg->edat_level >= 2) 1081 return PGM_TRANSLATION_SPEC; 1082 if (rtte.fc && sg->edat_level >= 2) { 1083 *dat_protection |= rtte.fc0.p; 1084 *fake = 1; 1085 ptr = rtte.fc1.rfaa << 31UL; 1086 rtte.val = ptr; 1087 goto shadow_sgt; 1088 } 1089 if (vaddr.sx01 < rtte.fc0.tf || vaddr.sx01 > rtte.fc0.tl) 1090 return PGM_SEGMENT_TRANSLATION; 1091 if (sg->edat_level >= 1) 1092 *dat_protection |= rtte.fc0.p; 1093 ptr = rtte.fc0.sto << 12UL; 1094 shadow_sgt: 1095 rtte.fc0.p |= *dat_protection; 1096 rc = gmap_shadow_sgt(sg, saddr, rtte.val, *fake); 1097 if (rc) 1098 return rc; 1099 /* fallthrough */ 1100 } 1101 case ASCE_TYPE_SEGMENT: { 1102 union segment_table_entry ste; 1103 1104 if (*fake) { 1105 /* offset in 2G guest memory block */ 1106 ptr = ptr + ((unsigned long) vaddr.sx << 20UL); 1107 ste.val = ptr; 1108 goto shadow_pgt; 1109 } 1110 rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val); 1111 if (rc) 1112 return rc; 1113 if (ste.i) 1114 return PGM_SEGMENT_TRANSLATION; 1115 if (ste.tt != TABLE_TYPE_SEGMENT) 1116 return PGM_TRANSLATION_SPEC; 1117 if (ste.cs && asce.p) 1118 return PGM_TRANSLATION_SPEC; 1119 *dat_protection |= ste.fc0.p; 1120 if (ste.fc && sg->edat_level >= 1) { 1121 *fake = 1; 1122 ptr = ste.fc1.sfaa << 20UL; 1123 ste.val = ptr; 1124 goto shadow_pgt; 1125 } 1126 ptr = ste.fc0.pto << 11UL; 1127 shadow_pgt: 1128 ste.fc0.p |= *dat_protection; 1129 rc = gmap_shadow_pgt(sg, saddr, ste.val, *fake); 1130 if (rc) 1131 return rc; 1132 } 1133 } 1134 /* Return the parent address of the page table */ 1135 *pgt = ptr; 1136 return 0; 1137 } 1138 1139 /** 1140 * kvm_s390_shadow_fault - handle fault on a shadow page table 1141 * @vcpu: virtual cpu 1142 * @sg: pointer to the shadow guest address space structure 1143 * @saddr: faulting address in the shadow gmap 1144 * 1145 * Returns: - 0 if the shadow fault was successfully resolved 1146 * - > 0 (pgm exception code) on exceptions while faulting 1147 * - -EAGAIN if the caller can retry immediately 1148 * - -EFAULT when accessing invalid guest addresses 1149 * - -ENOMEM if out of memory 1150 */ 1151 int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg, 1152 unsigned long saddr) 1153 { 1154 union vaddress vaddr; 1155 union page_table_entry pte; 1156 unsigned long pgt; 1157 int dat_protection, fake; 1158 int rc; 1159 1160 down_read(&sg->mm->mmap_sem); 1161 /* 1162 * We don't want any guest-2 tables to change - so the parent 1163 * tables/pointers we read stay valid - unshadowing is however 1164 * always possible - only guest_table_lock protects us. 1165 */ 1166 ipte_lock(vcpu); 1167 1168 rc = gmap_shadow_pgt_lookup(sg, saddr, &pgt, &dat_protection, &fake); 1169 if (rc) 1170 rc = kvm_s390_shadow_tables(sg, saddr, &pgt, &dat_protection, 1171 &fake); 1172 1173 vaddr.addr = saddr; 1174 if (fake) { 1175 /* offset in 1MB guest memory block */ 1176 pte.val = pgt + ((unsigned long) vaddr.px << 12UL); 1177 goto shadow_page; 1178 } 1179 if (!rc) 1180 rc = gmap_read_table(sg->parent, pgt + vaddr.px * 8, &pte.val); 1181 if (!rc && pte.i) 1182 rc = PGM_PAGE_TRANSLATION; 1183 if (!rc && (pte.z || (pte.co && sg->edat_level < 1))) 1184 rc = PGM_TRANSLATION_SPEC; 1185 shadow_page: 1186 pte.p |= dat_protection; 1187 if (!rc) 1188 rc = gmap_shadow_page(sg, saddr, __pte(pte.val)); 1189 ipte_unlock(vcpu); 1190 up_read(&sg->mm->mmap_sem); 1191 return rc; 1192 } 1193