1 /* 2 * arch/s390/kernel/time.c 3 * Time of day based timer functions. 4 * 5 * S390 version 6 * Copyright IBM Corp. 1999, 2008 7 * Author(s): Hartmut Penner (hp@de.ibm.com), 8 * Martin Schwidefsky (schwidefsky@de.ibm.com), 9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 10 * 11 * Derived from "arch/i386/kernel/time.c" 12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 13 */ 14 15 #define KMSG_COMPONENT "time" 16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 17 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/sysdev.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/clocksource.h> 38 #include <linux/clockchips.h> 39 #include <asm/uaccess.h> 40 #include <asm/delay.h> 41 #include <asm/s390_ext.h> 42 #include <asm/div64.h> 43 #include <asm/vdso.h> 44 #include <asm/irq.h> 45 #include <asm/irq_regs.h> 46 #include <asm/timer.h> 47 #include <asm/etr.h> 48 #include <asm/cio.h> 49 50 /* change this if you have some constant time drift */ 51 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 52 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 53 54 /* 55 * Create a small time difference between the timer interrupts 56 * on the different cpus to avoid lock contention. 57 */ 58 #define CPU_DEVIATION (smp_processor_id() << 12) 59 60 #define TICK_SIZE tick 61 62 u64 sched_clock_base_cc = -1; /* Force to data section. */ 63 EXPORT_SYMBOL_GPL(sched_clock_base_cc); 64 65 static DEFINE_PER_CPU(struct clock_event_device, comparators); 66 67 /* 68 * Scheduler clock - returns current time in nanosec units. 69 */ 70 unsigned long long notrace sched_clock(void) 71 { 72 return (get_clock_monotonic() * 125) >> 9; 73 } 74 75 /* 76 * Monotonic_clock - returns # of nanoseconds passed since time_init() 77 */ 78 unsigned long long monotonic_clock(void) 79 { 80 return sched_clock(); 81 } 82 EXPORT_SYMBOL(monotonic_clock); 83 84 void tod_to_timeval(__u64 todval, struct timespec *xtime) 85 { 86 unsigned long long sec; 87 88 sec = todval >> 12; 89 do_div(sec, 1000000); 90 xtime->tv_sec = sec; 91 todval -= (sec * 1000000) << 12; 92 xtime->tv_nsec = ((todval * 1000) >> 12); 93 } 94 EXPORT_SYMBOL(tod_to_timeval); 95 96 void clock_comparator_work(void) 97 { 98 struct clock_event_device *cd; 99 100 S390_lowcore.clock_comparator = -1ULL; 101 set_clock_comparator(S390_lowcore.clock_comparator); 102 cd = &__get_cpu_var(comparators); 103 cd->event_handler(cd); 104 } 105 106 /* 107 * Fixup the clock comparator. 108 */ 109 static void fixup_clock_comparator(unsigned long long delta) 110 { 111 /* If nobody is waiting there's nothing to fix. */ 112 if (S390_lowcore.clock_comparator == -1ULL) 113 return; 114 S390_lowcore.clock_comparator += delta; 115 set_clock_comparator(S390_lowcore.clock_comparator); 116 } 117 118 static int s390_next_event(unsigned long delta, 119 struct clock_event_device *evt) 120 { 121 S390_lowcore.clock_comparator = get_clock() + delta; 122 set_clock_comparator(S390_lowcore.clock_comparator); 123 return 0; 124 } 125 126 static void s390_set_mode(enum clock_event_mode mode, 127 struct clock_event_device *evt) 128 { 129 } 130 131 /* 132 * Set up lowcore and control register of the current cpu to 133 * enable TOD clock and clock comparator interrupts. 134 */ 135 void init_cpu_timer(void) 136 { 137 struct clock_event_device *cd; 138 int cpu; 139 140 S390_lowcore.clock_comparator = -1ULL; 141 set_clock_comparator(S390_lowcore.clock_comparator); 142 143 cpu = smp_processor_id(); 144 cd = &per_cpu(comparators, cpu); 145 cd->name = "comparator"; 146 cd->features = CLOCK_EVT_FEAT_ONESHOT; 147 cd->mult = 16777; 148 cd->shift = 12; 149 cd->min_delta_ns = 1; 150 cd->max_delta_ns = LONG_MAX; 151 cd->rating = 400; 152 cd->cpumask = cpumask_of(cpu); 153 cd->set_next_event = s390_next_event; 154 cd->set_mode = s390_set_mode; 155 156 clockevents_register_device(cd); 157 158 /* Enable clock comparator timer interrupt. */ 159 __ctl_set_bit(0,11); 160 161 /* Always allow the timing alert external interrupt. */ 162 __ctl_set_bit(0, 4); 163 } 164 165 static void clock_comparator_interrupt(__u16 code) 166 { 167 if (S390_lowcore.clock_comparator == -1ULL) 168 set_clock_comparator(S390_lowcore.clock_comparator); 169 } 170 171 static void etr_timing_alert(struct etr_irq_parm *); 172 static void stp_timing_alert(struct stp_irq_parm *); 173 174 static void timing_alert_interrupt(__u16 code) 175 { 176 if (S390_lowcore.ext_params & 0x00c40000) 177 etr_timing_alert((struct etr_irq_parm *) 178 &S390_lowcore.ext_params); 179 if (S390_lowcore.ext_params & 0x00038000) 180 stp_timing_alert((struct stp_irq_parm *) 181 &S390_lowcore.ext_params); 182 } 183 184 static void etr_reset(void); 185 static void stp_reset(void); 186 187 void read_persistent_clock(struct timespec *ts) 188 { 189 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts); 190 } 191 192 void read_boot_clock(struct timespec *ts) 193 { 194 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts); 195 } 196 197 static cycle_t read_tod_clock(struct clocksource *cs) 198 { 199 return get_clock(); 200 } 201 202 static struct clocksource clocksource_tod = { 203 .name = "tod", 204 .rating = 400, 205 .read = read_tod_clock, 206 .mask = -1ULL, 207 .mult = 1000, 208 .shift = 12, 209 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 210 }; 211 212 struct clocksource * __init clocksource_default_clock(void) 213 { 214 return &clocksource_tod; 215 } 216 217 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 218 { 219 if (clock != &clocksource_tod) 220 return; 221 222 /* Make userspace gettimeofday spin until we're done. */ 223 ++vdso_data->tb_update_count; 224 smp_wmb(); 225 vdso_data->xtime_tod_stamp = clock->cycle_last; 226 vdso_data->xtime_clock_sec = xtime.tv_sec; 227 vdso_data->xtime_clock_nsec = xtime.tv_nsec; 228 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 229 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 230 smp_wmb(); 231 ++vdso_data->tb_update_count; 232 } 233 234 extern struct timezone sys_tz; 235 236 void update_vsyscall_tz(void) 237 { 238 /* Make userspace gettimeofday spin until we're done. */ 239 ++vdso_data->tb_update_count; 240 smp_wmb(); 241 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 242 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 243 smp_wmb(); 244 ++vdso_data->tb_update_count; 245 } 246 247 /* 248 * Initialize the TOD clock and the CPU timer of 249 * the boot cpu. 250 */ 251 void __init time_init(void) 252 { 253 /* Reset time synchronization interfaces. */ 254 etr_reset(); 255 stp_reset(); 256 257 /* request the clock comparator external interrupt */ 258 if (register_external_interrupt(0x1004, clock_comparator_interrupt)) 259 panic("Couldn't request external interrupt 0x1004"); 260 261 /* request the timing alert external interrupt */ 262 if (register_external_interrupt(0x1406, timing_alert_interrupt)) 263 panic("Couldn't request external interrupt 0x1406"); 264 265 if (clocksource_register(&clocksource_tod) != 0) 266 panic("Could not register TOD clock source"); 267 268 /* Enable TOD clock interrupts on the boot cpu. */ 269 init_cpu_timer(); 270 271 /* Enable cpu timer interrupts on the boot cpu. */ 272 vtime_init(); 273 } 274 275 /* 276 * The time is "clock". old is what we think the time is. 277 * Adjust the value by a multiple of jiffies and add the delta to ntp. 278 * "delay" is an approximation how long the synchronization took. If 279 * the time correction is positive, then "delay" is subtracted from 280 * the time difference and only the remaining part is passed to ntp. 281 */ 282 static unsigned long long adjust_time(unsigned long long old, 283 unsigned long long clock, 284 unsigned long long delay) 285 { 286 unsigned long long delta, ticks; 287 struct timex adjust; 288 289 if (clock > old) { 290 /* It is later than we thought. */ 291 delta = ticks = clock - old; 292 delta = ticks = (delta < delay) ? 0 : delta - delay; 293 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 294 adjust.offset = ticks * (1000000 / HZ); 295 } else { 296 /* It is earlier than we thought. */ 297 delta = ticks = old - clock; 298 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 299 delta = -delta; 300 adjust.offset = -ticks * (1000000 / HZ); 301 } 302 sched_clock_base_cc += delta; 303 if (adjust.offset != 0) { 304 pr_notice("The ETR interface has adjusted the clock " 305 "by %li microseconds\n", adjust.offset); 306 adjust.modes = ADJ_OFFSET_SINGLESHOT; 307 do_adjtimex(&adjust); 308 } 309 return delta; 310 } 311 312 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 313 static DEFINE_MUTEX(clock_sync_mutex); 314 static unsigned long clock_sync_flags; 315 316 #define CLOCK_SYNC_HAS_ETR 0 317 #define CLOCK_SYNC_HAS_STP 1 318 #define CLOCK_SYNC_ETR 2 319 #define CLOCK_SYNC_STP 3 320 321 /* 322 * The synchronous get_clock function. It will write the current clock 323 * value to the clock pointer and return 0 if the clock is in sync with 324 * the external time source. If the clock mode is local it will return 325 * -ENOSYS and -EAGAIN if the clock is not in sync with the external 326 * reference. 327 */ 328 int get_sync_clock(unsigned long long *clock) 329 { 330 atomic_t *sw_ptr; 331 unsigned int sw0, sw1; 332 333 sw_ptr = &get_cpu_var(clock_sync_word); 334 sw0 = atomic_read(sw_ptr); 335 *clock = get_clock(); 336 sw1 = atomic_read(sw_ptr); 337 put_cpu_var(clock_sync_sync); 338 if (sw0 == sw1 && (sw0 & 0x80000000U)) 339 /* Success: time is in sync. */ 340 return 0; 341 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 342 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 343 return -ENOSYS; 344 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 345 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 346 return -EACCES; 347 return -EAGAIN; 348 } 349 EXPORT_SYMBOL(get_sync_clock); 350 351 /* 352 * Make get_sync_clock return -EAGAIN. 353 */ 354 static void disable_sync_clock(void *dummy) 355 { 356 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 357 /* 358 * Clear the in-sync bit 2^31. All get_sync_clock calls will 359 * fail until the sync bit is turned back on. In addition 360 * increase the "sequence" counter to avoid the race of an 361 * etr event and the complete recovery against get_sync_clock. 362 */ 363 atomic_clear_mask(0x80000000, sw_ptr); 364 atomic_inc(sw_ptr); 365 } 366 367 /* 368 * Make get_sync_clock return 0 again. 369 * Needs to be called from a context disabled for preemption. 370 */ 371 static void enable_sync_clock(void) 372 { 373 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 374 atomic_set_mask(0x80000000, sw_ptr); 375 } 376 377 /* 378 * Function to check if the clock is in sync. 379 */ 380 static inline int check_sync_clock(void) 381 { 382 atomic_t *sw_ptr; 383 int rc; 384 385 sw_ptr = &get_cpu_var(clock_sync_word); 386 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 387 put_cpu_var(clock_sync_sync); 388 return rc; 389 } 390 391 /* Single threaded workqueue used for etr and stp sync events */ 392 static struct workqueue_struct *time_sync_wq; 393 394 static void __init time_init_wq(void) 395 { 396 if (time_sync_wq) 397 return; 398 time_sync_wq = create_singlethread_workqueue("timesync"); 399 stop_machine_create(); 400 } 401 402 /* 403 * External Time Reference (ETR) code. 404 */ 405 static int etr_port0_online; 406 static int etr_port1_online; 407 static int etr_steai_available; 408 409 static int __init early_parse_etr(char *p) 410 { 411 if (strncmp(p, "off", 3) == 0) 412 etr_port0_online = etr_port1_online = 0; 413 else if (strncmp(p, "port0", 5) == 0) 414 etr_port0_online = 1; 415 else if (strncmp(p, "port1", 5) == 0) 416 etr_port1_online = 1; 417 else if (strncmp(p, "on", 2) == 0) 418 etr_port0_online = etr_port1_online = 1; 419 return 0; 420 } 421 early_param("etr", early_parse_etr); 422 423 enum etr_event { 424 ETR_EVENT_PORT0_CHANGE, 425 ETR_EVENT_PORT1_CHANGE, 426 ETR_EVENT_PORT_ALERT, 427 ETR_EVENT_SYNC_CHECK, 428 ETR_EVENT_SWITCH_LOCAL, 429 ETR_EVENT_UPDATE, 430 }; 431 432 /* 433 * Valid bit combinations of the eacr register are (x = don't care): 434 * e0 e1 dp p0 p1 ea es sl 435 * 0 0 x 0 0 0 0 0 initial, disabled state 436 * 0 0 x 0 1 1 0 0 port 1 online 437 * 0 0 x 1 0 1 0 0 port 0 online 438 * 0 0 x 1 1 1 0 0 both ports online 439 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 440 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 441 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 442 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 443 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 444 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 445 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 446 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 447 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 448 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 449 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 450 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 451 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 452 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 453 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 454 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 455 */ 456 static struct etr_eacr etr_eacr; 457 static u64 etr_tolec; /* time of last eacr update */ 458 static struct etr_aib etr_port0; 459 static int etr_port0_uptodate; 460 static struct etr_aib etr_port1; 461 static int etr_port1_uptodate; 462 static unsigned long etr_events; 463 static struct timer_list etr_timer; 464 465 static void etr_timeout(unsigned long dummy); 466 static void etr_work_fn(struct work_struct *work); 467 static DEFINE_MUTEX(etr_work_mutex); 468 static DECLARE_WORK(etr_work, etr_work_fn); 469 470 /* 471 * Reset ETR attachment. 472 */ 473 static void etr_reset(void) 474 { 475 etr_eacr = (struct etr_eacr) { 476 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 477 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 478 .es = 0, .sl = 0 }; 479 if (etr_setr(&etr_eacr) == 0) { 480 etr_tolec = get_clock(); 481 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 482 if (etr_port0_online && etr_port1_online) 483 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 484 } else if (etr_port0_online || etr_port1_online) { 485 pr_warning("The real or virtual hardware system does " 486 "not provide an ETR interface\n"); 487 etr_port0_online = etr_port1_online = 0; 488 } 489 } 490 491 static int __init etr_init(void) 492 { 493 struct etr_aib aib; 494 495 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 496 return 0; 497 time_init_wq(); 498 /* Check if this machine has the steai instruction. */ 499 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 500 etr_steai_available = 1; 501 setup_timer(&etr_timer, etr_timeout, 0UL); 502 if (etr_port0_online) { 503 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 504 queue_work(time_sync_wq, &etr_work); 505 } 506 if (etr_port1_online) { 507 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 508 queue_work(time_sync_wq, &etr_work); 509 } 510 return 0; 511 } 512 513 arch_initcall(etr_init); 514 515 /* 516 * Two sorts of ETR machine checks. The architecture reads: 517 * "When a machine-check niterruption occurs and if a switch-to-local or 518 * ETR-sync-check interrupt request is pending but disabled, this pending 519 * disabled interruption request is indicated and is cleared". 520 * Which means that we can get etr_switch_to_local events from the machine 521 * check handler although the interruption condition is disabled. Lovely.. 522 */ 523 524 /* 525 * Switch to local machine check. This is called when the last usable 526 * ETR port goes inactive. After switch to local the clock is not in sync. 527 */ 528 void etr_switch_to_local(void) 529 { 530 if (!etr_eacr.sl) 531 return; 532 disable_sync_clock(NULL); 533 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 534 queue_work(time_sync_wq, &etr_work); 535 } 536 537 /* 538 * ETR sync check machine check. This is called when the ETR OTE and the 539 * local clock OTE are farther apart than the ETR sync check tolerance. 540 * After a ETR sync check the clock is not in sync. The machine check 541 * is broadcasted to all cpus at the same time. 542 */ 543 void etr_sync_check(void) 544 { 545 if (!etr_eacr.es) 546 return; 547 disable_sync_clock(NULL); 548 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 549 queue_work(time_sync_wq, &etr_work); 550 } 551 552 /* 553 * ETR timing alert. There are two causes: 554 * 1) port state change, check the usability of the port 555 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 556 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 557 * or ETR-data word 4 (edf4) has changed. 558 */ 559 static void etr_timing_alert(struct etr_irq_parm *intparm) 560 { 561 if (intparm->pc0) 562 /* ETR port 0 state change. */ 563 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 564 if (intparm->pc1) 565 /* ETR port 1 state change. */ 566 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 567 if (intparm->eai) 568 /* 569 * ETR port alert on either port 0, 1 or both. 570 * Both ports are not up-to-date now. 571 */ 572 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 573 queue_work(time_sync_wq, &etr_work); 574 } 575 576 static void etr_timeout(unsigned long dummy) 577 { 578 set_bit(ETR_EVENT_UPDATE, &etr_events); 579 queue_work(time_sync_wq, &etr_work); 580 } 581 582 /* 583 * Check if the etr mode is pss. 584 */ 585 static inline int etr_mode_is_pps(struct etr_eacr eacr) 586 { 587 return eacr.es && !eacr.sl; 588 } 589 590 /* 591 * Check if the etr mode is etr. 592 */ 593 static inline int etr_mode_is_etr(struct etr_eacr eacr) 594 { 595 return eacr.es && eacr.sl; 596 } 597 598 /* 599 * Check if the port can be used for TOD synchronization. 600 * For PPS mode the port has to receive OTEs. For ETR mode 601 * the port has to receive OTEs, the ETR stepping bit has to 602 * be zero and the validity bits for data frame 1, 2, and 3 603 * have to be 1. 604 */ 605 static int etr_port_valid(struct etr_aib *aib, int port) 606 { 607 unsigned int psc; 608 609 /* Check that this port is receiving OTEs. */ 610 if (aib->tsp == 0) 611 return 0; 612 613 psc = port ? aib->esw.psc1 : aib->esw.psc0; 614 if (psc == etr_lpsc_pps_mode) 615 return 1; 616 if (psc == etr_lpsc_operational_step) 617 return !aib->esw.y && aib->slsw.v1 && 618 aib->slsw.v2 && aib->slsw.v3; 619 return 0; 620 } 621 622 /* 623 * Check if two ports are on the same network. 624 */ 625 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 626 { 627 // FIXME: any other fields we have to compare? 628 return aib1->edf1.net_id == aib2->edf1.net_id; 629 } 630 631 /* 632 * Wrapper for etr_stei that converts physical port states 633 * to logical port states to be consistent with the output 634 * of stetr (see etr_psc vs. etr_lpsc). 635 */ 636 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 637 { 638 BUG_ON(etr_steai(aib, func) != 0); 639 /* Convert port state to logical port state. */ 640 if (aib->esw.psc0 == 1) 641 aib->esw.psc0 = 2; 642 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 643 aib->esw.psc0 = 1; 644 if (aib->esw.psc1 == 1) 645 aib->esw.psc1 = 2; 646 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 647 aib->esw.psc1 = 1; 648 } 649 650 /* 651 * Check if the aib a2 is still connected to the same attachment as 652 * aib a1, the etv values differ by one and a2 is valid. 653 */ 654 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 655 { 656 int state_a1, state_a2; 657 658 /* Paranoia check: e0/e1 should better be the same. */ 659 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 660 a1->esw.eacr.e1 != a2->esw.eacr.e1) 661 return 0; 662 663 /* Still connected to the same etr ? */ 664 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 665 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 666 if (state_a1 == etr_lpsc_operational_step) { 667 if (state_a2 != etr_lpsc_operational_step || 668 a1->edf1.net_id != a2->edf1.net_id || 669 a1->edf1.etr_id != a2->edf1.etr_id || 670 a1->edf1.etr_pn != a2->edf1.etr_pn) 671 return 0; 672 } else if (state_a2 != etr_lpsc_pps_mode) 673 return 0; 674 675 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 676 if (a1->edf2.etv + 1 != a2->edf2.etv) 677 return 0; 678 679 if (!etr_port_valid(a2, p)) 680 return 0; 681 682 return 1; 683 } 684 685 struct clock_sync_data { 686 atomic_t cpus; 687 int in_sync; 688 unsigned long long fixup_cc; 689 int etr_port; 690 struct etr_aib *etr_aib; 691 }; 692 693 static void clock_sync_cpu(struct clock_sync_data *sync) 694 { 695 atomic_dec(&sync->cpus); 696 enable_sync_clock(); 697 /* 698 * This looks like a busy wait loop but it isn't. etr_sync_cpus 699 * is called on all other cpus while the TOD clocks is stopped. 700 * __udelay will stop the cpu on an enabled wait psw until the 701 * TOD is running again. 702 */ 703 while (sync->in_sync == 0) { 704 __udelay(1); 705 /* 706 * A different cpu changes *in_sync. Therefore use 707 * barrier() to force memory access. 708 */ 709 barrier(); 710 } 711 if (sync->in_sync != 1) 712 /* Didn't work. Clear per-cpu in sync bit again. */ 713 disable_sync_clock(NULL); 714 /* 715 * This round of TOD syncing is done. Set the clock comparator 716 * to the next tick and let the processor continue. 717 */ 718 fixup_clock_comparator(sync->fixup_cc); 719 } 720 721 /* 722 * Sync the TOD clock using the port refered to by aibp. This port 723 * has to be enabled and the other port has to be disabled. The 724 * last eacr update has to be more than 1.6 seconds in the past. 725 */ 726 static int etr_sync_clock(void *data) 727 { 728 static int first; 729 unsigned long long clock, old_clock, delay, delta; 730 struct clock_sync_data *etr_sync; 731 struct etr_aib *sync_port, *aib; 732 int port; 733 int rc; 734 735 etr_sync = data; 736 737 if (xchg(&first, 1) == 1) { 738 /* Slave */ 739 clock_sync_cpu(etr_sync); 740 return 0; 741 } 742 743 /* Wait until all other cpus entered the sync function. */ 744 while (atomic_read(&etr_sync->cpus) != 0) 745 cpu_relax(); 746 747 port = etr_sync->etr_port; 748 aib = etr_sync->etr_aib; 749 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 750 enable_sync_clock(); 751 752 /* Set clock to next OTE. */ 753 __ctl_set_bit(14, 21); 754 __ctl_set_bit(0, 29); 755 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 756 old_clock = get_clock(); 757 if (set_clock(clock) == 0) { 758 __udelay(1); /* Wait for the clock to start. */ 759 __ctl_clear_bit(0, 29); 760 __ctl_clear_bit(14, 21); 761 etr_stetr(aib); 762 /* Adjust Linux timing variables. */ 763 delay = (unsigned long long) 764 (aib->edf2.etv - sync_port->edf2.etv) << 32; 765 delta = adjust_time(old_clock, clock, delay); 766 etr_sync->fixup_cc = delta; 767 fixup_clock_comparator(delta); 768 /* Verify that the clock is properly set. */ 769 if (!etr_aib_follows(sync_port, aib, port)) { 770 /* Didn't work. */ 771 disable_sync_clock(NULL); 772 etr_sync->in_sync = -EAGAIN; 773 rc = -EAGAIN; 774 } else { 775 etr_sync->in_sync = 1; 776 rc = 0; 777 } 778 } else { 779 /* Could not set the clock ?!? */ 780 __ctl_clear_bit(0, 29); 781 __ctl_clear_bit(14, 21); 782 disable_sync_clock(NULL); 783 etr_sync->in_sync = -EAGAIN; 784 rc = -EAGAIN; 785 } 786 xchg(&first, 0); 787 return rc; 788 } 789 790 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 791 { 792 struct clock_sync_data etr_sync; 793 struct etr_aib *sync_port; 794 int follows; 795 int rc; 796 797 /* Check if the current aib is adjacent to the sync port aib. */ 798 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 799 follows = etr_aib_follows(sync_port, aib, port); 800 memcpy(sync_port, aib, sizeof(*aib)); 801 if (!follows) 802 return -EAGAIN; 803 memset(&etr_sync, 0, sizeof(etr_sync)); 804 etr_sync.etr_aib = aib; 805 etr_sync.etr_port = port; 806 get_online_cpus(); 807 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 808 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map); 809 put_online_cpus(); 810 return rc; 811 } 812 813 /* 814 * Handle the immediate effects of the different events. 815 * The port change event is used for online/offline changes. 816 */ 817 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 818 { 819 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 820 eacr.es = 0; 821 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 822 eacr.es = eacr.sl = 0; 823 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 824 etr_port0_uptodate = etr_port1_uptodate = 0; 825 826 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 827 if (eacr.e0) 828 /* 829 * Port change of an enabled port. We have to 830 * assume that this can have caused an stepping 831 * port switch. 832 */ 833 etr_tolec = get_clock(); 834 eacr.p0 = etr_port0_online; 835 if (!eacr.p0) 836 eacr.e0 = 0; 837 etr_port0_uptodate = 0; 838 } 839 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 840 if (eacr.e1) 841 /* 842 * Port change of an enabled port. We have to 843 * assume that this can have caused an stepping 844 * port switch. 845 */ 846 etr_tolec = get_clock(); 847 eacr.p1 = etr_port1_online; 848 if (!eacr.p1) 849 eacr.e1 = 0; 850 etr_port1_uptodate = 0; 851 } 852 clear_bit(ETR_EVENT_UPDATE, &etr_events); 853 return eacr; 854 } 855 856 /* 857 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 858 * one of the ports needs an update. 859 */ 860 static void etr_set_tolec_timeout(unsigned long long now) 861 { 862 unsigned long micros; 863 864 if ((!etr_eacr.p0 || etr_port0_uptodate) && 865 (!etr_eacr.p1 || etr_port1_uptodate)) 866 return; 867 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 868 micros = (micros > 1600000) ? 0 : 1600000 - micros; 869 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 870 } 871 872 /* 873 * Set up a time that expires after 1/2 second. 874 */ 875 static void etr_set_sync_timeout(void) 876 { 877 mod_timer(&etr_timer, jiffies + HZ/2); 878 } 879 880 /* 881 * Update the aib information for one or both ports. 882 */ 883 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 884 struct etr_eacr eacr) 885 { 886 /* With both ports disabled the aib information is useless. */ 887 if (!eacr.e0 && !eacr.e1) 888 return eacr; 889 890 /* Update port0 or port1 with aib stored in etr_work_fn. */ 891 if (aib->esw.q == 0) { 892 /* Information for port 0 stored. */ 893 if (eacr.p0 && !etr_port0_uptodate) { 894 etr_port0 = *aib; 895 if (etr_port0_online) 896 etr_port0_uptodate = 1; 897 } 898 } else { 899 /* Information for port 1 stored. */ 900 if (eacr.p1 && !etr_port1_uptodate) { 901 etr_port1 = *aib; 902 if (etr_port0_online) 903 etr_port1_uptodate = 1; 904 } 905 } 906 907 /* 908 * Do not try to get the alternate port aib if the clock 909 * is not in sync yet. 910 */ 911 if (!check_sync_clock()) 912 return eacr; 913 914 /* 915 * If steai is available we can get the information about 916 * the other port immediately. If only stetr is available the 917 * data-port bit toggle has to be used. 918 */ 919 if (etr_steai_available) { 920 if (eacr.p0 && !etr_port0_uptodate) { 921 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 922 etr_port0_uptodate = 1; 923 } 924 if (eacr.p1 && !etr_port1_uptodate) { 925 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 926 etr_port1_uptodate = 1; 927 } 928 } else { 929 /* 930 * One port was updated above, if the other 931 * port is not uptodate toggle dp bit. 932 */ 933 if ((eacr.p0 && !etr_port0_uptodate) || 934 (eacr.p1 && !etr_port1_uptodate)) 935 eacr.dp ^= 1; 936 else 937 eacr.dp = 0; 938 } 939 return eacr; 940 } 941 942 /* 943 * Write new etr control register if it differs from the current one. 944 * Return 1 if etr_tolec has been updated as well. 945 */ 946 static void etr_update_eacr(struct etr_eacr eacr) 947 { 948 int dp_changed; 949 950 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 951 /* No change, return. */ 952 return; 953 /* 954 * The disable of an active port of the change of the data port 955 * bit can/will cause a change in the data port. 956 */ 957 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 958 (etr_eacr.dp ^ eacr.dp) != 0; 959 etr_eacr = eacr; 960 etr_setr(&etr_eacr); 961 if (dp_changed) 962 etr_tolec = get_clock(); 963 } 964 965 /* 966 * ETR work. In this function you'll find the main logic. In 967 * particular this is the only function that calls etr_update_eacr(), 968 * it "controls" the etr control register. 969 */ 970 static void etr_work_fn(struct work_struct *work) 971 { 972 unsigned long long now; 973 struct etr_eacr eacr; 974 struct etr_aib aib; 975 int sync_port; 976 977 /* prevent multiple execution. */ 978 mutex_lock(&etr_work_mutex); 979 980 /* Create working copy of etr_eacr. */ 981 eacr = etr_eacr; 982 983 /* Check for the different events and their immediate effects. */ 984 eacr = etr_handle_events(eacr); 985 986 /* Check if ETR is supposed to be active. */ 987 eacr.ea = eacr.p0 || eacr.p1; 988 if (!eacr.ea) { 989 /* Both ports offline. Reset everything. */ 990 eacr.dp = eacr.es = eacr.sl = 0; 991 on_each_cpu(disable_sync_clock, NULL, 1); 992 del_timer_sync(&etr_timer); 993 etr_update_eacr(eacr); 994 goto out_unlock; 995 } 996 997 /* Store aib to get the current ETR status word. */ 998 BUG_ON(etr_stetr(&aib) != 0); 999 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1000 now = get_clock(); 1001 1002 /* 1003 * Update the port information if the last stepping port change 1004 * or data port change is older than 1.6 seconds. 1005 */ 1006 if (now >= etr_tolec + (1600000 << 12)) 1007 eacr = etr_handle_update(&aib, eacr); 1008 1009 /* 1010 * Select ports to enable. The prefered synchronization mode is PPS. 1011 * If a port can be enabled depends on a number of things: 1012 * 1) The port needs to be online and uptodate. A port is not 1013 * disabled just because it is not uptodate, but it is only 1014 * enabled if it is uptodate. 1015 * 2) The port needs to have the same mode (pps / etr). 1016 * 3) The port needs to be usable -> etr_port_valid() == 1 1017 * 4) To enable the second port the clock needs to be in sync. 1018 * 5) If both ports are useable and are ETR ports, the network id 1019 * has to be the same. 1020 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1021 */ 1022 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1023 eacr.sl = 0; 1024 eacr.e0 = 1; 1025 if (!etr_mode_is_pps(etr_eacr)) 1026 eacr.es = 0; 1027 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1028 eacr.e1 = 0; 1029 // FIXME: uptodate checks ? 1030 else if (etr_port0_uptodate && etr_port1_uptodate) 1031 eacr.e1 = 1; 1032 sync_port = (etr_port0_uptodate && 1033 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1034 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1035 eacr.sl = 0; 1036 eacr.e0 = 0; 1037 eacr.e1 = 1; 1038 if (!etr_mode_is_pps(etr_eacr)) 1039 eacr.es = 0; 1040 sync_port = (etr_port1_uptodate && 1041 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1042 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1043 eacr.sl = 1; 1044 eacr.e0 = 1; 1045 if (!etr_mode_is_etr(etr_eacr)) 1046 eacr.es = 0; 1047 if (!eacr.es || !eacr.p1 || 1048 aib.esw.psc1 != etr_lpsc_operational_alt) 1049 eacr.e1 = 0; 1050 else if (etr_port0_uptodate && etr_port1_uptodate && 1051 etr_compare_network(&etr_port0, &etr_port1)) 1052 eacr.e1 = 1; 1053 sync_port = (etr_port0_uptodate && 1054 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1055 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1056 eacr.sl = 1; 1057 eacr.e0 = 0; 1058 eacr.e1 = 1; 1059 if (!etr_mode_is_etr(etr_eacr)) 1060 eacr.es = 0; 1061 sync_port = (etr_port1_uptodate && 1062 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1063 } else { 1064 /* Both ports not usable. */ 1065 eacr.es = eacr.sl = 0; 1066 sync_port = -1; 1067 } 1068 1069 /* 1070 * If the clock is in sync just update the eacr and return. 1071 * If there is no valid sync port wait for a port update. 1072 */ 1073 if (check_sync_clock() || sync_port < 0) { 1074 etr_update_eacr(eacr); 1075 etr_set_tolec_timeout(now); 1076 goto out_unlock; 1077 } 1078 1079 /* 1080 * Prepare control register for clock syncing 1081 * (reset data port bit, set sync check control. 1082 */ 1083 eacr.dp = 0; 1084 eacr.es = 1; 1085 1086 /* 1087 * Update eacr and try to synchronize the clock. If the update 1088 * of eacr caused a stepping port switch (or if we have to 1089 * assume that a stepping port switch has occured) or the 1090 * clock syncing failed, reset the sync check control bit 1091 * and set up a timer to try again after 0.5 seconds 1092 */ 1093 etr_update_eacr(eacr); 1094 if (now < etr_tolec + (1600000 << 12) || 1095 etr_sync_clock_stop(&aib, sync_port) != 0) { 1096 /* Sync failed. Try again in 1/2 second. */ 1097 eacr.es = 0; 1098 etr_update_eacr(eacr); 1099 etr_set_sync_timeout(); 1100 } else 1101 etr_set_tolec_timeout(now); 1102 out_unlock: 1103 mutex_unlock(&etr_work_mutex); 1104 } 1105 1106 /* 1107 * Sysfs interface functions 1108 */ 1109 static struct sysdev_class etr_sysclass = { 1110 .name = "etr", 1111 }; 1112 1113 static struct sys_device etr_port0_dev = { 1114 .id = 0, 1115 .cls = &etr_sysclass, 1116 }; 1117 1118 static struct sys_device etr_port1_dev = { 1119 .id = 1, 1120 .cls = &etr_sysclass, 1121 }; 1122 1123 /* 1124 * ETR class attributes 1125 */ 1126 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf) 1127 { 1128 return sprintf(buf, "%i\n", etr_port0.esw.p); 1129 } 1130 1131 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1132 1133 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf) 1134 { 1135 char *mode_str; 1136 1137 if (etr_mode_is_pps(etr_eacr)) 1138 mode_str = "pps"; 1139 else if (etr_mode_is_etr(etr_eacr)) 1140 mode_str = "etr"; 1141 else 1142 mode_str = "local"; 1143 return sprintf(buf, "%s\n", mode_str); 1144 } 1145 1146 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1147 1148 /* 1149 * ETR port attributes 1150 */ 1151 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev) 1152 { 1153 if (dev == &etr_port0_dev) 1154 return etr_port0_online ? &etr_port0 : NULL; 1155 else 1156 return etr_port1_online ? &etr_port1 : NULL; 1157 } 1158 1159 static ssize_t etr_online_show(struct sys_device *dev, 1160 struct sysdev_attribute *attr, 1161 char *buf) 1162 { 1163 unsigned int online; 1164 1165 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1166 return sprintf(buf, "%i\n", online); 1167 } 1168 1169 static ssize_t etr_online_store(struct sys_device *dev, 1170 struct sysdev_attribute *attr, 1171 const char *buf, size_t count) 1172 { 1173 unsigned int value; 1174 1175 value = simple_strtoul(buf, NULL, 0); 1176 if (value != 0 && value != 1) 1177 return -EINVAL; 1178 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1179 return -EOPNOTSUPP; 1180 mutex_lock(&clock_sync_mutex); 1181 if (dev == &etr_port0_dev) { 1182 if (etr_port0_online == value) 1183 goto out; /* Nothing to do. */ 1184 etr_port0_online = value; 1185 if (etr_port0_online && etr_port1_online) 1186 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1187 else 1188 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1189 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1190 queue_work(time_sync_wq, &etr_work); 1191 } else { 1192 if (etr_port1_online == value) 1193 goto out; /* Nothing to do. */ 1194 etr_port1_online = value; 1195 if (etr_port0_online && etr_port1_online) 1196 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1197 else 1198 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1199 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1200 queue_work(time_sync_wq, &etr_work); 1201 } 1202 out: 1203 mutex_unlock(&clock_sync_mutex); 1204 return count; 1205 } 1206 1207 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store); 1208 1209 static ssize_t etr_stepping_control_show(struct sys_device *dev, 1210 struct sysdev_attribute *attr, 1211 char *buf) 1212 { 1213 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1214 etr_eacr.e0 : etr_eacr.e1); 1215 } 1216 1217 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1218 1219 static ssize_t etr_mode_code_show(struct sys_device *dev, 1220 struct sysdev_attribute *attr, char *buf) 1221 { 1222 if (!etr_port0_online && !etr_port1_online) 1223 /* Status word is not uptodate if both ports are offline. */ 1224 return -ENODATA; 1225 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1226 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1227 } 1228 1229 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1230 1231 static ssize_t etr_untuned_show(struct sys_device *dev, 1232 struct sysdev_attribute *attr, char *buf) 1233 { 1234 struct etr_aib *aib = etr_aib_from_dev(dev); 1235 1236 if (!aib || !aib->slsw.v1) 1237 return -ENODATA; 1238 return sprintf(buf, "%i\n", aib->edf1.u); 1239 } 1240 1241 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL); 1242 1243 static ssize_t etr_network_id_show(struct sys_device *dev, 1244 struct sysdev_attribute *attr, char *buf) 1245 { 1246 struct etr_aib *aib = etr_aib_from_dev(dev); 1247 1248 if (!aib || !aib->slsw.v1) 1249 return -ENODATA; 1250 return sprintf(buf, "%i\n", aib->edf1.net_id); 1251 } 1252 1253 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL); 1254 1255 static ssize_t etr_id_show(struct sys_device *dev, 1256 struct sysdev_attribute *attr, char *buf) 1257 { 1258 struct etr_aib *aib = etr_aib_from_dev(dev); 1259 1260 if (!aib || !aib->slsw.v1) 1261 return -ENODATA; 1262 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1263 } 1264 1265 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL); 1266 1267 static ssize_t etr_port_number_show(struct sys_device *dev, 1268 struct sysdev_attribute *attr, char *buf) 1269 { 1270 struct etr_aib *aib = etr_aib_from_dev(dev); 1271 1272 if (!aib || !aib->slsw.v1) 1273 return -ENODATA; 1274 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1275 } 1276 1277 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL); 1278 1279 static ssize_t etr_coupled_show(struct sys_device *dev, 1280 struct sysdev_attribute *attr, char *buf) 1281 { 1282 struct etr_aib *aib = etr_aib_from_dev(dev); 1283 1284 if (!aib || !aib->slsw.v3) 1285 return -ENODATA; 1286 return sprintf(buf, "%i\n", aib->edf3.c); 1287 } 1288 1289 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL); 1290 1291 static ssize_t etr_local_time_show(struct sys_device *dev, 1292 struct sysdev_attribute *attr, char *buf) 1293 { 1294 struct etr_aib *aib = etr_aib_from_dev(dev); 1295 1296 if (!aib || !aib->slsw.v3) 1297 return -ENODATA; 1298 return sprintf(buf, "%i\n", aib->edf3.blto); 1299 } 1300 1301 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL); 1302 1303 static ssize_t etr_utc_offset_show(struct sys_device *dev, 1304 struct sysdev_attribute *attr, char *buf) 1305 { 1306 struct etr_aib *aib = etr_aib_from_dev(dev); 1307 1308 if (!aib || !aib->slsw.v3) 1309 return -ENODATA; 1310 return sprintf(buf, "%i\n", aib->edf3.buo); 1311 } 1312 1313 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1314 1315 static struct sysdev_attribute *etr_port_attributes[] = { 1316 &attr_online, 1317 &attr_stepping_control, 1318 &attr_state_code, 1319 &attr_untuned, 1320 &attr_network, 1321 &attr_id, 1322 &attr_port, 1323 &attr_coupled, 1324 &attr_local_time, 1325 &attr_utc_offset, 1326 NULL 1327 }; 1328 1329 static int __init etr_register_port(struct sys_device *dev) 1330 { 1331 struct sysdev_attribute **attr; 1332 int rc; 1333 1334 rc = sysdev_register(dev); 1335 if (rc) 1336 goto out; 1337 for (attr = etr_port_attributes; *attr; attr++) { 1338 rc = sysdev_create_file(dev, *attr); 1339 if (rc) 1340 goto out_unreg; 1341 } 1342 return 0; 1343 out_unreg: 1344 for (; attr >= etr_port_attributes; attr--) 1345 sysdev_remove_file(dev, *attr); 1346 sysdev_unregister(dev); 1347 out: 1348 return rc; 1349 } 1350 1351 static void __init etr_unregister_port(struct sys_device *dev) 1352 { 1353 struct sysdev_attribute **attr; 1354 1355 for (attr = etr_port_attributes; *attr; attr++) 1356 sysdev_remove_file(dev, *attr); 1357 sysdev_unregister(dev); 1358 } 1359 1360 static int __init etr_init_sysfs(void) 1361 { 1362 int rc; 1363 1364 rc = sysdev_class_register(&etr_sysclass); 1365 if (rc) 1366 goto out; 1367 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port); 1368 if (rc) 1369 goto out_unreg_class; 1370 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode); 1371 if (rc) 1372 goto out_remove_stepping_port; 1373 rc = etr_register_port(&etr_port0_dev); 1374 if (rc) 1375 goto out_remove_stepping_mode; 1376 rc = etr_register_port(&etr_port1_dev); 1377 if (rc) 1378 goto out_remove_port0; 1379 return 0; 1380 1381 out_remove_port0: 1382 etr_unregister_port(&etr_port0_dev); 1383 out_remove_stepping_mode: 1384 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode); 1385 out_remove_stepping_port: 1386 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port); 1387 out_unreg_class: 1388 sysdev_class_unregister(&etr_sysclass); 1389 out: 1390 return rc; 1391 } 1392 1393 device_initcall(etr_init_sysfs); 1394 1395 /* 1396 * Server Time Protocol (STP) code. 1397 */ 1398 static int stp_online; 1399 static struct stp_sstpi stp_info; 1400 static void *stp_page; 1401 1402 static void stp_work_fn(struct work_struct *work); 1403 static DEFINE_MUTEX(stp_work_mutex); 1404 static DECLARE_WORK(stp_work, stp_work_fn); 1405 static struct timer_list stp_timer; 1406 1407 static int __init early_parse_stp(char *p) 1408 { 1409 if (strncmp(p, "off", 3) == 0) 1410 stp_online = 0; 1411 else if (strncmp(p, "on", 2) == 0) 1412 stp_online = 1; 1413 return 0; 1414 } 1415 early_param("stp", early_parse_stp); 1416 1417 /* 1418 * Reset STP attachment. 1419 */ 1420 static void __init stp_reset(void) 1421 { 1422 int rc; 1423 1424 stp_page = (void *) get_zeroed_page(GFP_ATOMIC); 1425 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1426 if (rc == 0) 1427 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1428 else if (stp_online) { 1429 pr_warning("The real or virtual hardware system does " 1430 "not provide an STP interface\n"); 1431 free_page((unsigned long) stp_page); 1432 stp_page = NULL; 1433 stp_online = 0; 1434 } 1435 } 1436 1437 static void stp_timeout(unsigned long dummy) 1438 { 1439 queue_work(time_sync_wq, &stp_work); 1440 } 1441 1442 static int __init stp_init(void) 1443 { 1444 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1445 return 0; 1446 setup_timer(&stp_timer, stp_timeout, 0UL); 1447 time_init_wq(); 1448 if (!stp_online) 1449 return 0; 1450 queue_work(time_sync_wq, &stp_work); 1451 return 0; 1452 } 1453 1454 arch_initcall(stp_init); 1455 1456 /* 1457 * STP timing alert. There are three causes: 1458 * 1) timing status change 1459 * 2) link availability change 1460 * 3) time control parameter change 1461 * In all three cases we are only interested in the clock source state. 1462 * If a STP clock source is now available use it. 1463 */ 1464 static void stp_timing_alert(struct stp_irq_parm *intparm) 1465 { 1466 if (intparm->tsc || intparm->lac || intparm->tcpc) 1467 queue_work(time_sync_wq, &stp_work); 1468 } 1469 1470 /* 1471 * STP sync check machine check. This is called when the timing state 1472 * changes from the synchronized state to the unsynchronized state. 1473 * After a STP sync check the clock is not in sync. The machine check 1474 * is broadcasted to all cpus at the same time. 1475 */ 1476 void stp_sync_check(void) 1477 { 1478 disable_sync_clock(NULL); 1479 queue_work(time_sync_wq, &stp_work); 1480 } 1481 1482 /* 1483 * STP island condition machine check. This is called when an attached 1484 * server attempts to communicate over an STP link and the servers 1485 * have matching CTN ids and have a valid stratum-1 configuration 1486 * but the configurations do not match. 1487 */ 1488 void stp_island_check(void) 1489 { 1490 disable_sync_clock(NULL); 1491 queue_work(time_sync_wq, &stp_work); 1492 } 1493 1494 1495 static int stp_sync_clock(void *data) 1496 { 1497 static int first; 1498 unsigned long long old_clock, delta; 1499 struct clock_sync_data *stp_sync; 1500 int rc; 1501 1502 stp_sync = data; 1503 1504 if (xchg(&first, 1) == 1) { 1505 /* Slave */ 1506 clock_sync_cpu(stp_sync); 1507 return 0; 1508 } 1509 1510 /* Wait until all other cpus entered the sync function. */ 1511 while (atomic_read(&stp_sync->cpus) != 0) 1512 cpu_relax(); 1513 1514 enable_sync_clock(); 1515 1516 rc = 0; 1517 if (stp_info.todoff[0] || stp_info.todoff[1] || 1518 stp_info.todoff[2] || stp_info.todoff[3] || 1519 stp_info.tmd != 2) { 1520 old_clock = get_clock(); 1521 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1522 if (rc == 0) { 1523 delta = adjust_time(old_clock, get_clock(), 0); 1524 fixup_clock_comparator(delta); 1525 rc = chsc_sstpi(stp_page, &stp_info, 1526 sizeof(struct stp_sstpi)); 1527 if (rc == 0 && stp_info.tmd != 2) 1528 rc = -EAGAIN; 1529 } 1530 } 1531 if (rc) { 1532 disable_sync_clock(NULL); 1533 stp_sync->in_sync = -EAGAIN; 1534 } else 1535 stp_sync->in_sync = 1; 1536 xchg(&first, 0); 1537 return 0; 1538 } 1539 1540 /* 1541 * STP work. Check for the STP state and take over the clock 1542 * synchronization if the STP clock source is usable. 1543 */ 1544 static void stp_work_fn(struct work_struct *work) 1545 { 1546 struct clock_sync_data stp_sync; 1547 int rc; 1548 1549 /* prevent multiple execution. */ 1550 mutex_lock(&stp_work_mutex); 1551 1552 if (!stp_online) { 1553 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1554 del_timer_sync(&stp_timer); 1555 goto out_unlock; 1556 } 1557 1558 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1559 if (rc) 1560 goto out_unlock; 1561 1562 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1563 if (rc || stp_info.c == 0) 1564 goto out_unlock; 1565 1566 /* Skip synchronization if the clock is already in sync. */ 1567 if (check_sync_clock()) 1568 goto out_unlock; 1569 1570 memset(&stp_sync, 0, sizeof(stp_sync)); 1571 get_online_cpus(); 1572 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1573 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1574 put_online_cpus(); 1575 1576 if (!check_sync_clock()) 1577 /* 1578 * There is a usable clock but the synchonization failed. 1579 * Retry after a second. 1580 */ 1581 mod_timer(&stp_timer, jiffies + HZ); 1582 1583 out_unlock: 1584 mutex_unlock(&stp_work_mutex); 1585 } 1586 1587 /* 1588 * STP class sysfs interface functions 1589 */ 1590 static struct sysdev_class stp_sysclass = { 1591 .name = "stp", 1592 }; 1593 1594 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) 1595 { 1596 if (!stp_online) 1597 return -ENODATA; 1598 return sprintf(buf, "%016llx\n", 1599 *(unsigned long long *) stp_info.ctnid); 1600 } 1601 1602 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1603 1604 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) 1605 { 1606 if (!stp_online) 1607 return -ENODATA; 1608 return sprintf(buf, "%i\n", stp_info.ctn); 1609 } 1610 1611 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1612 1613 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) 1614 { 1615 if (!stp_online || !(stp_info.vbits & 0x2000)) 1616 return -ENODATA; 1617 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1618 } 1619 1620 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1621 1622 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) 1623 { 1624 if (!stp_online || !(stp_info.vbits & 0x8000)) 1625 return -ENODATA; 1626 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1627 } 1628 1629 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1630 1631 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) 1632 { 1633 if (!stp_online) 1634 return -ENODATA; 1635 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1636 } 1637 1638 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); 1639 1640 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) 1641 { 1642 if (!stp_online || !(stp_info.vbits & 0x0800)) 1643 return -ENODATA; 1644 return sprintf(buf, "%i\n", (int) stp_info.tto); 1645 } 1646 1647 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1648 1649 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) 1650 { 1651 if (!stp_online || !(stp_info.vbits & 0x4000)) 1652 return -ENODATA; 1653 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1654 } 1655 1656 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, 1657 stp_time_zone_offset_show, NULL); 1658 1659 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) 1660 { 1661 if (!stp_online) 1662 return -ENODATA; 1663 return sprintf(buf, "%i\n", stp_info.tmd); 1664 } 1665 1666 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1667 1668 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) 1669 { 1670 if (!stp_online) 1671 return -ENODATA; 1672 return sprintf(buf, "%i\n", stp_info.tst); 1673 } 1674 1675 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1676 1677 static ssize_t stp_online_show(struct sysdev_class *class, char *buf) 1678 { 1679 return sprintf(buf, "%i\n", stp_online); 1680 } 1681 1682 static ssize_t stp_online_store(struct sysdev_class *class, 1683 const char *buf, size_t count) 1684 { 1685 unsigned int value; 1686 1687 value = simple_strtoul(buf, NULL, 0); 1688 if (value != 0 && value != 1) 1689 return -EINVAL; 1690 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1691 return -EOPNOTSUPP; 1692 mutex_lock(&clock_sync_mutex); 1693 stp_online = value; 1694 if (stp_online) 1695 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1696 else 1697 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1698 queue_work(time_sync_wq, &stp_work); 1699 mutex_unlock(&clock_sync_mutex); 1700 return count; 1701 } 1702 1703 /* 1704 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named 1705 * stp/online but attr_online already exists in this file .. 1706 */ 1707 static struct sysdev_class_attribute attr_stp_online = { 1708 .attr = { .name = "online", .mode = 0600 }, 1709 .show = stp_online_show, 1710 .store = stp_online_store, 1711 }; 1712 1713 static struct sysdev_class_attribute *stp_attributes[] = { 1714 &attr_ctn_id, 1715 &attr_ctn_type, 1716 &attr_dst_offset, 1717 &attr_leap_seconds, 1718 &attr_stp_online, 1719 &attr_stratum, 1720 &attr_time_offset, 1721 &attr_time_zone_offset, 1722 &attr_timing_mode, 1723 &attr_timing_state, 1724 NULL 1725 }; 1726 1727 static int __init stp_init_sysfs(void) 1728 { 1729 struct sysdev_class_attribute **attr; 1730 int rc; 1731 1732 rc = sysdev_class_register(&stp_sysclass); 1733 if (rc) 1734 goto out; 1735 for (attr = stp_attributes; *attr; attr++) { 1736 rc = sysdev_class_create_file(&stp_sysclass, *attr); 1737 if (rc) 1738 goto out_unreg; 1739 } 1740 return 0; 1741 out_unreg: 1742 for (; attr >= stp_attributes; attr--) 1743 sysdev_class_remove_file(&stp_sysclass, *attr); 1744 sysdev_class_unregister(&stp_sysclass); 1745 out: 1746 return rc; 1747 } 1748 1749 device_initcall(stp_init_sysfs); 1750