1 /* 2 * Time of day based timer functions. 3 * 4 * S390 version 5 * Copyright IBM Corp. 1999, 2008 6 * Author(s): Hartmut Penner (hp@de.ibm.com), 7 * Martin Schwidefsky (schwidefsky@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 9 * 10 * Derived from "arch/i386/kernel/time.c" 11 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 12 */ 13 14 #define KMSG_COMPONENT "time" 15 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 16 17 #include <linux/kernel_stat.h> 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/device.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/timekeeper_internal.h> 38 #include <linux/clockchips.h> 39 #include <linux/gfp.h> 40 #include <linux/kprobes.h> 41 #include <asm/uaccess.h> 42 #include <asm/delay.h> 43 #include <asm/div64.h> 44 #include <asm/vdso.h> 45 #include <asm/irq.h> 46 #include <asm/irq_regs.h> 47 #include <asm/vtimer.h> 48 #include <asm/etr.h> 49 #include <asm/cio.h> 50 #include "entry.h" 51 52 /* change this if you have some constant time drift */ 53 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 54 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 55 56 u64 sched_clock_base_cc = -1; /* Force to data section. */ 57 EXPORT_SYMBOL_GPL(sched_clock_base_cc); 58 59 static DEFINE_PER_CPU(struct clock_event_device, comparators); 60 61 ATOMIC_NOTIFIER_HEAD(s390_epoch_delta_notifier); 62 EXPORT_SYMBOL(s390_epoch_delta_notifier); 63 64 /* 65 * Scheduler clock - returns current time in nanosec units. 66 */ 67 unsigned long long notrace sched_clock(void) 68 { 69 return tod_to_ns(get_tod_clock_monotonic()); 70 } 71 NOKPROBE_SYMBOL(sched_clock); 72 73 /* 74 * Monotonic_clock - returns # of nanoseconds passed since time_init() 75 */ 76 unsigned long long monotonic_clock(void) 77 { 78 return sched_clock(); 79 } 80 EXPORT_SYMBOL(monotonic_clock); 81 82 void tod_to_timeval(__u64 todval, struct timespec64 *xt) 83 { 84 unsigned long long sec; 85 86 sec = todval >> 12; 87 do_div(sec, 1000000); 88 xt->tv_sec = sec; 89 todval -= (sec * 1000000) << 12; 90 xt->tv_nsec = ((todval * 1000) >> 12); 91 } 92 EXPORT_SYMBOL(tod_to_timeval); 93 94 void clock_comparator_work(void) 95 { 96 struct clock_event_device *cd; 97 98 S390_lowcore.clock_comparator = -1ULL; 99 cd = this_cpu_ptr(&comparators); 100 cd->event_handler(cd); 101 } 102 103 /* 104 * Fixup the clock comparator. 105 */ 106 static void fixup_clock_comparator(unsigned long long delta) 107 { 108 /* If nobody is waiting there's nothing to fix. */ 109 if (S390_lowcore.clock_comparator == -1ULL) 110 return; 111 S390_lowcore.clock_comparator += delta; 112 set_clock_comparator(S390_lowcore.clock_comparator); 113 } 114 115 static int s390_next_event(unsigned long delta, 116 struct clock_event_device *evt) 117 { 118 S390_lowcore.clock_comparator = get_tod_clock() + delta; 119 set_clock_comparator(S390_lowcore.clock_comparator); 120 return 0; 121 } 122 123 /* 124 * Set up lowcore and control register of the current cpu to 125 * enable TOD clock and clock comparator interrupts. 126 */ 127 void init_cpu_timer(void) 128 { 129 struct clock_event_device *cd; 130 int cpu; 131 132 S390_lowcore.clock_comparator = -1ULL; 133 set_clock_comparator(S390_lowcore.clock_comparator); 134 135 cpu = smp_processor_id(); 136 cd = &per_cpu(comparators, cpu); 137 cd->name = "comparator"; 138 cd->features = CLOCK_EVT_FEAT_ONESHOT; 139 cd->mult = 16777; 140 cd->shift = 12; 141 cd->min_delta_ns = 1; 142 cd->max_delta_ns = LONG_MAX; 143 cd->rating = 400; 144 cd->cpumask = cpumask_of(cpu); 145 cd->set_next_event = s390_next_event; 146 147 clockevents_register_device(cd); 148 149 /* Enable clock comparator timer interrupt. */ 150 __ctl_set_bit(0,11); 151 152 /* Always allow the timing alert external interrupt. */ 153 __ctl_set_bit(0, 4); 154 } 155 156 static void clock_comparator_interrupt(struct ext_code ext_code, 157 unsigned int param32, 158 unsigned long param64) 159 { 160 inc_irq_stat(IRQEXT_CLK); 161 if (S390_lowcore.clock_comparator == -1ULL) 162 set_clock_comparator(S390_lowcore.clock_comparator); 163 } 164 165 static void etr_timing_alert(struct etr_irq_parm *); 166 static void stp_timing_alert(struct stp_irq_parm *); 167 168 static void timing_alert_interrupt(struct ext_code ext_code, 169 unsigned int param32, unsigned long param64) 170 { 171 inc_irq_stat(IRQEXT_TLA); 172 if (param32 & 0x00c40000) 173 etr_timing_alert((struct etr_irq_parm *) ¶m32); 174 if (param32 & 0x00038000) 175 stp_timing_alert((struct stp_irq_parm *) ¶m32); 176 } 177 178 static void etr_reset(void); 179 static void stp_reset(void); 180 181 void read_persistent_clock64(struct timespec64 *ts) 182 { 183 tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts); 184 } 185 186 void read_boot_clock64(struct timespec64 *ts) 187 { 188 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts); 189 } 190 191 static cycle_t read_tod_clock(struct clocksource *cs) 192 { 193 return get_tod_clock(); 194 } 195 196 static struct clocksource clocksource_tod = { 197 .name = "tod", 198 .rating = 400, 199 .read = read_tod_clock, 200 .mask = -1ULL, 201 .mult = 1000, 202 .shift = 12, 203 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 204 }; 205 206 struct clocksource * __init clocksource_default_clock(void) 207 { 208 return &clocksource_tod; 209 } 210 211 void update_vsyscall(struct timekeeper *tk) 212 { 213 u64 nsecps; 214 215 if (tk->tkr_mono.clock != &clocksource_tod) 216 return; 217 218 /* Make userspace gettimeofday spin until we're done. */ 219 ++vdso_data->tb_update_count; 220 smp_wmb(); 221 vdso_data->xtime_tod_stamp = tk->tkr_mono.cycle_last; 222 vdso_data->xtime_clock_sec = tk->xtime_sec; 223 vdso_data->xtime_clock_nsec = tk->tkr_mono.xtime_nsec; 224 vdso_data->wtom_clock_sec = 225 tk->xtime_sec + tk->wall_to_monotonic.tv_sec; 226 vdso_data->wtom_clock_nsec = tk->tkr_mono.xtime_nsec + 227 + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr_mono.shift); 228 nsecps = (u64) NSEC_PER_SEC << tk->tkr_mono.shift; 229 while (vdso_data->wtom_clock_nsec >= nsecps) { 230 vdso_data->wtom_clock_nsec -= nsecps; 231 vdso_data->wtom_clock_sec++; 232 } 233 234 vdso_data->xtime_coarse_sec = tk->xtime_sec; 235 vdso_data->xtime_coarse_nsec = 236 (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); 237 vdso_data->wtom_coarse_sec = 238 vdso_data->xtime_coarse_sec + tk->wall_to_monotonic.tv_sec; 239 vdso_data->wtom_coarse_nsec = 240 vdso_data->xtime_coarse_nsec + tk->wall_to_monotonic.tv_nsec; 241 while (vdso_data->wtom_coarse_nsec >= NSEC_PER_SEC) { 242 vdso_data->wtom_coarse_nsec -= NSEC_PER_SEC; 243 vdso_data->wtom_coarse_sec++; 244 } 245 246 vdso_data->tk_mult = tk->tkr_mono.mult; 247 vdso_data->tk_shift = tk->tkr_mono.shift; 248 smp_wmb(); 249 ++vdso_data->tb_update_count; 250 } 251 252 extern struct timezone sys_tz; 253 254 void update_vsyscall_tz(void) 255 { 256 /* Make userspace gettimeofday spin until we're done. */ 257 ++vdso_data->tb_update_count; 258 smp_wmb(); 259 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 260 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 261 smp_wmb(); 262 ++vdso_data->tb_update_count; 263 } 264 265 /* 266 * Initialize the TOD clock and the CPU timer of 267 * the boot cpu. 268 */ 269 void __init time_init(void) 270 { 271 /* Reset time synchronization interfaces. */ 272 etr_reset(); 273 stp_reset(); 274 275 /* request the clock comparator external interrupt */ 276 if (register_external_irq(EXT_IRQ_CLK_COMP, clock_comparator_interrupt)) 277 panic("Couldn't request external interrupt 0x1004"); 278 279 /* request the timing alert external interrupt */ 280 if (register_external_irq(EXT_IRQ_TIMING_ALERT, timing_alert_interrupt)) 281 panic("Couldn't request external interrupt 0x1406"); 282 283 if (__clocksource_register(&clocksource_tod) != 0) 284 panic("Could not register TOD clock source"); 285 286 /* Enable TOD clock interrupts on the boot cpu. */ 287 init_cpu_timer(); 288 289 /* Enable cpu timer interrupts on the boot cpu. */ 290 vtime_init(); 291 } 292 293 /* 294 * The time is "clock". old is what we think the time is. 295 * Adjust the value by a multiple of jiffies and add the delta to ntp. 296 * "delay" is an approximation how long the synchronization took. If 297 * the time correction is positive, then "delay" is subtracted from 298 * the time difference and only the remaining part is passed to ntp. 299 */ 300 static unsigned long long adjust_time(unsigned long long old, 301 unsigned long long clock, 302 unsigned long long delay) 303 { 304 unsigned long long delta, ticks; 305 struct timex adjust; 306 307 if (clock > old) { 308 /* It is later than we thought. */ 309 delta = ticks = clock - old; 310 delta = ticks = (delta < delay) ? 0 : delta - delay; 311 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 312 adjust.offset = ticks * (1000000 / HZ); 313 } else { 314 /* It is earlier than we thought. */ 315 delta = ticks = old - clock; 316 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 317 delta = -delta; 318 adjust.offset = -ticks * (1000000 / HZ); 319 } 320 sched_clock_base_cc += delta; 321 if (adjust.offset != 0) { 322 pr_notice("The ETR interface has adjusted the clock " 323 "by %li microseconds\n", adjust.offset); 324 adjust.modes = ADJ_OFFSET_SINGLESHOT; 325 do_adjtimex(&adjust); 326 } 327 return delta; 328 } 329 330 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 331 static DEFINE_MUTEX(clock_sync_mutex); 332 static unsigned long clock_sync_flags; 333 334 #define CLOCK_SYNC_HAS_ETR 0 335 #define CLOCK_SYNC_HAS_STP 1 336 #define CLOCK_SYNC_ETR 2 337 #define CLOCK_SYNC_STP 3 338 339 /* 340 * The synchronous get_clock function. It will write the current clock 341 * value to the clock pointer and return 0 if the clock is in sync with 342 * the external time source. If the clock mode is local it will return 343 * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external 344 * reference. 345 */ 346 int get_sync_clock(unsigned long long *clock) 347 { 348 atomic_t *sw_ptr; 349 unsigned int sw0, sw1; 350 351 sw_ptr = &get_cpu_var(clock_sync_word); 352 sw0 = atomic_read(sw_ptr); 353 *clock = get_tod_clock(); 354 sw1 = atomic_read(sw_ptr); 355 put_cpu_var(clock_sync_word); 356 if (sw0 == sw1 && (sw0 & 0x80000000U)) 357 /* Success: time is in sync. */ 358 return 0; 359 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 360 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 361 return -EOPNOTSUPP; 362 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 363 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 364 return -EACCES; 365 return -EAGAIN; 366 } 367 EXPORT_SYMBOL(get_sync_clock); 368 369 /* 370 * Make get_sync_clock return -EAGAIN. 371 */ 372 static void disable_sync_clock(void *dummy) 373 { 374 atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word); 375 /* 376 * Clear the in-sync bit 2^31. All get_sync_clock calls will 377 * fail until the sync bit is turned back on. In addition 378 * increase the "sequence" counter to avoid the race of an 379 * etr event and the complete recovery against get_sync_clock. 380 */ 381 atomic_andnot(0x80000000, sw_ptr); 382 atomic_inc(sw_ptr); 383 } 384 385 /* 386 * Make get_sync_clock return 0 again. 387 * Needs to be called from a context disabled for preemption. 388 */ 389 static void enable_sync_clock(void) 390 { 391 atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word); 392 atomic_or(0x80000000, sw_ptr); 393 } 394 395 /* 396 * Function to check if the clock is in sync. 397 */ 398 static inline int check_sync_clock(void) 399 { 400 atomic_t *sw_ptr; 401 int rc; 402 403 sw_ptr = &get_cpu_var(clock_sync_word); 404 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 405 put_cpu_var(clock_sync_word); 406 return rc; 407 } 408 409 /* Single threaded workqueue used for etr and stp sync events */ 410 static struct workqueue_struct *time_sync_wq; 411 412 static void __init time_init_wq(void) 413 { 414 if (time_sync_wq) 415 return; 416 time_sync_wq = create_singlethread_workqueue("timesync"); 417 } 418 419 /* 420 * External Time Reference (ETR) code. 421 */ 422 static int etr_port0_online; 423 static int etr_port1_online; 424 static int etr_steai_available; 425 426 static int __init early_parse_etr(char *p) 427 { 428 if (strncmp(p, "off", 3) == 0) 429 etr_port0_online = etr_port1_online = 0; 430 else if (strncmp(p, "port0", 5) == 0) 431 etr_port0_online = 1; 432 else if (strncmp(p, "port1", 5) == 0) 433 etr_port1_online = 1; 434 else if (strncmp(p, "on", 2) == 0) 435 etr_port0_online = etr_port1_online = 1; 436 return 0; 437 } 438 early_param("etr", early_parse_etr); 439 440 enum etr_event { 441 ETR_EVENT_PORT0_CHANGE, 442 ETR_EVENT_PORT1_CHANGE, 443 ETR_EVENT_PORT_ALERT, 444 ETR_EVENT_SYNC_CHECK, 445 ETR_EVENT_SWITCH_LOCAL, 446 ETR_EVENT_UPDATE, 447 }; 448 449 /* 450 * Valid bit combinations of the eacr register are (x = don't care): 451 * e0 e1 dp p0 p1 ea es sl 452 * 0 0 x 0 0 0 0 0 initial, disabled state 453 * 0 0 x 0 1 1 0 0 port 1 online 454 * 0 0 x 1 0 1 0 0 port 0 online 455 * 0 0 x 1 1 1 0 0 both ports online 456 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 457 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 458 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 459 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 460 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 461 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 462 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 463 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 464 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 465 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 466 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 467 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 468 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 469 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 470 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 471 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 472 */ 473 static struct etr_eacr etr_eacr; 474 static u64 etr_tolec; /* time of last eacr update */ 475 static struct etr_aib etr_port0; 476 static int etr_port0_uptodate; 477 static struct etr_aib etr_port1; 478 static int etr_port1_uptodate; 479 static unsigned long etr_events; 480 static struct timer_list etr_timer; 481 482 static void etr_timeout(unsigned long dummy); 483 static void etr_work_fn(struct work_struct *work); 484 static DEFINE_MUTEX(etr_work_mutex); 485 static DECLARE_WORK(etr_work, etr_work_fn); 486 487 /* 488 * Reset ETR attachment. 489 */ 490 static void etr_reset(void) 491 { 492 etr_eacr = (struct etr_eacr) { 493 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 494 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 495 .es = 0, .sl = 0 }; 496 if (etr_setr(&etr_eacr) == 0) { 497 etr_tolec = get_tod_clock(); 498 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 499 if (etr_port0_online && etr_port1_online) 500 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 501 } else if (etr_port0_online || etr_port1_online) { 502 pr_warning("The real or virtual hardware system does " 503 "not provide an ETR interface\n"); 504 etr_port0_online = etr_port1_online = 0; 505 } 506 } 507 508 static int __init etr_init(void) 509 { 510 struct etr_aib aib; 511 512 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 513 return 0; 514 time_init_wq(); 515 /* Check if this machine has the steai instruction. */ 516 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 517 etr_steai_available = 1; 518 setup_timer(&etr_timer, etr_timeout, 0UL); 519 if (etr_port0_online) { 520 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 521 queue_work(time_sync_wq, &etr_work); 522 } 523 if (etr_port1_online) { 524 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 525 queue_work(time_sync_wq, &etr_work); 526 } 527 return 0; 528 } 529 530 arch_initcall(etr_init); 531 532 /* 533 * Two sorts of ETR machine checks. The architecture reads: 534 * "When a machine-check niterruption occurs and if a switch-to-local or 535 * ETR-sync-check interrupt request is pending but disabled, this pending 536 * disabled interruption request is indicated and is cleared". 537 * Which means that we can get etr_switch_to_local events from the machine 538 * check handler although the interruption condition is disabled. Lovely.. 539 */ 540 541 /* 542 * Switch to local machine check. This is called when the last usable 543 * ETR port goes inactive. After switch to local the clock is not in sync. 544 */ 545 void etr_switch_to_local(void) 546 { 547 if (!etr_eacr.sl) 548 return; 549 disable_sync_clock(NULL); 550 if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) { 551 etr_eacr.es = etr_eacr.sl = 0; 552 etr_setr(&etr_eacr); 553 queue_work(time_sync_wq, &etr_work); 554 } 555 } 556 557 /* 558 * ETR sync check machine check. This is called when the ETR OTE and the 559 * local clock OTE are farther apart than the ETR sync check tolerance. 560 * After a ETR sync check the clock is not in sync. The machine check 561 * is broadcasted to all cpus at the same time. 562 */ 563 void etr_sync_check(void) 564 { 565 if (!etr_eacr.es) 566 return; 567 disable_sync_clock(NULL); 568 if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) { 569 etr_eacr.es = 0; 570 etr_setr(&etr_eacr); 571 queue_work(time_sync_wq, &etr_work); 572 } 573 } 574 575 /* 576 * ETR timing alert. There are two causes: 577 * 1) port state change, check the usability of the port 578 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 579 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 580 * or ETR-data word 4 (edf4) has changed. 581 */ 582 static void etr_timing_alert(struct etr_irq_parm *intparm) 583 { 584 if (intparm->pc0) 585 /* ETR port 0 state change. */ 586 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 587 if (intparm->pc1) 588 /* ETR port 1 state change. */ 589 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 590 if (intparm->eai) 591 /* 592 * ETR port alert on either port 0, 1 or both. 593 * Both ports are not up-to-date now. 594 */ 595 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 596 queue_work(time_sync_wq, &etr_work); 597 } 598 599 static void etr_timeout(unsigned long dummy) 600 { 601 set_bit(ETR_EVENT_UPDATE, &etr_events); 602 queue_work(time_sync_wq, &etr_work); 603 } 604 605 /* 606 * Check if the etr mode is pss. 607 */ 608 static inline int etr_mode_is_pps(struct etr_eacr eacr) 609 { 610 return eacr.es && !eacr.sl; 611 } 612 613 /* 614 * Check if the etr mode is etr. 615 */ 616 static inline int etr_mode_is_etr(struct etr_eacr eacr) 617 { 618 return eacr.es && eacr.sl; 619 } 620 621 /* 622 * Check if the port can be used for TOD synchronization. 623 * For PPS mode the port has to receive OTEs. For ETR mode 624 * the port has to receive OTEs, the ETR stepping bit has to 625 * be zero and the validity bits for data frame 1, 2, and 3 626 * have to be 1. 627 */ 628 static int etr_port_valid(struct etr_aib *aib, int port) 629 { 630 unsigned int psc; 631 632 /* Check that this port is receiving OTEs. */ 633 if (aib->tsp == 0) 634 return 0; 635 636 psc = port ? aib->esw.psc1 : aib->esw.psc0; 637 if (psc == etr_lpsc_pps_mode) 638 return 1; 639 if (psc == etr_lpsc_operational_step) 640 return !aib->esw.y && aib->slsw.v1 && 641 aib->slsw.v2 && aib->slsw.v3; 642 return 0; 643 } 644 645 /* 646 * Check if two ports are on the same network. 647 */ 648 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 649 { 650 // FIXME: any other fields we have to compare? 651 return aib1->edf1.net_id == aib2->edf1.net_id; 652 } 653 654 /* 655 * Wrapper for etr_stei that converts physical port states 656 * to logical port states to be consistent with the output 657 * of stetr (see etr_psc vs. etr_lpsc). 658 */ 659 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 660 { 661 BUG_ON(etr_steai(aib, func) != 0); 662 /* Convert port state to logical port state. */ 663 if (aib->esw.psc0 == 1) 664 aib->esw.psc0 = 2; 665 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 666 aib->esw.psc0 = 1; 667 if (aib->esw.psc1 == 1) 668 aib->esw.psc1 = 2; 669 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 670 aib->esw.psc1 = 1; 671 } 672 673 /* 674 * Check if the aib a2 is still connected to the same attachment as 675 * aib a1, the etv values differ by one and a2 is valid. 676 */ 677 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 678 { 679 int state_a1, state_a2; 680 681 /* Paranoia check: e0/e1 should better be the same. */ 682 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 683 a1->esw.eacr.e1 != a2->esw.eacr.e1) 684 return 0; 685 686 /* Still connected to the same etr ? */ 687 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 688 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 689 if (state_a1 == etr_lpsc_operational_step) { 690 if (state_a2 != etr_lpsc_operational_step || 691 a1->edf1.net_id != a2->edf1.net_id || 692 a1->edf1.etr_id != a2->edf1.etr_id || 693 a1->edf1.etr_pn != a2->edf1.etr_pn) 694 return 0; 695 } else if (state_a2 != etr_lpsc_pps_mode) 696 return 0; 697 698 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 699 if (a1->edf2.etv + 1 != a2->edf2.etv) 700 return 0; 701 702 if (!etr_port_valid(a2, p)) 703 return 0; 704 705 return 1; 706 } 707 708 struct clock_sync_data { 709 atomic_t cpus; 710 int in_sync; 711 unsigned long long fixup_cc; 712 int etr_port; 713 struct etr_aib *etr_aib; 714 }; 715 716 static void clock_sync_cpu(struct clock_sync_data *sync) 717 { 718 atomic_dec(&sync->cpus); 719 enable_sync_clock(); 720 /* 721 * This looks like a busy wait loop but it isn't. etr_sync_cpus 722 * is called on all other cpus while the TOD clocks is stopped. 723 * __udelay will stop the cpu on an enabled wait psw until the 724 * TOD is running again. 725 */ 726 while (sync->in_sync == 0) { 727 __udelay(1); 728 /* 729 * A different cpu changes *in_sync. Therefore use 730 * barrier() to force memory access. 731 */ 732 barrier(); 733 } 734 if (sync->in_sync != 1) 735 /* Didn't work. Clear per-cpu in sync bit again. */ 736 disable_sync_clock(NULL); 737 /* 738 * This round of TOD syncing is done. Set the clock comparator 739 * to the next tick and let the processor continue. 740 */ 741 fixup_clock_comparator(sync->fixup_cc); 742 } 743 744 /* 745 * Sync the TOD clock using the port referred to by aibp. This port 746 * has to be enabled and the other port has to be disabled. The 747 * last eacr update has to be more than 1.6 seconds in the past. 748 */ 749 static int etr_sync_clock(void *data) 750 { 751 static int first; 752 unsigned long long clock, old_clock, clock_delta, delay, delta; 753 struct clock_sync_data *etr_sync; 754 struct etr_aib *sync_port, *aib; 755 int port; 756 int rc; 757 758 etr_sync = data; 759 760 if (xchg(&first, 1) == 1) { 761 /* Slave */ 762 clock_sync_cpu(etr_sync); 763 return 0; 764 } 765 766 /* Wait until all other cpus entered the sync function. */ 767 while (atomic_read(&etr_sync->cpus) != 0) 768 cpu_relax(); 769 770 port = etr_sync->etr_port; 771 aib = etr_sync->etr_aib; 772 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 773 enable_sync_clock(); 774 775 /* Set clock to next OTE. */ 776 __ctl_set_bit(14, 21); 777 __ctl_set_bit(0, 29); 778 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 779 old_clock = get_tod_clock(); 780 if (set_tod_clock(clock) == 0) { 781 __udelay(1); /* Wait for the clock to start. */ 782 __ctl_clear_bit(0, 29); 783 __ctl_clear_bit(14, 21); 784 etr_stetr(aib); 785 /* Adjust Linux timing variables. */ 786 delay = (unsigned long long) 787 (aib->edf2.etv - sync_port->edf2.etv) << 32; 788 delta = adjust_time(old_clock, clock, delay); 789 clock_delta = clock - old_clock; 790 atomic_notifier_call_chain(&s390_epoch_delta_notifier, 0, 791 &clock_delta); 792 etr_sync->fixup_cc = delta; 793 fixup_clock_comparator(delta); 794 /* Verify that the clock is properly set. */ 795 if (!etr_aib_follows(sync_port, aib, port)) { 796 /* Didn't work. */ 797 disable_sync_clock(NULL); 798 etr_sync->in_sync = -EAGAIN; 799 rc = -EAGAIN; 800 } else { 801 etr_sync->in_sync = 1; 802 rc = 0; 803 } 804 } else { 805 /* Could not set the clock ?!? */ 806 __ctl_clear_bit(0, 29); 807 __ctl_clear_bit(14, 21); 808 disable_sync_clock(NULL); 809 etr_sync->in_sync = -EAGAIN; 810 rc = -EAGAIN; 811 } 812 xchg(&first, 0); 813 return rc; 814 } 815 816 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 817 { 818 struct clock_sync_data etr_sync; 819 struct etr_aib *sync_port; 820 int follows; 821 int rc; 822 823 /* Check if the current aib is adjacent to the sync port aib. */ 824 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 825 follows = etr_aib_follows(sync_port, aib, port); 826 memcpy(sync_port, aib, sizeof(*aib)); 827 if (!follows) 828 return -EAGAIN; 829 memset(&etr_sync, 0, sizeof(etr_sync)); 830 etr_sync.etr_aib = aib; 831 etr_sync.etr_port = port; 832 get_online_cpus(); 833 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 834 rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask); 835 put_online_cpus(); 836 return rc; 837 } 838 839 /* 840 * Handle the immediate effects of the different events. 841 * The port change event is used for online/offline changes. 842 */ 843 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 844 { 845 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 846 eacr.es = 0; 847 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 848 eacr.es = eacr.sl = 0; 849 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 850 etr_port0_uptodate = etr_port1_uptodate = 0; 851 852 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 853 if (eacr.e0) 854 /* 855 * Port change of an enabled port. We have to 856 * assume that this can have caused an stepping 857 * port switch. 858 */ 859 etr_tolec = get_tod_clock(); 860 eacr.p0 = etr_port0_online; 861 if (!eacr.p0) 862 eacr.e0 = 0; 863 etr_port0_uptodate = 0; 864 } 865 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 866 if (eacr.e1) 867 /* 868 * Port change of an enabled port. We have to 869 * assume that this can have caused an stepping 870 * port switch. 871 */ 872 etr_tolec = get_tod_clock(); 873 eacr.p1 = etr_port1_online; 874 if (!eacr.p1) 875 eacr.e1 = 0; 876 etr_port1_uptodate = 0; 877 } 878 clear_bit(ETR_EVENT_UPDATE, &etr_events); 879 return eacr; 880 } 881 882 /* 883 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 884 * one of the ports needs an update. 885 */ 886 static void etr_set_tolec_timeout(unsigned long long now) 887 { 888 unsigned long micros; 889 890 if ((!etr_eacr.p0 || etr_port0_uptodate) && 891 (!etr_eacr.p1 || etr_port1_uptodate)) 892 return; 893 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 894 micros = (micros > 1600000) ? 0 : 1600000 - micros; 895 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 896 } 897 898 /* 899 * Set up a time that expires after 1/2 second. 900 */ 901 static void etr_set_sync_timeout(void) 902 { 903 mod_timer(&etr_timer, jiffies + HZ/2); 904 } 905 906 /* 907 * Update the aib information for one or both ports. 908 */ 909 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 910 struct etr_eacr eacr) 911 { 912 /* With both ports disabled the aib information is useless. */ 913 if (!eacr.e0 && !eacr.e1) 914 return eacr; 915 916 /* Update port0 or port1 with aib stored in etr_work_fn. */ 917 if (aib->esw.q == 0) { 918 /* Information for port 0 stored. */ 919 if (eacr.p0 && !etr_port0_uptodate) { 920 etr_port0 = *aib; 921 if (etr_port0_online) 922 etr_port0_uptodate = 1; 923 } 924 } else { 925 /* Information for port 1 stored. */ 926 if (eacr.p1 && !etr_port1_uptodate) { 927 etr_port1 = *aib; 928 if (etr_port0_online) 929 etr_port1_uptodate = 1; 930 } 931 } 932 933 /* 934 * Do not try to get the alternate port aib if the clock 935 * is not in sync yet. 936 */ 937 if (!eacr.es || !check_sync_clock()) 938 return eacr; 939 940 /* 941 * If steai is available we can get the information about 942 * the other port immediately. If only stetr is available the 943 * data-port bit toggle has to be used. 944 */ 945 if (etr_steai_available) { 946 if (eacr.p0 && !etr_port0_uptodate) { 947 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 948 etr_port0_uptodate = 1; 949 } 950 if (eacr.p1 && !etr_port1_uptodate) { 951 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 952 etr_port1_uptodate = 1; 953 } 954 } else { 955 /* 956 * One port was updated above, if the other 957 * port is not uptodate toggle dp bit. 958 */ 959 if ((eacr.p0 && !etr_port0_uptodate) || 960 (eacr.p1 && !etr_port1_uptodate)) 961 eacr.dp ^= 1; 962 else 963 eacr.dp = 0; 964 } 965 return eacr; 966 } 967 968 /* 969 * Write new etr control register if it differs from the current one. 970 * Return 1 if etr_tolec has been updated as well. 971 */ 972 static void etr_update_eacr(struct etr_eacr eacr) 973 { 974 int dp_changed; 975 976 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 977 /* No change, return. */ 978 return; 979 /* 980 * The disable of an active port of the change of the data port 981 * bit can/will cause a change in the data port. 982 */ 983 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 984 (etr_eacr.dp ^ eacr.dp) != 0; 985 etr_eacr = eacr; 986 etr_setr(&etr_eacr); 987 if (dp_changed) 988 etr_tolec = get_tod_clock(); 989 } 990 991 /* 992 * ETR work. In this function you'll find the main logic. In 993 * particular this is the only function that calls etr_update_eacr(), 994 * it "controls" the etr control register. 995 */ 996 static void etr_work_fn(struct work_struct *work) 997 { 998 unsigned long long now; 999 struct etr_eacr eacr; 1000 struct etr_aib aib; 1001 int sync_port; 1002 1003 /* prevent multiple execution. */ 1004 mutex_lock(&etr_work_mutex); 1005 1006 /* Create working copy of etr_eacr. */ 1007 eacr = etr_eacr; 1008 1009 /* Check for the different events and their immediate effects. */ 1010 eacr = etr_handle_events(eacr); 1011 1012 /* Check if ETR is supposed to be active. */ 1013 eacr.ea = eacr.p0 || eacr.p1; 1014 if (!eacr.ea) { 1015 /* Both ports offline. Reset everything. */ 1016 eacr.dp = eacr.es = eacr.sl = 0; 1017 on_each_cpu(disable_sync_clock, NULL, 1); 1018 del_timer_sync(&etr_timer); 1019 etr_update_eacr(eacr); 1020 goto out_unlock; 1021 } 1022 1023 /* Store aib to get the current ETR status word. */ 1024 BUG_ON(etr_stetr(&aib) != 0); 1025 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1026 now = get_tod_clock(); 1027 1028 /* 1029 * Update the port information if the last stepping port change 1030 * or data port change is older than 1.6 seconds. 1031 */ 1032 if (now >= etr_tolec + (1600000 << 12)) 1033 eacr = etr_handle_update(&aib, eacr); 1034 1035 /* 1036 * Select ports to enable. The preferred synchronization mode is PPS. 1037 * If a port can be enabled depends on a number of things: 1038 * 1) The port needs to be online and uptodate. A port is not 1039 * disabled just because it is not uptodate, but it is only 1040 * enabled if it is uptodate. 1041 * 2) The port needs to have the same mode (pps / etr). 1042 * 3) The port needs to be usable -> etr_port_valid() == 1 1043 * 4) To enable the second port the clock needs to be in sync. 1044 * 5) If both ports are useable and are ETR ports, the network id 1045 * has to be the same. 1046 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1047 */ 1048 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1049 eacr.sl = 0; 1050 eacr.e0 = 1; 1051 if (!etr_mode_is_pps(etr_eacr)) 1052 eacr.es = 0; 1053 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1054 eacr.e1 = 0; 1055 // FIXME: uptodate checks ? 1056 else if (etr_port0_uptodate && etr_port1_uptodate) 1057 eacr.e1 = 1; 1058 sync_port = (etr_port0_uptodate && 1059 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1060 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1061 eacr.sl = 0; 1062 eacr.e0 = 0; 1063 eacr.e1 = 1; 1064 if (!etr_mode_is_pps(etr_eacr)) 1065 eacr.es = 0; 1066 sync_port = (etr_port1_uptodate && 1067 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1068 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1069 eacr.sl = 1; 1070 eacr.e0 = 1; 1071 if (!etr_mode_is_etr(etr_eacr)) 1072 eacr.es = 0; 1073 if (!eacr.es || !eacr.p1 || 1074 aib.esw.psc1 != etr_lpsc_operational_alt) 1075 eacr.e1 = 0; 1076 else if (etr_port0_uptodate && etr_port1_uptodate && 1077 etr_compare_network(&etr_port0, &etr_port1)) 1078 eacr.e1 = 1; 1079 sync_port = (etr_port0_uptodate && 1080 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1081 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1082 eacr.sl = 1; 1083 eacr.e0 = 0; 1084 eacr.e1 = 1; 1085 if (!etr_mode_is_etr(etr_eacr)) 1086 eacr.es = 0; 1087 sync_port = (etr_port1_uptodate && 1088 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1089 } else { 1090 /* Both ports not usable. */ 1091 eacr.es = eacr.sl = 0; 1092 sync_port = -1; 1093 } 1094 1095 /* 1096 * If the clock is in sync just update the eacr and return. 1097 * If there is no valid sync port wait for a port update. 1098 */ 1099 if ((eacr.es && check_sync_clock()) || sync_port < 0) { 1100 etr_update_eacr(eacr); 1101 etr_set_tolec_timeout(now); 1102 goto out_unlock; 1103 } 1104 1105 /* 1106 * Prepare control register for clock syncing 1107 * (reset data port bit, set sync check control. 1108 */ 1109 eacr.dp = 0; 1110 eacr.es = 1; 1111 1112 /* 1113 * Update eacr and try to synchronize the clock. If the update 1114 * of eacr caused a stepping port switch (or if we have to 1115 * assume that a stepping port switch has occurred) or the 1116 * clock syncing failed, reset the sync check control bit 1117 * and set up a timer to try again after 0.5 seconds 1118 */ 1119 etr_update_eacr(eacr); 1120 if (now < etr_tolec + (1600000 << 12) || 1121 etr_sync_clock_stop(&aib, sync_port) != 0) { 1122 /* Sync failed. Try again in 1/2 second. */ 1123 eacr.es = 0; 1124 etr_update_eacr(eacr); 1125 etr_set_sync_timeout(); 1126 } else 1127 etr_set_tolec_timeout(now); 1128 out_unlock: 1129 mutex_unlock(&etr_work_mutex); 1130 } 1131 1132 /* 1133 * Sysfs interface functions 1134 */ 1135 static struct bus_type etr_subsys = { 1136 .name = "etr", 1137 .dev_name = "etr", 1138 }; 1139 1140 static struct device etr_port0_dev = { 1141 .id = 0, 1142 .bus = &etr_subsys, 1143 }; 1144 1145 static struct device etr_port1_dev = { 1146 .id = 1, 1147 .bus = &etr_subsys, 1148 }; 1149 1150 /* 1151 * ETR subsys attributes 1152 */ 1153 static ssize_t etr_stepping_port_show(struct device *dev, 1154 struct device_attribute *attr, 1155 char *buf) 1156 { 1157 return sprintf(buf, "%i\n", etr_port0.esw.p); 1158 } 1159 1160 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1161 1162 static ssize_t etr_stepping_mode_show(struct device *dev, 1163 struct device_attribute *attr, 1164 char *buf) 1165 { 1166 char *mode_str; 1167 1168 if (etr_mode_is_pps(etr_eacr)) 1169 mode_str = "pps"; 1170 else if (etr_mode_is_etr(etr_eacr)) 1171 mode_str = "etr"; 1172 else 1173 mode_str = "local"; 1174 return sprintf(buf, "%s\n", mode_str); 1175 } 1176 1177 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1178 1179 /* 1180 * ETR port attributes 1181 */ 1182 static inline struct etr_aib *etr_aib_from_dev(struct device *dev) 1183 { 1184 if (dev == &etr_port0_dev) 1185 return etr_port0_online ? &etr_port0 : NULL; 1186 else 1187 return etr_port1_online ? &etr_port1 : NULL; 1188 } 1189 1190 static ssize_t etr_online_show(struct device *dev, 1191 struct device_attribute *attr, 1192 char *buf) 1193 { 1194 unsigned int online; 1195 1196 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1197 return sprintf(buf, "%i\n", online); 1198 } 1199 1200 static ssize_t etr_online_store(struct device *dev, 1201 struct device_attribute *attr, 1202 const char *buf, size_t count) 1203 { 1204 unsigned int value; 1205 1206 value = simple_strtoul(buf, NULL, 0); 1207 if (value != 0 && value != 1) 1208 return -EINVAL; 1209 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1210 return -EOPNOTSUPP; 1211 mutex_lock(&clock_sync_mutex); 1212 if (dev == &etr_port0_dev) { 1213 if (etr_port0_online == value) 1214 goto out; /* Nothing to do. */ 1215 etr_port0_online = value; 1216 if (etr_port0_online && etr_port1_online) 1217 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1218 else 1219 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1220 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1221 queue_work(time_sync_wq, &etr_work); 1222 } else { 1223 if (etr_port1_online == value) 1224 goto out; /* Nothing to do. */ 1225 etr_port1_online = value; 1226 if (etr_port0_online && etr_port1_online) 1227 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1228 else 1229 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1230 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1231 queue_work(time_sync_wq, &etr_work); 1232 } 1233 out: 1234 mutex_unlock(&clock_sync_mutex); 1235 return count; 1236 } 1237 1238 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store); 1239 1240 static ssize_t etr_stepping_control_show(struct device *dev, 1241 struct device_attribute *attr, 1242 char *buf) 1243 { 1244 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1245 etr_eacr.e0 : etr_eacr.e1); 1246 } 1247 1248 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1249 1250 static ssize_t etr_mode_code_show(struct device *dev, 1251 struct device_attribute *attr, char *buf) 1252 { 1253 if (!etr_port0_online && !etr_port1_online) 1254 /* Status word is not uptodate if both ports are offline. */ 1255 return -ENODATA; 1256 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1257 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1258 } 1259 1260 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1261 1262 static ssize_t etr_untuned_show(struct device *dev, 1263 struct device_attribute *attr, char *buf) 1264 { 1265 struct etr_aib *aib = etr_aib_from_dev(dev); 1266 1267 if (!aib || !aib->slsw.v1) 1268 return -ENODATA; 1269 return sprintf(buf, "%i\n", aib->edf1.u); 1270 } 1271 1272 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL); 1273 1274 static ssize_t etr_network_id_show(struct device *dev, 1275 struct device_attribute *attr, char *buf) 1276 { 1277 struct etr_aib *aib = etr_aib_from_dev(dev); 1278 1279 if (!aib || !aib->slsw.v1) 1280 return -ENODATA; 1281 return sprintf(buf, "%i\n", aib->edf1.net_id); 1282 } 1283 1284 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL); 1285 1286 static ssize_t etr_id_show(struct device *dev, 1287 struct device_attribute *attr, char *buf) 1288 { 1289 struct etr_aib *aib = etr_aib_from_dev(dev); 1290 1291 if (!aib || !aib->slsw.v1) 1292 return -ENODATA; 1293 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1294 } 1295 1296 static DEVICE_ATTR(id, 0400, etr_id_show, NULL); 1297 1298 static ssize_t etr_port_number_show(struct device *dev, 1299 struct device_attribute *attr, char *buf) 1300 { 1301 struct etr_aib *aib = etr_aib_from_dev(dev); 1302 1303 if (!aib || !aib->slsw.v1) 1304 return -ENODATA; 1305 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1306 } 1307 1308 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL); 1309 1310 static ssize_t etr_coupled_show(struct device *dev, 1311 struct device_attribute *attr, char *buf) 1312 { 1313 struct etr_aib *aib = etr_aib_from_dev(dev); 1314 1315 if (!aib || !aib->slsw.v3) 1316 return -ENODATA; 1317 return sprintf(buf, "%i\n", aib->edf3.c); 1318 } 1319 1320 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL); 1321 1322 static ssize_t etr_local_time_show(struct device *dev, 1323 struct device_attribute *attr, char *buf) 1324 { 1325 struct etr_aib *aib = etr_aib_from_dev(dev); 1326 1327 if (!aib || !aib->slsw.v3) 1328 return -ENODATA; 1329 return sprintf(buf, "%i\n", aib->edf3.blto); 1330 } 1331 1332 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL); 1333 1334 static ssize_t etr_utc_offset_show(struct device *dev, 1335 struct device_attribute *attr, char *buf) 1336 { 1337 struct etr_aib *aib = etr_aib_from_dev(dev); 1338 1339 if (!aib || !aib->slsw.v3) 1340 return -ENODATA; 1341 return sprintf(buf, "%i\n", aib->edf3.buo); 1342 } 1343 1344 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1345 1346 static struct device_attribute *etr_port_attributes[] = { 1347 &dev_attr_online, 1348 &dev_attr_stepping_control, 1349 &dev_attr_state_code, 1350 &dev_attr_untuned, 1351 &dev_attr_network, 1352 &dev_attr_id, 1353 &dev_attr_port, 1354 &dev_attr_coupled, 1355 &dev_attr_local_time, 1356 &dev_attr_utc_offset, 1357 NULL 1358 }; 1359 1360 static int __init etr_register_port(struct device *dev) 1361 { 1362 struct device_attribute **attr; 1363 int rc; 1364 1365 rc = device_register(dev); 1366 if (rc) 1367 goto out; 1368 for (attr = etr_port_attributes; *attr; attr++) { 1369 rc = device_create_file(dev, *attr); 1370 if (rc) 1371 goto out_unreg; 1372 } 1373 return 0; 1374 out_unreg: 1375 for (; attr >= etr_port_attributes; attr--) 1376 device_remove_file(dev, *attr); 1377 device_unregister(dev); 1378 out: 1379 return rc; 1380 } 1381 1382 static void __init etr_unregister_port(struct device *dev) 1383 { 1384 struct device_attribute **attr; 1385 1386 for (attr = etr_port_attributes; *attr; attr++) 1387 device_remove_file(dev, *attr); 1388 device_unregister(dev); 1389 } 1390 1391 static int __init etr_init_sysfs(void) 1392 { 1393 int rc; 1394 1395 rc = subsys_system_register(&etr_subsys, NULL); 1396 if (rc) 1397 goto out; 1398 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port); 1399 if (rc) 1400 goto out_unreg_subsys; 1401 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode); 1402 if (rc) 1403 goto out_remove_stepping_port; 1404 rc = etr_register_port(&etr_port0_dev); 1405 if (rc) 1406 goto out_remove_stepping_mode; 1407 rc = etr_register_port(&etr_port1_dev); 1408 if (rc) 1409 goto out_remove_port0; 1410 return 0; 1411 1412 out_remove_port0: 1413 etr_unregister_port(&etr_port0_dev); 1414 out_remove_stepping_mode: 1415 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode); 1416 out_remove_stepping_port: 1417 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port); 1418 out_unreg_subsys: 1419 bus_unregister(&etr_subsys); 1420 out: 1421 return rc; 1422 } 1423 1424 device_initcall(etr_init_sysfs); 1425 1426 /* 1427 * Server Time Protocol (STP) code. 1428 */ 1429 static int stp_online; 1430 static struct stp_sstpi stp_info; 1431 static void *stp_page; 1432 1433 static void stp_work_fn(struct work_struct *work); 1434 static DEFINE_MUTEX(stp_work_mutex); 1435 static DECLARE_WORK(stp_work, stp_work_fn); 1436 static struct timer_list stp_timer; 1437 1438 static int __init early_parse_stp(char *p) 1439 { 1440 if (strncmp(p, "off", 3) == 0) 1441 stp_online = 0; 1442 else if (strncmp(p, "on", 2) == 0) 1443 stp_online = 1; 1444 return 0; 1445 } 1446 early_param("stp", early_parse_stp); 1447 1448 /* 1449 * Reset STP attachment. 1450 */ 1451 static void __init stp_reset(void) 1452 { 1453 int rc; 1454 1455 stp_page = (void *) get_zeroed_page(GFP_ATOMIC); 1456 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1457 if (rc == 0) 1458 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1459 else if (stp_online) { 1460 pr_warning("The real or virtual hardware system does " 1461 "not provide an STP interface\n"); 1462 free_page((unsigned long) stp_page); 1463 stp_page = NULL; 1464 stp_online = 0; 1465 } 1466 } 1467 1468 static void stp_timeout(unsigned long dummy) 1469 { 1470 queue_work(time_sync_wq, &stp_work); 1471 } 1472 1473 static int __init stp_init(void) 1474 { 1475 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1476 return 0; 1477 setup_timer(&stp_timer, stp_timeout, 0UL); 1478 time_init_wq(); 1479 if (!stp_online) 1480 return 0; 1481 queue_work(time_sync_wq, &stp_work); 1482 return 0; 1483 } 1484 1485 arch_initcall(stp_init); 1486 1487 /* 1488 * STP timing alert. There are three causes: 1489 * 1) timing status change 1490 * 2) link availability change 1491 * 3) time control parameter change 1492 * In all three cases we are only interested in the clock source state. 1493 * If a STP clock source is now available use it. 1494 */ 1495 static void stp_timing_alert(struct stp_irq_parm *intparm) 1496 { 1497 if (intparm->tsc || intparm->lac || intparm->tcpc) 1498 queue_work(time_sync_wq, &stp_work); 1499 } 1500 1501 /* 1502 * STP sync check machine check. This is called when the timing state 1503 * changes from the synchronized state to the unsynchronized state. 1504 * After a STP sync check the clock is not in sync. The machine check 1505 * is broadcasted to all cpus at the same time. 1506 */ 1507 void stp_sync_check(void) 1508 { 1509 disable_sync_clock(NULL); 1510 queue_work(time_sync_wq, &stp_work); 1511 } 1512 1513 /* 1514 * STP island condition machine check. This is called when an attached 1515 * server attempts to communicate over an STP link and the servers 1516 * have matching CTN ids and have a valid stratum-1 configuration 1517 * but the configurations do not match. 1518 */ 1519 void stp_island_check(void) 1520 { 1521 disable_sync_clock(NULL); 1522 queue_work(time_sync_wq, &stp_work); 1523 } 1524 1525 1526 static int stp_sync_clock(void *data) 1527 { 1528 static int first; 1529 unsigned long long old_clock, delta, new_clock, clock_delta; 1530 struct clock_sync_data *stp_sync; 1531 int rc; 1532 1533 stp_sync = data; 1534 1535 if (xchg(&first, 1) == 1) { 1536 /* Slave */ 1537 clock_sync_cpu(stp_sync); 1538 return 0; 1539 } 1540 1541 /* Wait until all other cpus entered the sync function. */ 1542 while (atomic_read(&stp_sync->cpus) != 0) 1543 cpu_relax(); 1544 1545 enable_sync_clock(); 1546 1547 rc = 0; 1548 if (stp_info.todoff[0] || stp_info.todoff[1] || 1549 stp_info.todoff[2] || stp_info.todoff[3] || 1550 stp_info.tmd != 2) { 1551 old_clock = get_tod_clock(); 1552 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1553 if (rc == 0) { 1554 new_clock = get_tod_clock(); 1555 delta = adjust_time(old_clock, new_clock, 0); 1556 clock_delta = new_clock - old_clock; 1557 atomic_notifier_call_chain(&s390_epoch_delta_notifier, 1558 0, &clock_delta); 1559 fixup_clock_comparator(delta); 1560 rc = chsc_sstpi(stp_page, &stp_info, 1561 sizeof(struct stp_sstpi)); 1562 if (rc == 0 && stp_info.tmd != 2) 1563 rc = -EAGAIN; 1564 } 1565 } 1566 if (rc) { 1567 disable_sync_clock(NULL); 1568 stp_sync->in_sync = -EAGAIN; 1569 } else 1570 stp_sync->in_sync = 1; 1571 xchg(&first, 0); 1572 return 0; 1573 } 1574 1575 /* 1576 * STP work. Check for the STP state and take over the clock 1577 * synchronization if the STP clock source is usable. 1578 */ 1579 static void stp_work_fn(struct work_struct *work) 1580 { 1581 struct clock_sync_data stp_sync; 1582 int rc; 1583 1584 /* prevent multiple execution. */ 1585 mutex_lock(&stp_work_mutex); 1586 1587 if (!stp_online) { 1588 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1589 del_timer_sync(&stp_timer); 1590 goto out_unlock; 1591 } 1592 1593 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1594 if (rc) 1595 goto out_unlock; 1596 1597 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1598 if (rc || stp_info.c == 0) 1599 goto out_unlock; 1600 1601 /* Skip synchronization if the clock is already in sync. */ 1602 if (check_sync_clock()) 1603 goto out_unlock; 1604 1605 memset(&stp_sync, 0, sizeof(stp_sync)); 1606 get_online_cpus(); 1607 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1608 stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask); 1609 put_online_cpus(); 1610 1611 if (!check_sync_clock()) 1612 /* 1613 * There is a usable clock but the synchonization failed. 1614 * Retry after a second. 1615 */ 1616 mod_timer(&stp_timer, jiffies + HZ); 1617 1618 out_unlock: 1619 mutex_unlock(&stp_work_mutex); 1620 } 1621 1622 /* 1623 * STP subsys sysfs interface functions 1624 */ 1625 static struct bus_type stp_subsys = { 1626 .name = "stp", 1627 .dev_name = "stp", 1628 }; 1629 1630 static ssize_t stp_ctn_id_show(struct device *dev, 1631 struct device_attribute *attr, 1632 char *buf) 1633 { 1634 if (!stp_online) 1635 return -ENODATA; 1636 return sprintf(buf, "%016llx\n", 1637 *(unsigned long long *) stp_info.ctnid); 1638 } 1639 1640 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1641 1642 static ssize_t stp_ctn_type_show(struct device *dev, 1643 struct device_attribute *attr, 1644 char *buf) 1645 { 1646 if (!stp_online) 1647 return -ENODATA; 1648 return sprintf(buf, "%i\n", stp_info.ctn); 1649 } 1650 1651 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1652 1653 static ssize_t stp_dst_offset_show(struct device *dev, 1654 struct device_attribute *attr, 1655 char *buf) 1656 { 1657 if (!stp_online || !(stp_info.vbits & 0x2000)) 1658 return -ENODATA; 1659 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1660 } 1661 1662 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1663 1664 static ssize_t stp_leap_seconds_show(struct device *dev, 1665 struct device_attribute *attr, 1666 char *buf) 1667 { 1668 if (!stp_online || !(stp_info.vbits & 0x8000)) 1669 return -ENODATA; 1670 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1671 } 1672 1673 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1674 1675 static ssize_t stp_stratum_show(struct device *dev, 1676 struct device_attribute *attr, 1677 char *buf) 1678 { 1679 if (!stp_online) 1680 return -ENODATA; 1681 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1682 } 1683 1684 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL); 1685 1686 static ssize_t stp_time_offset_show(struct device *dev, 1687 struct device_attribute *attr, 1688 char *buf) 1689 { 1690 if (!stp_online || !(stp_info.vbits & 0x0800)) 1691 return -ENODATA; 1692 return sprintf(buf, "%i\n", (int) stp_info.tto); 1693 } 1694 1695 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1696 1697 static ssize_t stp_time_zone_offset_show(struct device *dev, 1698 struct device_attribute *attr, 1699 char *buf) 1700 { 1701 if (!stp_online || !(stp_info.vbits & 0x4000)) 1702 return -ENODATA; 1703 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1704 } 1705 1706 static DEVICE_ATTR(time_zone_offset, 0400, 1707 stp_time_zone_offset_show, NULL); 1708 1709 static ssize_t stp_timing_mode_show(struct device *dev, 1710 struct device_attribute *attr, 1711 char *buf) 1712 { 1713 if (!stp_online) 1714 return -ENODATA; 1715 return sprintf(buf, "%i\n", stp_info.tmd); 1716 } 1717 1718 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1719 1720 static ssize_t stp_timing_state_show(struct device *dev, 1721 struct device_attribute *attr, 1722 char *buf) 1723 { 1724 if (!stp_online) 1725 return -ENODATA; 1726 return sprintf(buf, "%i\n", stp_info.tst); 1727 } 1728 1729 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1730 1731 static ssize_t stp_online_show(struct device *dev, 1732 struct device_attribute *attr, 1733 char *buf) 1734 { 1735 return sprintf(buf, "%i\n", stp_online); 1736 } 1737 1738 static ssize_t stp_online_store(struct device *dev, 1739 struct device_attribute *attr, 1740 const char *buf, size_t count) 1741 { 1742 unsigned int value; 1743 1744 value = simple_strtoul(buf, NULL, 0); 1745 if (value != 0 && value != 1) 1746 return -EINVAL; 1747 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1748 return -EOPNOTSUPP; 1749 mutex_lock(&clock_sync_mutex); 1750 stp_online = value; 1751 if (stp_online) 1752 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1753 else 1754 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1755 queue_work(time_sync_wq, &stp_work); 1756 mutex_unlock(&clock_sync_mutex); 1757 return count; 1758 } 1759 1760 /* 1761 * Can't use DEVICE_ATTR because the attribute should be named 1762 * stp/online but dev_attr_online already exists in this file .. 1763 */ 1764 static struct device_attribute dev_attr_stp_online = { 1765 .attr = { .name = "online", .mode = 0600 }, 1766 .show = stp_online_show, 1767 .store = stp_online_store, 1768 }; 1769 1770 static struct device_attribute *stp_attributes[] = { 1771 &dev_attr_ctn_id, 1772 &dev_attr_ctn_type, 1773 &dev_attr_dst_offset, 1774 &dev_attr_leap_seconds, 1775 &dev_attr_stp_online, 1776 &dev_attr_stratum, 1777 &dev_attr_time_offset, 1778 &dev_attr_time_zone_offset, 1779 &dev_attr_timing_mode, 1780 &dev_attr_timing_state, 1781 NULL 1782 }; 1783 1784 static int __init stp_init_sysfs(void) 1785 { 1786 struct device_attribute **attr; 1787 int rc; 1788 1789 rc = subsys_system_register(&stp_subsys, NULL); 1790 if (rc) 1791 goto out; 1792 for (attr = stp_attributes; *attr; attr++) { 1793 rc = device_create_file(stp_subsys.dev_root, *attr); 1794 if (rc) 1795 goto out_unreg; 1796 } 1797 return 0; 1798 out_unreg: 1799 for (; attr >= stp_attributes; attr--) 1800 device_remove_file(stp_subsys.dev_root, *attr); 1801 bus_unregister(&stp_subsys); 1802 out: 1803 return rc; 1804 } 1805 1806 device_initcall(stp_init_sysfs); 1807