1 /* 2 * arch/s390/kernel/time.c 3 * Time of day based timer functions. 4 * 5 * S390 version 6 * Copyright IBM Corp. 1999, 2008 7 * Author(s): Hartmut Penner (hp@de.ibm.com), 8 * Martin Schwidefsky (schwidefsky@de.ibm.com), 9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 10 * 11 * Derived from "arch/i386/kernel/time.c" 12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 13 */ 14 15 #define KMSG_COMPONENT "time" 16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 17 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/sysdev.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/clocksource.h> 38 #include <linux/clockchips.h> 39 #include <linux/bootmem.h> 40 #include <asm/uaccess.h> 41 #include <asm/delay.h> 42 #include <asm/s390_ext.h> 43 #include <asm/div64.h> 44 #include <asm/vdso.h> 45 #include <asm/irq.h> 46 #include <asm/irq_regs.h> 47 #include <asm/timer.h> 48 #include <asm/etr.h> 49 #include <asm/cio.h> 50 51 /* change this if you have some constant time drift */ 52 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 53 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 54 55 /* 56 * Create a small time difference between the timer interrupts 57 * on the different cpus to avoid lock contention. 58 */ 59 #define CPU_DEVIATION (smp_processor_id() << 12) 60 61 #define TICK_SIZE tick 62 63 u64 sched_clock_base_cc = -1; /* Force to data section. */ 64 65 static ext_int_info_t ext_int_info_cc; 66 static ext_int_info_t ext_int_etr_cc; 67 68 static DEFINE_PER_CPU(struct clock_event_device, comparators); 69 70 /* 71 * Scheduler clock - returns current time in nanosec units. 72 */ 73 unsigned long long sched_clock(void) 74 { 75 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9; 76 } 77 78 /* 79 * Monotonic_clock - returns # of nanoseconds passed since time_init() 80 */ 81 unsigned long long monotonic_clock(void) 82 { 83 return sched_clock(); 84 } 85 EXPORT_SYMBOL(monotonic_clock); 86 87 void tod_to_timeval(__u64 todval, struct timespec *xtime) 88 { 89 unsigned long long sec; 90 91 sec = todval >> 12; 92 do_div(sec, 1000000); 93 xtime->tv_sec = sec; 94 todval -= (sec * 1000000) << 12; 95 xtime->tv_nsec = ((todval * 1000) >> 12); 96 } 97 98 #ifdef CONFIG_PROFILING 99 #define s390_do_profile() profile_tick(CPU_PROFILING) 100 #else 101 #define s390_do_profile() do { ; } while(0) 102 #endif /* CONFIG_PROFILING */ 103 104 void clock_comparator_work(void) 105 { 106 struct clock_event_device *cd; 107 108 S390_lowcore.clock_comparator = -1ULL; 109 set_clock_comparator(S390_lowcore.clock_comparator); 110 cd = &__get_cpu_var(comparators); 111 cd->event_handler(cd); 112 s390_do_profile(); 113 } 114 115 /* 116 * Fixup the clock comparator. 117 */ 118 static void fixup_clock_comparator(unsigned long long delta) 119 { 120 /* If nobody is waiting there's nothing to fix. */ 121 if (S390_lowcore.clock_comparator == -1ULL) 122 return; 123 S390_lowcore.clock_comparator += delta; 124 set_clock_comparator(S390_lowcore.clock_comparator); 125 } 126 127 static int s390_next_event(unsigned long delta, 128 struct clock_event_device *evt) 129 { 130 S390_lowcore.clock_comparator = get_clock() + delta; 131 set_clock_comparator(S390_lowcore.clock_comparator); 132 return 0; 133 } 134 135 static void s390_set_mode(enum clock_event_mode mode, 136 struct clock_event_device *evt) 137 { 138 } 139 140 /* 141 * Set up lowcore and control register of the current cpu to 142 * enable TOD clock and clock comparator interrupts. 143 */ 144 void init_cpu_timer(void) 145 { 146 struct clock_event_device *cd; 147 int cpu; 148 149 S390_lowcore.clock_comparator = -1ULL; 150 set_clock_comparator(S390_lowcore.clock_comparator); 151 152 cpu = smp_processor_id(); 153 cd = &per_cpu(comparators, cpu); 154 cd->name = "comparator"; 155 cd->features = CLOCK_EVT_FEAT_ONESHOT; 156 cd->mult = 16777; 157 cd->shift = 12; 158 cd->min_delta_ns = 1; 159 cd->max_delta_ns = LONG_MAX; 160 cd->rating = 400; 161 cd->cpumask = cpumask_of(cpu); 162 cd->set_next_event = s390_next_event; 163 cd->set_mode = s390_set_mode; 164 165 clockevents_register_device(cd); 166 167 /* Enable clock comparator timer interrupt. */ 168 __ctl_set_bit(0,11); 169 170 /* Always allow the timing alert external interrupt. */ 171 __ctl_set_bit(0, 4); 172 } 173 174 static void clock_comparator_interrupt(__u16 code) 175 { 176 if (S390_lowcore.clock_comparator == -1ULL) 177 set_clock_comparator(S390_lowcore.clock_comparator); 178 } 179 180 static void etr_timing_alert(struct etr_irq_parm *); 181 static void stp_timing_alert(struct stp_irq_parm *); 182 183 static void timing_alert_interrupt(__u16 code) 184 { 185 if (S390_lowcore.ext_params & 0x00c40000) 186 etr_timing_alert((struct etr_irq_parm *) 187 &S390_lowcore.ext_params); 188 if (S390_lowcore.ext_params & 0x00038000) 189 stp_timing_alert((struct stp_irq_parm *) 190 &S390_lowcore.ext_params); 191 } 192 193 static void etr_reset(void); 194 static void stp_reset(void); 195 196 unsigned long read_persistent_clock(void) 197 { 198 struct timespec ts; 199 200 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts); 201 return ts.tv_sec; 202 } 203 204 static cycle_t read_tod_clock(struct clocksource *cs) 205 { 206 return get_clock(); 207 } 208 209 static struct clocksource clocksource_tod = { 210 .name = "tod", 211 .rating = 400, 212 .read = read_tod_clock, 213 .mask = -1ULL, 214 .mult = 1000, 215 .shift = 12, 216 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 217 }; 218 219 220 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) 221 { 222 if (clock != &clocksource_tod) 223 return; 224 225 /* Make userspace gettimeofday spin until we're done. */ 226 ++vdso_data->tb_update_count; 227 smp_wmb(); 228 vdso_data->xtime_tod_stamp = clock->cycle_last; 229 vdso_data->xtime_clock_sec = xtime.tv_sec; 230 vdso_data->xtime_clock_nsec = xtime.tv_nsec; 231 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec; 232 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec; 233 smp_wmb(); 234 ++vdso_data->tb_update_count; 235 } 236 237 extern struct timezone sys_tz; 238 239 void update_vsyscall_tz(void) 240 { 241 /* Make userspace gettimeofday spin until we're done. */ 242 ++vdso_data->tb_update_count; 243 smp_wmb(); 244 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 245 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 246 smp_wmb(); 247 ++vdso_data->tb_update_count; 248 } 249 250 /* 251 * Initialize the TOD clock and the CPU timer of 252 * the boot cpu. 253 */ 254 void __init time_init(void) 255 { 256 struct timespec ts; 257 unsigned long flags; 258 cycle_t now; 259 260 /* Reset time synchronization interfaces. */ 261 etr_reset(); 262 stp_reset(); 263 264 /* request the clock comparator external interrupt */ 265 if (register_early_external_interrupt(0x1004, 266 clock_comparator_interrupt, 267 &ext_int_info_cc) != 0) 268 panic("Couldn't request external interrupt 0x1004"); 269 270 /* request the timing alert external interrupt */ 271 if (register_early_external_interrupt(0x1406, 272 timing_alert_interrupt, 273 &ext_int_etr_cc) != 0) 274 panic("Couldn't request external interrupt 0x1406"); 275 276 if (clocksource_register(&clocksource_tod) != 0) 277 panic("Could not register TOD clock source"); 278 279 /* 280 * The TOD clock is an accurate clock. The xtime should be 281 * initialized in a way that the difference between TOD and 282 * xtime is reasonably small. Too bad that timekeeping_init 283 * sets xtime.tv_nsec to zero. In addition the clock source 284 * change from the jiffies clock source to the TOD clock 285 * source add another error of up to 1/HZ second. The same 286 * function sets wall_to_monotonic to a value that is too 287 * small for /proc/uptime to be accurate. 288 * Reset xtime and wall_to_monotonic to sane values. 289 */ 290 write_seqlock_irqsave(&xtime_lock, flags); 291 now = get_clock(); 292 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime); 293 clocksource_tod.cycle_last = now; 294 clocksource_tod.raw_time = xtime; 295 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts); 296 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec); 297 write_sequnlock_irqrestore(&xtime_lock, flags); 298 299 /* Enable TOD clock interrupts on the boot cpu. */ 300 init_cpu_timer(); 301 302 /* Enable cpu timer interrupts on the boot cpu. */ 303 vtime_init(); 304 } 305 306 /* 307 * The time is "clock". old is what we think the time is. 308 * Adjust the value by a multiple of jiffies and add the delta to ntp. 309 * "delay" is an approximation how long the synchronization took. If 310 * the time correction is positive, then "delay" is subtracted from 311 * the time difference and only the remaining part is passed to ntp. 312 */ 313 static unsigned long long adjust_time(unsigned long long old, 314 unsigned long long clock, 315 unsigned long long delay) 316 { 317 unsigned long long delta, ticks; 318 struct timex adjust; 319 320 if (clock > old) { 321 /* It is later than we thought. */ 322 delta = ticks = clock - old; 323 delta = ticks = (delta < delay) ? 0 : delta - delay; 324 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 325 adjust.offset = ticks * (1000000 / HZ); 326 } else { 327 /* It is earlier than we thought. */ 328 delta = ticks = old - clock; 329 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 330 delta = -delta; 331 adjust.offset = -ticks * (1000000 / HZ); 332 } 333 sched_clock_base_cc += delta; 334 if (adjust.offset != 0) { 335 pr_notice("The ETR interface has adjusted the clock " 336 "by %li microseconds\n", adjust.offset); 337 adjust.modes = ADJ_OFFSET_SINGLESHOT; 338 do_adjtimex(&adjust); 339 } 340 return delta; 341 } 342 343 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 344 static DEFINE_MUTEX(clock_sync_mutex); 345 static unsigned long clock_sync_flags; 346 347 #define CLOCK_SYNC_HAS_ETR 0 348 #define CLOCK_SYNC_HAS_STP 1 349 #define CLOCK_SYNC_ETR 2 350 #define CLOCK_SYNC_STP 3 351 352 /* 353 * The synchronous get_clock function. It will write the current clock 354 * value to the clock pointer and return 0 if the clock is in sync with 355 * the external time source. If the clock mode is local it will return 356 * -ENOSYS and -EAGAIN if the clock is not in sync with the external 357 * reference. 358 */ 359 int get_sync_clock(unsigned long long *clock) 360 { 361 atomic_t *sw_ptr; 362 unsigned int sw0, sw1; 363 364 sw_ptr = &get_cpu_var(clock_sync_word); 365 sw0 = atomic_read(sw_ptr); 366 *clock = get_clock(); 367 sw1 = atomic_read(sw_ptr); 368 put_cpu_var(clock_sync_sync); 369 if (sw0 == sw1 && (sw0 & 0x80000000U)) 370 /* Success: time is in sync. */ 371 return 0; 372 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 373 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 374 return -ENOSYS; 375 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 376 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 377 return -EACCES; 378 return -EAGAIN; 379 } 380 EXPORT_SYMBOL(get_sync_clock); 381 382 /* 383 * Make get_sync_clock return -EAGAIN. 384 */ 385 static void disable_sync_clock(void *dummy) 386 { 387 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 388 /* 389 * Clear the in-sync bit 2^31. All get_sync_clock calls will 390 * fail until the sync bit is turned back on. In addition 391 * increase the "sequence" counter to avoid the race of an 392 * etr event and the complete recovery against get_sync_clock. 393 */ 394 atomic_clear_mask(0x80000000, sw_ptr); 395 atomic_inc(sw_ptr); 396 } 397 398 /* 399 * Make get_sync_clock return 0 again. 400 * Needs to be called from a context disabled for preemption. 401 */ 402 static void enable_sync_clock(void) 403 { 404 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); 405 atomic_set_mask(0x80000000, sw_ptr); 406 } 407 408 /* 409 * Function to check if the clock is in sync. 410 */ 411 static inline int check_sync_clock(void) 412 { 413 atomic_t *sw_ptr; 414 int rc; 415 416 sw_ptr = &get_cpu_var(clock_sync_word); 417 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 418 put_cpu_var(clock_sync_sync); 419 return rc; 420 } 421 422 /* Single threaded workqueue used for etr and stp sync events */ 423 static struct workqueue_struct *time_sync_wq; 424 425 static void __init time_init_wq(void) 426 { 427 if (time_sync_wq) 428 return; 429 time_sync_wq = create_singlethread_workqueue("timesync"); 430 stop_machine_create(); 431 } 432 433 /* 434 * External Time Reference (ETR) code. 435 */ 436 static int etr_port0_online; 437 static int etr_port1_online; 438 static int etr_steai_available; 439 440 static int __init early_parse_etr(char *p) 441 { 442 if (strncmp(p, "off", 3) == 0) 443 etr_port0_online = etr_port1_online = 0; 444 else if (strncmp(p, "port0", 5) == 0) 445 etr_port0_online = 1; 446 else if (strncmp(p, "port1", 5) == 0) 447 etr_port1_online = 1; 448 else if (strncmp(p, "on", 2) == 0) 449 etr_port0_online = etr_port1_online = 1; 450 return 0; 451 } 452 early_param("etr", early_parse_etr); 453 454 enum etr_event { 455 ETR_EVENT_PORT0_CHANGE, 456 ETR_EVENT_PORT1_CHANGE, 457 ETR_EVENT_PORT_ALERT, 458 ETR_EVENT_SYNC_CHECK, 459 ETR_EVENT_SWITCH_LOCAL, 460 ETR_EVENT_UPDATE, 461 }; 462 463 /* 464 * Valid bit combinations of the eacr register are (x = don't care): 465 * e0 e1 dp p0 p1 ea es sl 466 * 0 0 x 0 0 0 0 0 initial, disabled state 467 * 0 0 x 0 1 1 0 0 port 1 online 468 * 0 0 x 1 0 1 0 0 port 0 online 469 * 0 0 x 1 1 1 0 0 both ports online 470 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 471 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 472 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 473 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 474 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 475 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 476 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 477 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 478 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 479 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 480 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 481 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 482 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 483 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 484 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 485 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 486 */ 487 static struct etr_eacr etr_eacr; 488 static u64 etr_tolec; /* time of last eacr update */ 489 static struct etr_aib etr_port0; 490 static int etr_port0_uptodate; 491 static struct etr_aib etr_port1; 492 static int etr_port1_uptodate; 493 static unsigned long etr_events; 494 static struct timer_list etr_timer; 495 496 static void etr_timeout(unsigned long dummy); 497 static void etr_work_fn(struct work_struct *work); 498 static DEFINE_MUTEX(etr_work_mutex); 499 static DECLARE_WORK(etr_work, etr_work_fn); 500 501 /* 502 * Reset ETR attachment. 503 */ 504 static void etr_reset(void) 505 { 506 etr_eacr = (struct etr_eacr) { 507 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 508 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 509 .es = 0, .sl = 0 }; 510 if (etr_setr(&etr_eacr) == 0) { 511 etr_tolec = get_clock(); 512 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 513 if (etr_port0_online && etr_port1_online) 514 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 515 } else if (etr_port0_online || etr_port1_online) { 516 pr_warning("The real or virtual hardware system does " 517 "not provide an ETR interface\n"); 518 etr_port0_online = etr_port1_online = 0; 519 } 520 } 521 522 static int __init etr_init(void) 523 { 524 struct etr_aib aib; 525 526 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 527 return 0; 528 time_init_wq(); 529 /* Check if this machine has the steai instruction. */ 530 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 531 etr_steai_available = 1; 532 setup_timer(&etr_timer, etr_timeout, 0UL); 533 if (etr_port0_online) { 534 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 535 queue_work(time_sync_wq, &etr_work); 536 } 537 if (etr_port1_online) { 538 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 539 queue_work(time_sync_wq, &etr_work); 540 } 541 return 0; 542 } 543 544 arch_initcall(etr_init); 545 546 /* 547 * Two sorts of ETR machine checks. The architecture reads: 548 * "When a machine-check niterruption occurs and if a switch-to-local or 549 * ETR-sync-check interrupt request is pending but disabled, this pending 550 * disabled interruption request is indicated and is cleared". 551 * Which means that we can get etr_switch_to_local events from the machine 552 * check handler although the interruption condition is disabled. Lovely.. 553 */ 554 555 /* 556 * Switch to local machine check. This is called when the last usable 557 * ETR port goes inactive. After switch to local the clock is not in sync. 558 */ 559 void etr_switch_to_local(void) 560 { 561 if (!etr_eacr.sl) 562 return; 563 disable_sync_clock(NULL); 564 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); 565 queue_work(time_sync_wq, &etr_work); 566 } 567 568 /* 569 * ETR sync check machine check. This is called when the ETR OTE and the 570 * local clock OTE are farther apart than the ETR sync check tolerance. 571 * After a ETR sync check the clock is not in sync. The machine check 572 * is broadcasted to all cpus at the same time. 573 */ 574 void etr_sync_check(void) 575 { 576 if (!etr_eacr.es) 577 return; 578 disable_sync_clock(NULL); 579 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); 580 queue_work(time_sync_wq, &etr_work); 581 } 582 583 /* 584 * ETR timing alert. There are two causes: 585 * 1) port state change, check the usability of the port 586 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 587 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 588 * or ETR-data word 4 (edf4) has changed. 589 */ 590 static void etr_timing_alert(struct etr_irq_parm *intparm) 591 { 592 if (intparm->pc0) 593 /* ETR port 0 state change. */ 594 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 595 if (intparm->pc1) 596 /* ETR port 1 state change. */ 597 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 598 if (intparm->eai) 599 /* 600 * ETR port alert on either port 0, 1 or both. 601 * Both ports are not up-to-date now. 602 */ 603 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 604 queue_work(time_sync_wq, &etr_work); 605 } 606 607 static void etr_timeout(unsigned long dummy) 608 { 609 set_bit(ETR_EVENT_UPDATE, &etr_events); 610 queue_work(time_sync_wq, &etr_work); 611 } 612 613 /* 614 * Check if the etr mode is pss. 615 */ 616 static inline int etr_mode_is_pps(struct etr_eacr eacr) 617 { 618 return eacr.es && !eacr.sl; 619 } 620 621 /* 622 * Check if the etr mode is etr. 623 */ 624 static inline int etr_mode_is_etr(struct etr_eacr eacr) 625 { 626 return eacr.es && eacr.sl; 627 } 628 629 /* 630 * Check if the port can be used for TOD synchronization. 631 * For PPS mode the port has to receive OTEs. For ETR mode 632 * the port has to receive OTEs, the ETR stepping bit has to 633 * be zero and the validity bits for data frame 1, 2, and 3 634 * have to be 1. 635 */ 636 static int etr_port_valid(struct etr_aib *aib, int port) 637 { 638 unsigned int psc; 639 640 /* Check that this port is receiving OTEs. */ 641 if (aib->tsp == 0) 642 return 0; 643 644 psc = port ? aib->esw.psc1 : aib->esw.psc0; 645 if (psc == etr_lpsc_pps_mode) 646 return 1; 647 if (psc == etr_lpsc_operational_step) 648 return !aib->esw.y && aib->slsw.v1 && 649 aib->slsw.v2 && aib->slsw.v3; 650 return 0; 651 } 652 653 /* 654 * Check if two ports are on the same network. 655 */ 656 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 657 { 658 // FIXME: any other fields we have to compare? 659 return aib1->edf1.net_id == aib2->edf1.net_id; 660 } 661 662 /* 663 * Wrapper for etr_stei that converts physical port states 664 * to logical port states to be consistent with the output 665 * of stetr (see etr_psc vs. etr_lpsc). 666 */ 667 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 668 { 669 BUG_ON(etr_steai(aib, func) != 0); 670 /* Convert port state to logical port state. */ 671 if (aib->esw.psc0 == 1) 672 aib->esw.psc0 = 2; 673 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 674 aib->esw.psc0 = 1; 675 if (aib->esw.psc1 == 1) 676 aib->esw.psc1 = 2; 677 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 678 aib->esw.psc1 = 1; 679 } 680 681 /* 682 * Check if the aib a2 is still connected to the same attachment as 683 * aib a1, the etv values differ by one and a2 is valid. 684 */ 685 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 686 { 687 int state_a1, state_a2; 688 689 /* Paranoia check: e0/e1 should better be the same. */ 690 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 691 a1->esw.eacr.e1 != a2->esw.eacr.e1) 692 return 0; 693 694 /* Still connected to the same etr ? */ 695 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 696 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 697 if (state_a1 == etr_lpsc_operational_step) { 698 if (state_a2 != etr_lpsc_operational_step || 699 a1->edf1.net_id != a2->edf1.net_id || 700 a1->edf1.etr_id != a2->edf1.etr_id || 701 a1->edf1.etr_pn != a2->edf1.etr_pn) 702 return 0; 703 } else if (state_a2 != etr_lpsc_pps_mode) 704 return 0; 705 706 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 707 if (a1->edf2.etv + 1 != a2->edf2.etv) 708 return 0; 709 710 if (!etr_port_valid(a2, p)) 711 return 0; 712 713 return 1; 714 } 715 716 struct clock_sync_data { 717 atomic_t cpus; 718 int in_sync; 719 unsigned long long fixup_cc; 720 int etr_port; 721 struct etr_aib *etr_aib; 722 }; 723 724 static void clock_sync_cpu(struct clock_sync_data *sync) 725 { 726 atomic_dec(&sync->cpus); 727 enable_sync_clock(); 728 /* 729 * This looks like a busy wait loop but it isn't. etr_sync_cpus 730 * is called on all other cpus while the TOD clocks is stopped. 731 * __udelay will stop the cpu on an enabled wait psw until the 732 * TOD is running again. 733 */ 734 while (sync->in_sync == 0) { 735 __udelay(1); 736 /* 737 * A different cpu changes *in_sync. Therefore use 738 * barrier() to force memory access. 739 */ 740 barrier(); 741 } 742 if (sync->in_sync != 1) 743 /* Didn't work. Clear per-cpu in sync bit again. */ 744 disable_sync_clock(NULL); 745 /* 746 * This round of TOD syncing is done. Set the clock comparator 747 * to the next tick and let the processor continue. 748 */ 749 fixup_clock_comparator(sync->fixup_cc); 750 } 751 752 /* 753 * Sync the TOD clock using the port refered to by aibp. This port 754 * has to be enabled and the other port has to be disabled. The 755 * last eacr update has to be more than 1.6 seconds in the past. 756 */ 757 static int etr_sync_clock(void *data) 758 { 759 static int first; 760 unsigned long long clock, old_clock, delay, delta; 761 struct clock_sync_data *etr_sync; 762 struct etr_aib *sync_port, *aib; 763 int port; 764 int rc; 765 766 etr_sync = data; 767 768 if (xchg(&first, 1) == 1) { 769 /* Slave */ 770 clock_sync_cpu(etr_sync); 771 return 0; 772 } 773 774 /* Wait until all other cpus entered the sync function. */ 775 while (atomic_read(&etr_sync->cpus) != 0) 776 cpu_relax(); 777 778 port = etr_sync->etr_port; 779 aib = etr_sync->etr_aib; 780 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 781 enable_sync_clock(); 782 783 /* Set clock to next OTE. */ 784 __ctl_set_bit(14, 21); 785 __ctl_set_bit(0, 29); 786 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 787 old_clock = get_clock(); 788 if (set_clock(clock) == 0) { 789 __udelay(1); /* Wait for the clock to start. */ 790 __ctl_clear_bit(0, 29); 791 __ctl_clear_bit(14, 21); 792 etr_stetr(aib); 793 /* Adjust Linux timing variables. */ 794 delay = (unsigned long long) 795 (aib->edf2.etv - sync_port->edf2.etv) << 32; 796 delta = adjust_time(old_clock, clock, delay); 797 etr_sync->fixup_cc = delta; 798 fixup_clock_comparator(delta); 799 /* Verify that the clock is properly set. */ 800 if (!etr_aib_follows(sync_port, aib, port)) { 801 /* Didn't work. */ 802 disable_sync_clock(NULL); 803 etr_sync->in_sync = -EAGAIN; 804 rc = -EAGAIN; 805 } else { 806 etr_sync->in_sync = 1; 807 rc = 0; 808 } 809 } else { 810 /* Could not set the clock ?!? */ 811 __ctl_clear_bit(0, 29); 812 __ctl_clear_bit(14, 21); 813 disable_sync_clock(NULL); 814 etr_sync->in_sync = -EAGAIN; 815 rc = -EAGAIN; 816 } 817 xchg(&first, 0); 818 return rc; 819 } 820 821 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 822 { 823 struct clock_sync_data etr_sync; 824 struct etr_aib *sync_port; 825 int follows; 826 int rc; 827 828 /* Check if the current aib is adjacent to the sync port aib. */ 829 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 830 follows = etr_aib_follows(sync_port, aib, port); 831 memcpy(sync_port, aib, sizeof(*aib)); 832 if (!follows) 833 return -EAGAIN; 834 memset(&etr_sync, 0, sizeof(etr_sync)); 835 etr_sync.etr_aib = aib; 836 etr_sync.etr_port = port; 837 get_online_cpus(); 838 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 839 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map); 840 put_online_cpus(); 841 return rc; 842 } 843 844 /* 845 * Handle the immediate effects of the different events. 846 * The port change event is used for online/offline changes. 847 */ 848 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 849 { 850 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 851 eacr.es = 0; 852 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 853 eacr.es = eacr.sl = 0; 854 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 855 etr_port0_uptodate = etr_port1_uptodate = 0; 856 857 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 858 if (eacr.e0) 859 /* 860 * Port change of an enabled port. We have to 861 * assume that this can have caused an stepping 862 * port switch. 863 */ 864 etr_tolec = get_clock(); 865 eacr.p0 = etr_port0_online; 866 if (!eacr.p0) 867 eacr.e0 = 0; 868 etr_port0_uptodate = 0; 869 } 870 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 871 if (eacr.e1) 872 /* 873 * Port change of an enabled port. We have to 874 * assume that this can have caused an stepping 875 * port switch. 876 */ 877 etr_tolec = get_clock(); 878 eacr.p1 = etr_port1_online; 879 if (!eacr.p1) 880 eacr.e1 = 0; 881 etr_port1_uptodate = 0; 882 } 883 clear_bit(ETR_EVENT_UPDATE, &etr_events); 884 return eacr; 885 } 886 887 /* 888 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 889 * one of the ports needs an update. 890 */ 891 static void etr_set_tolec_timeout(unsigned long long now) 892 { 893 unsigned long micros; 894 895 if ((!etr_eacr.p0 || etr_port0_uptodate) && 896 (!etr_eacr.p1 || etr_port1_uptodate)) 897 return; 898 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 899 micros = (micros > 1600000) ? 0 : 1600000 - micros; 900 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 901 } 902 903 /* 904 * Set up a time that expires after 1/2 second. 905 */ 906 static void etr_set_sync_timeout(void) 907 { 908 mod_timer(&etr_timer, jiffies + HZ/2); 909 } 910 911 /* 912 * Update the aib information for one or both ports. 913 */ 914 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 915 struct etr_eacr eacr) 916 { 917 /* With both ports disabled the aib information is useless. */ 918 if (!eacr.e0 && !eacr.e1) 919 return eacr; 920 921 /* Update port0 or port1 with aib stored in etr_work_fn. */ 922 if (aib->esw.q == 0) { 923 /* Information for port 0 stored. */ 924 if (eacr.p0 && !etr_port0_uptodate) { 925 etr_port0 = *aib; 926 if (etr_port0_online) 927 etr_port0_uptodate = 1; 928 } 929 } else { 930 /* Information for port 1 stored. */ 931 if (eacr.p1 && !etr_port1_uptodate) { 932 etr_port1 = *aib; 933 if (etr_port0_online) 934 etr_port1_uptodate = 1; 935 } 936 } 937 938 /* 939 * Do not try to get the alternate port aib if the clock 940 * is not in sync yet. 941 */ 942 if (!check_sync_clock()) 943 return eacr; 944 945 /* 946 * If steai is available we can get the information about 947 * the other port immediately. If only stetr is available the 948 * data-port bit toggle has to be used. 949 */ 950 if (etr_steai_available) { 951 if (eacr.p0 && !etr_port0_uptodate) { 952 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 953 etr_port0_uptodate = 1; 954 } 955 if (eacr.p1 && !etr_port1_uptodate) { 956 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 957 etr_port1_uptodate = 1; 958 } 959 } else { 960 /* 961 * One port was updated above, if the other 962 * port is not uptodate toggle dp bit. 963 */ 964 if ((eacr.p0 && !etr_port0_uptodate) || 965 (eacr.p1 && !etr_port1_uptodate)) 966 eacr.dp ^= 1; 967 else 968 eacr.dp = 0; 969 } 970 return eacr; 971 } 972 973 /* 974 * Write new etr control register if it differs from the current one. 975 * Return 1 if etr_tolec has been updated as well. 976 */ 977 static void etr_update_eacr(struct etr_eacr eacr) 978 { 979 int dp_changed; 980 981 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 982 /* No change, return. */ 983 return; 984 /* 985 * The disable of an active port of the change of the data port 986 * bit can/will cause a change in the data port. 987 */ 988 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 989 (etr_eacr.dp ^ eacr.dp) != 0; 990 etr_eacr = eacr; 991 etr_setr(&etr_eacr); 992 if (dp_changed) 993 etr_tolec = get_clock(); 994 } 995 996 /* 997 * ETR work. In this function you'll find the main logic. In 998 * particular this is the only function that calls etr_update_eacr(), 999 * it "controls" the etr control register. 1000 */ 1001 static void etr_work_fn(struct work_struct *work) 1002 { 1003 unsigned long long now; 1004 struct etr_eacr eacr; 1005 struct etr_aib aib; 1006 int sync_port; 1007 1008 /* prevent multiple execution. */ 1009 mutex_lock(&etr_work_mutex); 1010 1011 /* Create working copy of etr_eacr. */ 1012 eacr = etr_eacr; 1013 1014 /* Check for the different events and their immediate effects. */ 1015 eacr = etr_handle_events(eacr); 1016 1017 /* Check if ETR is supposed to be active. */ 1018 eacr.ea = eacr.p0 || eacr.p1; 1019 if (!eacr.ea) { 1020 /* Both ports offline. Reset everything. */ 1021 eacr.dp = eacr.es = eacr.sl = 0; 1022 on_each_cpu(disable_sync_clock, NULL, 1); 1023 del_timer_sync(&etr_timer); 1024 etr_update_eacr(eacr); 1025 goto out_unlock; 1026 } 1027 1028 /* Store aib to get the current ETR status word. */ 1029 BUG_ON(etr_stetr(&aib) != 0); 1030 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1031 now = get_clock(); 1032 1033 /* 1034 * Update the port information if the last stepping port change 1035 * or data port change is older than 1.6 seconds. 1036 */ 1037 if (now >= etr_tolec + (1600000 << 12)) 1038 eacr = etr_handle_update(&aib, eacr); 1039 1040 /* 1041 * Select ports to enable. The prefered synchronization mode is PPS. 1042 * If a port can be enabled depends on a number of things: 1043 * 1) The port needs to be online and uptodate. A port is not 1044 * disabled just because it is not uptodate, but it is only 1045 * enabled if it is uptodate. 1046 * 2) The port needs to have the same mode (pps / etr). 1047 * 3) The port needs to be usable -> etr_port_valid() == 1 1048 * 4) To enable the second port the clock needs to be in sync. 1049 * 5) If both ports are useable and are ETR ports, the network id 1050 * has to be the same. 1051 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1052 */ 1053 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1054 eacr.sl = 0; 1055 eacr.e0 = 1; 1056 if (!etr_mode_is_pps(etr_eacr)) 1057 eacr.es = 0; 1058 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1059 eacr.e1 = 0; 1060 // FIXME: uptodate checks ? 1061 else if (etr_port0_uptodate && etr_port1_uptodate) 1062 eacr.e1 = 1; 1063 sync_port = (etr_port0_uptodate && 1064 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1065 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1066 eacr.sl = 0; 1067 eacr.e0 = 0; 1068 eacr.e1 = 1; 1069 if (!etr_mode_is_pps(etr_eacr)) 1070 eacr.es = 0; 1071 sync_port = (etr_port1_uptodate && 1072 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1073 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1074 eacr.sl = 1; 1075 eacr.e0 = 1; 1076 if (!etr_mode_is_etr(etr_eacr)) 1077 eacr.es = 0; 1078 if (!eacr.es || !eacr.p1 || 1079 aib.esw.psc1 != etr_lpsc_operational_alt) 1080 eacr.e1 = 0; 1081 else if (etr_port0_uptodate && etr_port1_uptodate && 1082 etr_compare_network(&etr_port0, &etr_port1)) 1083 eacr.e1 = 1; 1084 sync_port = (etr_port0_uptodate && 1085 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1086 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1087 eacr.sl = 1; 1088 eacr.e0 = 0; 1089 eacr.e1 = 1; 1090 if (!etr_mode_is_etr(etr_eacr)) 1091 eacr.es = 0; 1092 sync_port = (etr_port1_uptodate && 1093 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1094 } else { 1095 /* Both ports not usable. */ 1096 eacr.es = eacr.sl = 0; 1097 sync_port = -1; 1098 } 1099 1100 /* 1101 * If the clock is in sync just update the eacr and return. 1102 * If there is no valid sync port wait for a port update. 1103 */ 1104 if (check_sync_clock() || sync_port < 0) { 1105 etr_update_eacr(eacr); 1106 etr_set_tolec_timeout(now); 1107 goto out_unlock; 1108 } 1109 1110 /* 1111 * Prepare control register for clock syncing 1112 * (reset data port bit, set sync check control. 1113 */ 1114 eacr.dp = 0; 1115 eacr.es = 1; 1116 1117 /* 1118 * Update eacr and try to synchronize the clock. If the update 1119 * of eacr caused a stepping port switch (or if we have to 1120 * assume that a stepping port switch has occured) or the 1121 * clock syncing failed, reset the sync check control bit 1122 * and set up a timer to try again after 0.5 seconds 1123 */ 1124 etr_update_eacr(eacr); 1125 if (now < etr_tolec + (1600000 << 12) || 1126 etr_sync_clock_stop(&aib, sync_port) != 0) { 1127 /* Sync failed. Try again in 1/2 second. */ 1128 eacr.es = 0; 1129 etr_update_eacr(eacr); 1130 etr_set_sync_timeout(); 1131 } else 1132 etr_set_tolec_timeout(now); 1133 out_unlock: 1134 mutex_unlock(&etr_work_mutex); 1135 } 1136 1137 /* 1138 * Sysfs interface functions 1139 */ 1140 static struct sysdev_class etr_sysclass = { 1141 .name = "etr", 1142 }; 1143 1144 static struct sys_device etr_port0_dev = { 1145 .id = 0, 1146 .cls = &etr_sysclass, 1147 }; 1148 1149 static struct sys_device etr_port1_dev = { 1150 .id = 1, 1151 .cls = &etr_sysclass, 1152 }; 1153 1154 /* 1155 * ETR class attributes 1156 */ 1157 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf) 1158 { 1159 return sprintf(buf, "%i\n", etr_port0.esw.p); 1160 } 1161 1162 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1163 1164 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf) 1165 { 1166 char *mode_str; 1167 1168 if (etr_mode_is_pps(etr_eacr)) 1169 mode_str = "pps"; 1170 else if (etr_mode_is_etr(etr_eacr)) 1171 mode_str = "etr"; 1172 else 1173 mode_str = "local"; 1174 return sprintf(buf, "%s\n", mode_str); 1175 } 1176 1177 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1178 1179 /* 1180 * ETR port attributes 1181 */ 1182 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev) 1183 { 1184 if (dev == &etr_port0_dev) 1185 return etr_port0_online ? &etr_port0 : NULL; 1186 else 1187 return etr_port1_online ? &etr_port1 : NULL; 1188 } 1189 1190 static ssize_t etr_online_show(struct sys_device *dev, 1191 struct sysdev_attribute *attr, 1192 char *buf) 1193 { 1194 unsigned int online; 1195 1196 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1197 return sprintf(buf, "%i\n", online); 1198 } 1199 1200 static ssize_t etr_online_store(struct sys_device *dev, 1201 struct sysdev_attribute *attr, 1202 const char *buf, size_t count) 1203 { 1204 unsigned int value; 1205 1206 value = simple_strtoul(buf, NULL, 0); 1207 if (value != 0 && value != 1) 1208 return -EINVAL; 1209 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1210 return -EOPNOTSUPP; 1211 mutex_lock(&clock_sync_mutex); 1212 if (dev == &etr_port0_dev) { 1213 if (etr_port0_online == value) 1214 goto out; /* Nothing to do. */ 1215 etr_port0_online = value; 1216 if (etr_port0_online && etr_port1_online) 1217 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1218 else 1219 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1220 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1221 queue_work(time_sync_wq, &etr_work); 1222 } else { 1223 if (etr_port1_online == value) 1224 goto out; /* Nothing to do. */ 1225 etr_port1_online = value; 1226 if (etr_port0_online && etr_port1_online) 1227 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1228 else 1229 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1230 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1231 queue_work(time_sync_wq, &etr_work); 1232 } 1233 out: 1234 mutex_unlock(&clock_sync_mutex); 1235 return count; 1236 } 1237 1238 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store); 1239 1240 static ssize_t etr_stepping_control_show(struct sys_device *dev, 1241 struct sysdev_attribute *attr, 1242 char *buf) 1243 { 1244 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1245 etr_eacr.e0 : etr_eacr.e1); 1246 } 1247 1248 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1249 1250 static ssize_t etr_mode_code_show(struct sys_device *dev, 1251 struct sysdev_attribute *attr, char *buf) 1252 { 1253 if (!etr_port0_online && !etr_port1_online) 1254 /* Status word is not uptodate if both ports are offline. */ 1255 return -ENODATA; 1256 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1257 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1258 } 1259 1260 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1261 1262 static ssize_t etr_untuned_show(struct sys_device *dev, 1263 struct sysdev_attribute *attr, char *buf) 1264 { 1265 struct etr_aib *aib = etr_aib_from_dev(dev); 1266 1267 if (!aib || !aib->slsw.v1) 1268 return -ENODATA; 1269 return sprintf(buf, "%i\n", aib->edf1.u); 1270 } 1271 1272 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL); 1273 1274 static ssize_t etr_network_id_show(struct sys_device *dev, 1275 struct sysdev_attribute *attr, char *buf) 1276 { 1277 struct etr_aib *aib = etr_aib_from_dev(dev); 1278 1279 if (!aib || !aib->slsw.v1) 1280 return -ENODATA; 1281 return sprintf(buf, "%i\n", aib->edf1.net_id); 1282 } 1283 1284 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL); 1285 1286 static ssize_t etr_id_show(struct sys_device *dev, 1287 struct sysdev_attribute *attr, char *buf) 1288 { 1289 struct etr_aib *aib = etr_aib_from_dev(dev); 1290 1291 if (!aib || !aib->slsw.v1) 1292 return -ENODATA; 1293 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1294 } 1295 1296 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL); 1297 1298 static ssize_t etr_port_number_show(struct sys_device *dev, 1299 struct sysdev_attribute *attr, char *buf) 1300 { 1301 struct etr_aib *aib = etr_aib_from_dev(dev); 1302 1303 if (!aib || !aib->slsw.v1) 1304 return -ENODATA; 1305 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1306 } 1307 1308 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL); 1309 1310 static ssize_t etr_coupled_show(struct sys_device *dev, 1311 struct sysdev_attribute *attr, char *buf) 1312 { 1313 struct etr_aib *aib = etr_aib_from_dev(dev); 1314 1315 if (!aib || !aib->slsw.v3) 1316 return -ENODATA; 1317 return sprintf(buf, "%i\n", aib->edf3.c); 1318 } 1319 1320 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL); 1321 1322 static ssize_t etr_local_time_show(struct sys_device *dev, 1323 struct sysdev_attribute *attr, char *buf) 1324 { 1325 struct etr_aib *aib = etr_aib_from_dev(dev); 1326 1327 if (!aib || !aib->slsw.v3) 1328 return -ENODATA; 1329 return sprintf(buf, "%i\n", aib->edf3.blto); 1330 } 1331 1332 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL); 1333 1334 static ssize_t etr_utc_offset_show(struct sys_device *dev, 1335 struct sysdev_attribute *attr, char *buf) 1336 { 1337 struct etr_aib *aib = etr_aib_from_dev(dev); 1338 1339 if (!aib || !aib->slsw.v3) 1340 return -ENODATA; 1341 return sprintf(buf, "%i\n", aib->edf3.buo); 1342 } 1343 1344 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1345 1346 static struct sysdev_attribute *etr_port_attributes[] = { 1347 &attr_online, 1348 &attr_stepping_control, 1349 &attr_state_code, 1350 &attr_untuned, 1351 &attr_network, 1352 &attr_id, 1353 &attr_port, 1354 &attr_coupled, 1355 &attr_local_time, 1356 &attr_utc_offset, 1357 NULL 1358 }; 1359 1360 static int __init etr_register_port(struct sys_device *dev) 1361 { 1362 struct sysdev_attribute **attr; 1363 int rc; 1364 1365 rc = sysdev_register(dev); 1366 if (rc) 1367 goto out; 1368 for (attr = etr_port_attributes; *attr; attr++) { 1369 rc = sysdev_create_file(dev, *attr); 1370 if (rc) 1371 goto out_unreg; 1372 } 1373 return 0; 1374 out_unreg: 1375 for (; attr >= etr_port_attributes; attr--) 1376 sysdev_remove_file(dev, *attr); 1377 sysdev_unregister(dev); 1378 out: 1379 return rc; 1380 } 1381 1382 static void __init etr_unregister_port(struct sys_device *dev) 1383 { 1384 struct sysdev_attribute **attr; 1385 1386 for (attr = etr_port_attributes; *attr; attr++) 1387 sysdev_remove_file(dev, *attr); 1388 sysdev_unregister(dev); 1389 } 1390 1391 static int __init etr_init_sysfs(void) 1392 { 1393 int rc; 1394 1395 rc = sysdev_class_register(&etr_sysclass); 1396 if (rc) 1397 goto out; 1398 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port); 1399 if (rc) 1400 goto out_unreg_class; 1401 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode); 1402 if (rc) 1403 goto out_remove_stepping_port; 1404 rc = etr_register_port(&etr_port0_dev); 1405 if (rc) 1406 goto out_remove_stepping_mode; 1407 rc = etr_register_port(&etr_port1_dev); 1408 if (rc) 1409 goto out_remove_port0; 1410 return 0; 1411 1412 out_remove_port0: 1413 etr_unregister_port(&etr_port0_dev); 1414 out_remove_stepping_mode: 1415 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode); 1416 out_remove_stepping_port: 1417 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port); 1418 out_unreg_class: 1419 sysdev_class_unregister(&etr_sysclass); 1420 out: 1421 return rc; 1422 } 1423 1424 device_initcall(etr_init_sysfs); 1425 1426 /* 1427 * Server Time Protocol (STP) code. 1428 */ 1429 static int stp_online; 1430 static struct stp_sstpi stp_info; 1431 static void *stp_page; 1432 1433 static void stp_work_fn(struct work_struct *work); 1434 static DEFINE_MUTEX(stp_work_mutex); 1435 static DECLARE_WORK(stp_work, stp_work_fn); 1436 static struct timer_list stp_timer; 1437 1438 static int __init early_parse_stp(char *p) 1439 { 1440 if (strncmp(p, "off", 3) == 0) 1441 stp_online = 0; 1442 else if (strncmp(p, "on", 2) == 0) 1443 stp_online = 1; 1444 return 0; 1445 } 1446 early_param("stp", early_parse_stp); 1447 1448 /* 1449 * Reset STP attachment. 1450 */ 1451 static void __init stp_reset(void) 1452 { 1453 int rc; 1454 1455 stp_page = alloc_bootmem_pages(PAGE_SIZE); 1456 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1457 if (rc == 0) 1458 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1459 else if (stp_online) { 1460 pr_warning("The real or virtual hardware system does " 1461 "not provide an STP interface\n"); 1462 free_bootmem((unsigned long) stp_page, PAGE_SIZE); 1463 stp_page = NULL; 1464 stp_online = 0; 1465 } 1466 } 1467 1468 static void stp_timeout(unsigned long dummy) 1469 { 1470 queue_work(time_sync_wq, &stp_work); 1471 } 1472 1473 static int __init stp_init(void) 1474 { 1475 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1476 return 0; 1477 setup_timer(&stp_timer, stp_timeout, 0UL); 1478 time_init_wq(); 1479 if (!stp_online) 1480 return 0; 1481 queue_work(time_sync_wq, &stp_work); 1482 return 0; 1483 } 1484 1485 arch_initcall(stp_init); 1486 1487 /* 1488 * STP timing alert. There are three causes: 1489 * 1) timing status change 1490 * 2) link availability change 1491 * 3) time control parameter change 1492 * In all three cases we are only interested in the clock source state. 1493 * If a STP clock source is now available use it. 1494 */ 1495 static void stp_timing_alert(struct stp_irq_parm *intparm) 1496 { 1497 if (intparm->tsc || intparm->lac || intparm->tcpc) 1498 queue_work(time_sync_wq, &stp_work); 1499 } 1500 1501 /* 1502 * STP sync check machine check. This is called when the timing state 1503 * changes from the synchronized state to the unsynchronized state. 1504 * After a STP sync check the clock is not in sync. The machine check 1505 * is broadcasted to all cpus at the same time. 1506 */ 1507 void stp_sync_check(void) 1508 { 1509 disable_sync_clock(NULL); 1510 queue_work(time_sync_wq, &stp_work); 1511 } 1512 1513 /* 1514 * STP island condition machine check. This is called when an attached 1515 * server attempts to communicate over an STP link and the servers 1516 * have matching CTN ids and have a valid stratum-1 configuration 1517 * but the configurations do not match. 1518 */ 1519 void stp_island_check(void) 1520 { 1521 disable_sync_clock(NULL); 1522 queue_work(time_sync_wq, &stp_work); 1523 } 1524 1525 1526 static int stp_sync_clock(void *data) 1527 { 1528 static int first; 1529 unsigned long long old_clock, delta; 1530 struct clock_sync_data *stp_sync; 1531 int rc; 1532 1533 stp_sync = data; 1534 1535 if (xchg(&first, 1) == 1) { 1536 /* Slave */ 1537 clock_sync_cpu(stp_sync); 1538 return 0; 1539 } 1540 1541 /* Wait until all other cpus entered the sync function. */ 1542 while (atomic_read(&stp_sync->cpus) != 0) 1543 cpu_relax(); 1544 1545 enable_sync_clock(); 1546 1547 rc = 0; 1548 if (stp_info.todoff[0] || stp_info.todoff[1] || 1549 stp_info.todoff[2] || stp_info.todoff[3] || 1550 stp_info.tmd != 2) { 1551 old_clock = get_clock(); 1552 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1553 if (rc == 0) { 1554 delta = adjust_time(old_clock, get_clock(), 0); 1555 fixup_clock_comparator(delta); 1556 rc = chsc_sstpi(stp_page, &stp_info, 1557 sizeof(struct stp_sstpi)); 1558 if (rc == 0 && stp_info.tmd != 2) 1559 rc = -EAGAIN; 1560 } 1561 } 1562 if (rc) { 1563 disable_sync_clock(NULL); 1564 stp_sync->in_sync = -EAGAIN; 1565 } else 1566 stp_sync->in_sync = 1; 1567 xchg(&first, 0); 1568 return 0; 1569 } 1570 1571 /* 1572 * STP work. Check for the STP state and take over the clock 1573 * synchronization if the STP clock source is usable. 1574 */ 1575 static void stp_work_fn(struct work_struct *work) 1576 { 1577 struct clock_sync_data stp_sync; 1578 int rc; 1579 1580 /* prevent multiple execution. */ 1581 mutex_lock(&stp_work_mutex); 1582 1583 if (!stp_online) { 1584 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1585 del_timer_sync(&stp_timer); 1586 goto out_unlock; 1587 } 1588 1589 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1590 if (rc) 1591 goto out_unlock; 1592 1593 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1594 if (rc || stp_info.c == 0) 1595 goto out_unlock; 1596 1597 /* Skip synchronization if the clock is already in sync. */ 1598 if (check_sync_clock()) 1599 goto out_unlock; 1600 1601 memset(&stp_sync, 0, sizeof(stp_sync)); 1602 get_online_cpus(); 1603 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1604 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map); 1605 put_online_cpus(); 1606 1607 if (!check_sync_clock()) 1608 /* 1609 * There is a usable clock but the synchonization failed. 1610 * Retry after a second. 1611 */ 1612 mod_timer(&stp_timer, jiffies + HZ); 1613 1614 out_unlock: 1615 mutex_unlock(&stp_work_mutex); 1616 } 1617 1618 /* 1619 * STP class sysfs interface functions 1620 */ 1621 static struct sysdev_class stp_sysclass = { 1622 .name = "stp", 1623 }; 1624 1625 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) 1626 { 1627 if (!stp_online) 1628 return -ENODATA; 1629 return sprintf(buf, "%016llx\n", 1630 *(unsigned long long *) stp_info.ctnid); 1631 } 1632 1633 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1634 1635 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) 1636 { 1637 if (!stp_online) 1638 return -ENODATA; 1639 return sprintf(buf, "%i\n", stp_info.ctn); 1640 } 1641 1642 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1643 1644 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) 1645 { 1646 if (!stp_online || !(stp_info.vbits & 0x2000)) 1647 return -ENODATA; 1648 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1649 } 1650 1651 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1652 1653 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) 1654 { 1655 if (!stp_online || !(stp_info.vbits & 0x8000)) 1656 return -ENODATA; 1657 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1658 } 1659 1660 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1661 1662 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) 1663 { 1664 if (!stp_online) 1665 return -ENODATA; 1666 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1667 } 1668 1669 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); 1670 1671 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) 1672 { 1673 if (!stp_online || !(stp_info.vbits & 0x0800)) 1674 return -ENODATA; 1675 return sprintf(buf, "%i\n", (int) stp_info.tto); 1676 } 1677 1678 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1679 1680 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) 1681 { 1682 if (!stp_online || !(stp_info.vbits & 0x4000)) 1683 return -ENODATA; 1684 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1685 } 1686 1687 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, 1688 stp_time_zone_offset_show, NULL); 1689 1690 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) 1691 { 1692 if (!stp_online) 1693 return -ENODATA; 1694 return sprintf(buf, "%i\n", stp_info.tmd); 1695 } 1696 1697 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1698 1699 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) 1700 { 1701 if (!stp_online) 1702 return -ENODATA; 1703 return sprintf(buf, "%i\n", stp_info.tst); 1704 } 1705 1706 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1707 1708 static ssize_t stp_online_show(struct sysdev_class *class, char *buf) 1709 { 1710 return sprintf(buf, "%i\n", stp_online); 1711 } 1712 1713 static ssize_t stp_online_store(struct sysdev_class *class, 1714 const char *buf, size_t count) 1715 { 1716 unsigned int value; 1717 1718 value = simple_strtoul(buf, NULL, 0); 1719 if (value != 0 && value != 1) 1720 return -EINVAL; 1721 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1722 return -EOPNOTSUPP; 1723 mutex_lock(&clock_sync_mutex); 1724 stp_online = value; 1725 if (stp_online) 1726 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1727 else 1728 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1729 queue_work(time_sync_wq, &stp_work); 1730 mutex_unlock(&clock_sync_mutex); 1731 return count; 1732 } 1733 1734 /* 1735 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named 1736 * stp/online but attr_online already exists in this file .. 1737 */ 1738 static struct sysdev_class_attribute attr_stp_online = { 1739 .attr = { .name = "online", .mode = 0600 }, 1740 .show = stp_online_show, 1741 .store = stp_online_store, 1742 }; 1743 1744 static struct sysdev_class_attribute *stp_attributes[] = { 1745 &attr_ctn_id, 1746 &attr_ctn_type, 1747 &attr_dst_offset, 1748 &attr_leap_seconds, 1749 &attr_stp_online, 1750 &attr_stratum, 1751 &attr_time_offset, 1752 &attr_time_zone_offset, 1753 &attr_timing_mode, 1754 &attr_timing_state, 1755 NULL 1756 }; 1757 1758 static int __init stp_init_sysfs(void) 1759 { 1760 struct sysdev_class_attribute **attr; 1761 int rc; 1762 1763 rc = sysdev_class_register(&stp_sysclass); 1764 if (rc) 1765 goto out; 1766 for (attr = stp_attributes; *attr; attr++) { 1767 rc = sysdev_class_create_file(&stp_sysclass, *attr); 1768 if (rc) 1769 goto out_unreg; 1770 } 1771 return 0; 1772 out_unreg: 1773 for (; attr >= stp_attributes; attr--) 1774 sysdev_class_remove_file(&stp_sysclass, *attr); 1775 sysdev_class_unregister(&stp_sysclass); 1776 out: 1777 return rc; 1778 } 1779 1780 device_initcall(stp_init_sysfs); 1781