xref: /openbmc/linux/arch/s390/kernel/time.c (revision 5bd8e16d)
1 /*
2  *    Time of day based timer functions.
3  *
4  *  S390 version
5  *    Copyright IBM Corp. 1999, 2008
6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9  *
10  *  Derived from "arch/i386/kernel/time.c"
11  *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
12  */
13 
14 #define KMSG_COMPONENT "time"
15 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
16 
17 #include <linux/kernel_stat.h>
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/mm.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/device.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
37 #include <linux/timekeeper_internal.h>
38 #include <linux/clockchips.h>
39 #include <linux/gfp.h>
40 #include <linux/kprobes.h>
41 #include <asm/uaccess.h>
42 #include <asm/delay.h>
43 #include <asm/div64.h>
44 #include <asm/vdso.h>
45 #include <asm/irq.h>
46 #include <asm/irq_regs.h>
47 #include <asm/vtimer.h>
48 #include <asm/etr.h>
49 #include <asm/cio.h>
50 #include "entry.h"
51 
52 /* change this if you have some constant time drift */
53 #define USECS_PER_JIFFY     ((unsigned long) 1000000/HZ)
54 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
55 
56 u64 sched_clock_base_cc = -1;	/* Force to data section. */
57 EXPORT_SYMBOL_GPL(sched_clock_base_cc);
58 
59 static DEFINE_PER_CPU(struct clock_event_device, comparators);
60 
61 /*
62  * Scheduler clock - returns current time in nanosec units.
63  */
64 unsigned long long notrace __kprobes sched_clock(void)
65 {
66 	return tod_to_ns(get_tod_clock_monotonic());
67 }
68 
69 /*
70  * Monotonic_clock - returns # of nanoseconds passed since time_init()
71  */
72 unsigned long long monotonic_clock(void)
73 {
74 	return sched_clock();
75 }
76 EXPORT_SYMBOL(monotonic_clock);
77 
78 void tod_to_timeval(__u64 todval, struct timespec *xt)
79 {
80 	unsigned long long sec;
81 
82 	sec = todval >> 12;
83 	do_div(sec, 1000000);
84 	xt->tv_sec = sec;
85 	todval -= (sec * 1000000) << 12;
86 	xt->tv_nsec = ((todval * 1000) >> 12);
87 }
88 EXPORT_SYMBOL(tod_to_timeval);
89 
90 void clock_comparator_work(void)
91 {
92 	struct clock_event_device *cd;
93 
94 	S390_lowcore.clock_comparator = -1ULL;
95 	cd = &__get_cpu_var(comparators);
96 	cd->event_handler(cd);
97 }
98 
99 /*
100  * Fixup the clock comparator.
101  */
102 static void fixup_clock_comparator(unsigned long long delta)
103 {
104 	/* If nobody is waiting there's nothing to fix. */
105 	if (S390_lowcore.clock_comparator == -1ULL)
106 		return;
107 	S390_lowcore.clock_comparator += delta;
108 	set_clock_comparator(S390_lowcore.clock_comparator);
109 }
110 
111 static int s390_next_ktime(ktime_t expires,
112 			   struct clock_event_device *evt)
113 {
114 	struct timespec ts;
115 	u64 nsecs;
116 
117 	ts.tv_sec = ts.tv_nsec = 0;
118 	monotonic_to_bootbased(&ts);
119 	nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
120 	do_div(nsecs, 125);
121 	S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
122 	/* Program the maximum value if we have an overflow (== year 2042) */
123 	if (unlikely(S390_lowcore.clock_comparator < sched_clock_base_cc))
124 		S390_lowcore.clock_comparator = -1ULL;
125 	set_clock_comparator(S390_lowcore.clock_comparator);
126 	return 0;
127 }
128 
129 static void s390_set_mode(enum clock_event_mode mode,
130 			  struct clock_event_device *evt)
131 {
132 }
133 
134 /*
135  * Set up lowcore and control register of the current cpu to
136  * enable TOD clock and clock comparator interrupts.
137  */
138 void init_cpu_timer(void)
139 {
140 	struct clock_event_device *cd;
141 	int cpu;
142 
143 	S390_lowcore.clock_comparator = -1ULL;
144 	set_clock_comparator(S390_lowcore.clock_comparator);
145 
146 	cpu = smp_processor_id();
147 	cd = &per_cpu(comparators, cpu);
148 	cd->name		= "comparator";
149 	cd->features		= CLOCK_EVT_FEAT_ONESHOT |
150 				  CLOCK_EVT_FEAT_KTIME;
151 	cd->mult		= 16777;
152 	cd->shift		= 12;
153 	cd->min_delta_ns	= 1;
154 	cd->max_delta_ns	= LONG_MAX;
155 	cd->rating		= 400;
156 	cd->cpumask		= cpumask_of(cpu);
157 	cd->set_next_ktime	= s390_next_ktime;
158 	cd->set_mode		= s390_set_mode;
159 
160 	clockevents_register_device(cd);
161 
162 	/* Enable clock comparator timer interrupt. */
163 	__ctl_set_bit(0,11);
164 
165 	/* Always allow the timing alert external interrupt. */
166 	__ctl_set_bit(0, 4);
167 }
168 
169 static void clock_comparator_interrupt(struct ext_code ext_code,
170 				       unsigned int param32,
171 				       unsigned long param64)
172 {
173 	inc_irq_stat(IRQEXT_CLK);
174 	if (S390_lowcore.clock_comparator == -1ULL)
175 		set_clock_comparator(S390_lowcore.clock_comparator);
176 }
177 
178 static void etr_timing_alert(struct etr_irq_parm *);
179 static void stp_timing_alert(struct stp_irq_parm *);
180 
181 static void timing_alert_interrupt(struct ext_code ext_code,
182 				   unsigned int param32, unsigned long param64)
183 {
184 	inc_irq_stat(IRQEXT_TLA);
185 	if (param32 & 0x00c40000)
186 		etr_timing_alert((struct etr_irq_parm *) &param32);
187 	if (param32 & 0x00038000)
188 		stp_timing_alert((struct stp_irq_parm *) &param32);
189 }
190 
191 static void etr_reset(void);
192 static void stp_reset(void);
193 
194 void read_persistent_clock(struct timespec *ts)
195 {
196 	tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts);
197 }
198 
199 void read_boot_clock(struct timespec *ts)
200 {
201 	tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
202 }
203 
204 static cycle_t read_tod_clock(struct clocksource *cs)
205 {
206 	return get_tod_clock();
207 }
208 
209 static struct clocksource clocksource_tod = {
210 	.name		= "tod",
211 	.rating		= 400,
212 	.read		= read_tod_clock,
213 	.mask		= -1ULL,
214 	.mult		= 1000,
215 	.shift		= 12,
216 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
217 };
218 
219 struct clocksource * __init clocksource_default_clock(void)
220 {
221 	return &clocksource_tod;
222 }
223 
224 void update_vsyscall_old(struct timespec *wall_time, struct timespec *wtm,
225 			struct clocksource *clock, u32 mult)
226 {
227 	if (clock != &clocksource_tod)
228 		return;
229 
230 	/* Make userspace gettimeofday spin until we're done. */
231 	++vdso_data->tb_update_count;
232 	smp_wmb();
233 	vdso_data->xtime_tod_stamp = clock->cycle_last;
234 	vdso_data->xtime_clock_sec = wall_time->tv_sec;
235 	vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
236 	vdso_data->wtom_clock_sec = wtm->tv_sec;
237 	vdso_data->wtom_clock_nsec = wtm->tv_nsec;
238 	vdso_data->ntp_mult = mult;
239 	smp_wmb();
240 	++vdso_data->tb_update_count;
241 }
242 
243 extern struct timezone sys_tz;
244 
245 void update_vsyscall_tz(void)
246 {
247 	/* Make userspace gettimeofday spin until we're done. */
248 	++vdso_data->tb_update_count;
249 	smp_wmb();
250 	vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
251 	vdso_data->tz_dsttime = sys_tz.tz_dsttime;
252 	smp_wmb();
253 	++vdso_data->tb_update_count;
254 }
255 
256 /*
257  * Initialize the TOD clock and the CPU timer of
258  * the boot cpu.
259  */
260 void __init time_init(void)
261 {
262 	/* Reset time synchronization interfaces. */
263 	etr_reset();
264 	stp_reset();
265 
266 	/* request the clock comparator external interrupt */
267 	if (register_external_interrupt(0x1004, clock_comparator_interrupt))
268                 panic("Couldn't request external interrupt 0x1004");
269 
270 	/* request the timing alert external interrupt */
271 	if (register_external_interrupt(0x1406, timing_alert_interrupt))
272 		panic("Couldn't request external interrupt 0x1406");
273 
274 	if (clocksource_register(&clocksource_tod) != 0)
275 		panic("Could not register TOD clock source");
276 
277 	/* Enable TOD clock interrupts on the boot cpu. */
278 	init_cpu_timer();
279 
280 	/* Enable cpu timer interrupts on the boot cpu. */
281 	vtime_init();
282 }
283 
284 /*
285  * The time is "clock". old is what we think the time is.
286  * Adjust the value by a multiple of jiffies and add the delta to ntp.
287  * "delay" is an approximation how long the synchronization took. If
288  * the time correction is positive, then "delay" is subtracted from
289  * the time difference and only the remaining part is passed to ntp.
290  */
291 static unsigned long long adjust_time(unsigned long long old,
292 				      unsigned long long clock,
293 				      unsigned long long delay)
294 {
295 	unsigned long long delta, ticks;
296 	struct timex adjust;
297 
298 	if (clock > old) {
299 		/* It is later than we thought. */
300 		delta = ticks = clock - old;
301 		delta = ticks = (delta < delay) ? 0 : delta - delay;
302 		delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
303 		adjust.offset = ticks * (1000000 / HZ);
304 	} else {
305 		/* It is earlier than we thought. */
306 		delta = ticks = old - clock;
307 		delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
308 		delta = -delta;
309 		adjust.offset = -ticks * (1000000 / HZ);
310 	}
311 	sched_clock_base_cc += delta;
312 	if (adjust.offset != 0) {
313 		pr_notice("The ETR interface has adjusted the clock "
314 			  "by %li microseconds\n", adjust.offset);
315 		adjust.modes = ADJ_OFFSET_SINGLESHOT;
316 		do_adjtimex(&adjust);
317 	}
318 	return delta;
319 }
320 
321 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
322 static DEFINE_MUTEX(clock_sync_mutex);
323 static unsigned long clock_sync_flags;
324 
325 #define CLOCK_SYNC_HAS_ETR	0
326 #define CLOCK_SYNC_HAS_STP	1
327 #define CLOCK_SYNC_ETR		2
328 #define CLOCK_SYNC_STP		3
329 
330 /*
331  * The synchronous get_clock function. It will write the current clock
332  * value to the clock pointer and return 0 if the clock is in sync with
333  * the external time source. If the clock mode is local it will return
334  * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external
335  * reference.
336  */
337 int get_sync_clock(unsigned long long *clock)
338 {
339 	atomic_t *sw_ptr;
340 	unsigned int sw0, sw1;
341 
342 	sw_ptr = &get_cpu_var(clock_sync_word);
343 	sw0 = atomic_read(sw_ptr);
344 	*clock = get_tod_clock();
345 	sw1 = atomic_read(sw_ptr);
346 	put_cpu_var(clock_sync_word);
347 	if (sw0 == sw1 && (sw0 & 0x80000000U))
348 		/* Success: time is in sync. */
349 		return 0;
350 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
351 	    !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
352 		return -EOPNOTSUPP;
353 	if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
354 	    !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
355 		return -EACCES;
356 	return -EAGAIN;
357 }
358 EXPORT_SYMBOL(get_sync_clock);
359 
360 /*
361  * Make get_sync_clock return -EAGAIN.
362  */
363 static void disable_sync_clock(void *dummy)
364 {
365 	atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
366 	/*
367 	 * Clear the in-sync bit 2^31. All get_sync_clock calls will
368 	 * fail until the sync bit is turned back on. In addition
369 	 * increase the "sequence" counter to avoid the race of an
370 	 * etr event and the complete recovery against get_sync_clock.
371 	 */
372 	atomic_clear_mask(0x80000000, sw_ptr);
373 	atomic_inc(sw_ptr);
374 }
375 
376 /*
377  * Make get_sync_clock return 0 again.
378  * Needs to be called from a context disabled for preemption.
379  */
380 static void enable_sync_clock(void)
381 {
382 	atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
383 	atomic_set_mask(0x80000000, sw_ptr);
384 }
385 
386 /*
387  * Function to check if the clock is in sync.
388  */
389 static inline int check_sync_clock(void)
390 {
391 	atomic_t *sw_ptr;
392 	int rc;
393 
394 	sw_ptr = &get_cpu_var(clock_sync_word);
395 	rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
396 	put_cpu_var(clock_sync_word);
397 	return rc;
398 }
399 
400 /* Single threaded workqueue used for etr and stp sync events */
401 static struct workqueue_struct *time_sync_wq;
402 
403 static void __init time_init_wq(void)
404 {
405 	if (time_sync_wq)
406 		return;
407 	time_sync_wq = create_singlethread_workqueue("timesync");
408 }
409 
410 /*
411  * External Time Reference (ETR) code.
412  */
413 static int etr_port0_online;
414 static int etr_port1_online;
415 static int etr_steai_available;
416 
417 static int __init early_parse_etr(char *p)
418 {
419 	if (strncmp(p, "off", 3) == 0)
420 		etr_port0_online = etr_port1_online = 0;
421 	else if (strncmp(p, "port0", 5) == 0)
422 		etr_port0_online = 1;
423 	else if (strncmp(p, "port1", 5) == 0)
424 		etr_port1_online = 1;
425 	else if (strncmp(p, "on", 2) == 0)
426 		etr_port0_online = etr_port1_online = 1;
427 	return 0;
428 }
429 early_param("etr", early_parse_etr);
430 
431 enum etr_event {
432 	ETR_EVENT_PORT0_CHANGE,
433 	ETR_EVENT_PORT1_CHANGE,
434 	ETR_EVENT_PORT_ALERT,
435 	ETR_EVENT_SYNC_CHECK,
436 	ETR_EVENT_SWITCH_LOCAL,
437 	ETR_EVENT_UPDATE,
438 };
439 
440 /*
441  * Valid bit combinations of the eacr register are (x = don't care):
442  * e0 e1 dp p0 p1 ea es sl
443  *  0  0  x  0	0  0  0  0  initial, disabled state
444  *  0  0  x  0	1  1  0  0  port 1 online
445  *  0  0  x  1	0  1  0  0  port 0 online
446  *  0  0  x  1	1  1  0  0  both ports online
447  *  0  1  x  0	1  1  0  0  port 1 online and usable, ETR or PPS mode
448  *  0  1  x  0	1  1  0  1  port 1 online, usable and ETR mode
449  *  0  1  x  0	1  1  1  0  port 1 online, usable, PPS mode, in-sync
450  *  0  1  x  0	1  1  1  1  port 1 online, usable, ETR mode, in-sync
451  *  0  1  x  1	1  1  0  0  both ports online, port 1 usable
452  *  0  1  x  1	1  1  1  0  both ports online, port 1 usable, PPS mode, in-sync
453  *  0  1  x  1	1  1  1  1  both ports online, port 1 usable, ETR mode, in-sync
454  *  1  0  x  1	0  1  0  0  port 0 online and usable, ETR or PPS mode
455  *  1  0  x  1	0  1  0  1  port 0 online, usable and ETR mode
456  *  1  0  x  1	0  1  1  0  port 0 online, usable, PPS mode, in-sync
457  *  1  0  x  1	0  1  1  1  port 0 online, usable, ETR mode, in-sync
458  *  1  0  x  1	1  1  0  0  both ports online, port 0 usable
459  *  1  0  x  1	1  1  1  0  both ports online, port 0 usable, PPS mode, in-sync
460  *  1  0  x  1	1  1  1  1  both ports online, port 0 usable, ETR mode, in-sync
461  *  1  1  x  1	1  1  1  0  both ports online & usable, ETR, in-sync
462  *  1  1  x  1	1  1  1  1  both ports online & usable, ETR, in-sync
463  */
464 static struct etr_eacr etr_eacr;
465 static u64 etr_tolec;			/* time of last eacr update */
466 static struct etr_aib etr_port0;
467 static int etr_port0_uptodate;
468 static struct etr_aib etr_port1;
469 static int etr_port1_uptodate;
470 static unsigned long etr_events;
471 static struct timer_list etr_timer;
472 
473 static void etr_timeout(unsigned long dummy);
474 static void etr_work_fn(struct work_struct *work);
475 static DEFINE_MUTEX(etr_work_mutex);
476 static DECLARE_WORK(etr_work, etr_work_fn);
477 
478 /*
479  * Reset ETR attachment.
480  */
481 static void etr_reset(void)
482 {
483 	etr_eacr =  (struct etr_eacr) {
484 		.e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
485 		.p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
486 		.es = 0, .sl = 0 };
487 	if (etr_setr(&etr_eacr) == 0) {
488 		etr_tolec = get_tod_clock();
489 		set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
490 		if (etr_port0_online && etr_port1_online)
491 			set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
492 	} else if (etr_port0_online || etr_port1_online) {
493 		pr_warning("The real or virtual hardware system does "
494 			   "not provide an ETR interface\n");
495 		etr_port0_online = etr_port1_online = 0;
496 	}
497 }
498 
499 static int __init etr_init(void)
500 {
501 	struct etr_aib aib;
502 
503 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
504 		return 0;
505 	time_init_wq();
506 	/* Check if this machine has the steai instruction. */
507 	if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
508 		etr_steai_available = 1;
509 	setup_timer(&etr_timer, etr_timeout, 0UL);
510 	if (etr_port0_online) {
511 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
512 		queue_work(time_sync_wq, &etr_work);
513 	}
514 	if (etr_port1_online) {
515 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
516 		queue_work(time_sync_wq, &etr_work);
517 	}
518 	return 0;
519 }
520 
521 arch_initcall(etr_init);
522 
523 /*
524  * Two sorts of ETR machine checks. The architecture reads:
525  * "When a machine-check niterruption occurs and if a switch-to-local or
526  *  ETR-sync-check interrupt request is pending but disabled, this pending
527  *  disabled interruption request is indicated and is cleared".
528  * Which means that we can get etr_switch_to_local events from the machine
529  * check handler although the interruption condition is disabled. Lovely..
530  */
531 
532 /*
533  * Switch to local machine check. This is called when the last usable
534  * ETR port goes inactive. After switch to local the clock is not in sync.
535  */
536 void etr_switch_to_local(void)
537 {
538 	if (!etr_eacr.sl)
539 		return;
540 	disable_sync_clock(NULL);
541 	if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
542 		etr_eacr.es = etr_eacr.sl = 0;
543 		etr_setr(&etr_eacr);
544 		queue_work(time_sync_wq, &etr_work);
545 	}
546 }
547 
548 /*
549  * ETR sync check machine check. This is called when the ETR OTE and the
550  * local clock OTE are farther apart than the ETR sync check tolerance.
551  * After a ETR sync check the clock is not in sync. The machine check
552  * is broadcasted to all cpus at the same time.
553  */
554 void etr_sync_check(void)
555 {
556 	if (!etr_eacr.es)
557 		return;
558 	disable_sync_clock(NULL);
559 	if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
560 		etr_eacr.es = 0;
561 		etr_setr(&etr_eacr);
562 		queue_work(time_sync_wq, &etr_work);
563 	}
564 }
565 
566 /*
567  * ETR timing alert. There are two causes:
568  * 1) port state change, check the usability of the port
569  * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
570  *    sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
571  *    or ETR-data word 4 (edf4) has changed.
572  */
573 static void etr_timing_alert(struct etr_irq_parm *intparm)
574 {
575 	if (intparm->pc0)
576 		/* ETR port 0 state change. */
577 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
578 	if (intparm->pc1)
579 		/* ETR port 1 state change. */
580 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
581 	if (intparm->eai)
582 		/*
583 		 * ETR port alert on either port 0, 1 or both.
584 		 * Both ports are not up-to-date now.
585 		 */
586 		set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
587 	queue_work(time_sync_wq, &etr_work);
588 }
589 
590 static void etr_timeout(unsigned long dummy)
591 {
592 	set_bit(ETR_EVENT_UPDATE, &etr_events);
593 	queue_work(time_sync_wq, &etr_work);
594 }
595 
596 /*
597  * Check if the etr mode is pss.
598  */
599 static inline int etr_mode_is_pps(struct etr_eacr eacr)
600 {
601 	return eacr.es && !eacr.sl;
602 }
603 
604 /*
605  * Check if the etr mode is etr.
606  */
607 static inline int etr_mode_is_etr(struct etr_eacr eacr)
608 {
609 	return eacr.es && eacr.sl;
610 }
611 
612 /*
613  * Check if the port can be used for TOD synchronization.
614  * For PPS mode the port has to receive OTEs. For ETR mode
615  * the port has to receive OTEs, the ETR stepping bit has to
616  * be zero and the validity bits for data frame 1, 2, and 3
617  * have to be 1.
618  */
619 static int etr_port_valid(struct etr_aib *aib, int port)
620 {
621 	unsigned int psc;
622 
623 	/* Check that this port is receiving OTEs. */
624 	if (aib->tsp == 0)
625 		return 0;
626 
627 	psc = port ? aib->esw.psc1 : aib->esw.psc0;
628 	if (psc == etr_lpsc_pps_mode)
629 		return 1;
630 	if (psc == etr_lpsc_operational_step)
631 		return !aib->esw.y && aib->slsw.v1 &&
632 			aib->slsw.v2 && aib->slsw.v3;
633 	return 0;
634 }
635 
636 /*
637  * Check if two ports are on the same network.
638  */
639 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
640 {
641 	// FIXME: any other fields we have to compare?
642 	return aib1->edf1.net_id == aib2->edf1.net_id;
643 }
644 
645 /*
646  * Wrapper for etr_stei that converts physical port states
647  * to logical port states to be consistent with the output
648  * of stetr (see etr_psc vs. etr_lpsc).
649  */
650 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
651 {
652 	BUG_ON(etr_steai(aib, func) != 0);
653 	/* Convert port state to logical port state. */
654 	if (aib->esw.psc0 == 1)
655 		aib->esw.psc0 = 2;
656 	else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
657 		aib->esw.psc0 = 1;
658 	if (aib->esw.psc1 == 1)
659 		aib->esw.psc1 = 2;
660 	else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
661 		aib->esw.psc1 = 1;
662 }
663 
664 /*
665  * Check if the aib a2 is still connected to the same attachment as
666  * aib a1, the etv values differ by one and a2 is valid.
667  */
668 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
669 {
670 	int state_a1, state_a2;
671 
672 	/* Paranoia check: e0/e1 should better be the same. */
673 	if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
674 	    a1->esw.eacr.e1 != a2->esw.eacr.e1)
675 		return 0;
676 
677 	/* Still connected to the same etr ? */
678 	state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
679 	state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
680 	if (state_a1 == etr_lpsc_operational_step) {
681 		if (state_a2 != etr_lpsc_operational_step ||
682 		    a1->edf1.net_id != a2->edf1.net_id ||
683 		    a1->edf1.etr_id != a2->edf1.etr_id ||
684 		    a1->edf1.etr_pn != a2->edf1.etr_pn)
685 			return 0;
686 	} else if (state_a2 != etr_lpsc_pps_mode)
687 		return 0;
688 
689 	/* The ETV value of a2 needs to be ETV of a1 + 1. */
690 	if (a1->edf2.etv + 1 != a2->edf2.etv)
691 		return 0;
692 
693 	if (!etr_port_valid(a2, p))
694 		return 0;
695 
696 	return 1;
697 }
698 
699 struct clock_sync_data {
700 	atomic_t cpus;
701 	int in_sync;
702 	unsigned long long fixup_cc;
703 	int etr_port;
704 	struct etr_aib *etr_aib;
705 };
706 
707 static void clock_sync_cpu(struct clock_sync_data *sync)
708 {
709 	atomic_dec(&sync->cpus);
710 	enable_sync_clock();
711 	/*
712 	 * This looks like a busy wait loop but it isn't. etr_sync_cpus
713 	 * is called on all other cpus while the TOD clocks is stopped.
714 	 * __udelay will stop the cpu on an enabled wait psw until the
715 	 * TOD is running again.
716 	 */
717 	while (sync->in_sync == 0) {
718 		__udelay(1);
719 		/*
720 		 * A different cpu changes *in_sync. Therefore use
721 		 * barrier() to force memory access.
722 		 */
723 		barrier();
724 	}
725 	if (sync->in_sync != 1)
726 		/* Didn't work. Clear per-cpu in sync bit again. */
727 		disable_sync_clock(NULL);
728 	/*
729 	 * This round of TOD syncing is done. Set the clock comparator
730 	 * to the next tick and let the processor continue.
731 	 */
732 	fixup_clock_comparator(sync->fixup_cc);
733 }
734 
735 /*
736  * Sync the TOD clock using the port referred to by aibp. This port
737  * has to be enabled and the other port has to be disabled. The
738  * last eacr update has to be more than 1.6 seconds in the past.
739  */
740 static int etr_sync_clock(void *data)
741 {
742 	static int first;
743 	unsigned long long clock, old_clock, delay, delta;
744 	struct clock_sync_data *etr_sync;
745 	struct etr_aib *sync_port, *aib;
746 	int port;
747 	int rc;
748 
749 	etr_sync = data;
750 
751 	if (xchg(&first, 1) == 1) {
752 		/* Slave */
753 		clock_sync_cpu(etr_sync);
754 		return 0;
755 	}
756 
757 	/* Wait until all other cpus entered the sync function. */
758 	while (atomic_read(&etr_sync->cpus) != 0)
759 		cpu_relax();
760 
761 	port = etr_sync->etr_port;
762 	aib = etr_sync->etr_aib;
763 	sync_port = (port == 0) ? &etr_port0 : &etr_port1;
764 	enable_sync_clock();
765 
766 	/* Set clock to next OTE. */
767 	__ctl_set_bit(14, 21);
768 	__ctl_set_bit(0, 29);
769 	clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
770 	old_clock = get_tod_clock();
771 	if (set_tod_clock(clock) == 0) {
772 		__udelay(1);	/* Wait for the clock to start. */
773 		__ctl_clear_bit(0, 29);
774 		__ctl_clear_bit(14, 21);
775 		etr_stetr(aib);
776 		/* Adjust Linux timing variables. */
777 		delay = (unsigned long long)
778 			(aib->edf2.etv - sync_port->edf2.etv) << 32;
779 		delta = adjust_time(old_clock, clock, delay);
780 		etr_sync->fixup_cc = delta;
781 		fixup_clock_comparator(delta);
782 		/* Verify that the clock is properly set. */
783 		if (!etr_aib_follows(sync_port, aib, port)) {
784 			/* Didn't work. */
785 			disable_sync_clock(NULL);
786 			etr_sync->in_sync = -EAGAIN;
787 			rc = -EAGAIN;
788 		} else {
789 			etr_sync->in_sync = 1;
790 			rc = 0;
791 		}
792 	} else {
793 		/* Could not set the clock ?!? */
794 		__ctl_clear_bit(0, 29);
795 		__ctl_clear_bit(14, 21);
796 		disable_sync_clock(NULL);
797 		etr_sync->in_sync = -EAGAIN;
798 		rc = -EAGAIN;
799 	}
800 	xchg(&first, 0);
801 	return rc;
802 }
803 
804 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
805 {
806 	struct clock_sync_data etr_sync;
807 	struct etr_aib *sync_port;
808 	int follows;
809 	int rc;
810 
811 	/* Check if the current aib is adjacent to the sync port aib. */
812 	sync_port = (port == 0) ? &etr_port0 : &etr_port1;
813 	follows = etr_aib_follows(sync_port, aib, port);
814 	memcpy(sync_port, aib, sizeof(*aib));
815 	if (!follows)
816 		return -EAGAIN;
817 	memset(&etr_sync, 0, sizeof(etr_sync));
818 	etr_sync.etr_aib = aib;
819 	etr_sync.etr_port = port;
820 	get_online_cpus();
821 	atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
822 	rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
823 	put_online_cpus();
824 	return rc;
825 }
826 
827 /*
828  * Handle the immediate effects of the different events.
829  * The port change event is used for online/offline changes.
830  */
831 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
832 {
833 	if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
834 		eacr.es = 0;
835 	if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
836 		eacr.es = eacr.sl = 0;
837 	if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
838 		etr_port0_uptodate = etr_port1_uptodate = 0;
839 
840 	if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
841 		if (eacr.e0)
842 			/*
843 			 * Port change of an enabled port. We have to
844 			 * assume that this can have caused an stepping
845 			 * port switch.
846 			 */
847 			etr_tolec = get_tod_clock();
848 		eacr.p0 = etr_port0_online;
849 		if (!eacr.p0)
850 			eacr.e0 = 0;
851 		etr_port0_uptodate = 0;
852 	}
853 	if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
854 		if (eacr.e1)
855 			/*
856 			 * Port change of an enabled port. We have to
857 			 * assume that this can have caused an stepping
858 			 * port switch.
859 			 */
860 			etr_tolec = get_tod_clock();
861 		eacr.p1 = etr_port1_online;
862 		if (!eacr.p1)
863 			eacr.e1 = 0;
864 		etr_port1_uptodate = 0;
865 	}
866 	clear_bit(ETR_EVENT_UPDATE, &etr_events);
867 	return eacr;
868 }
869 
870 /*
871  * Set up a timer that expires after the etr_tolec + 1.6 seconds if
872  * one of the ports needs an update.
873  */
874 static void etr_set_tolec_timeout(unsigned long long now)
875 {
876 	unsigned long micros;
877 
878 	if ((!etr_eacr.p0 || etr_port0_uptodate) &&
879 	    (!etr_eacr.p1 || etr_port1_uptodate))
880 		return;
881 	micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
882 	micros = (micros > 1600000) ? 0 : 1600000 - micros;
883 	mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
884 }
885 
886 /*
887  * Set up a time that expires after 1/2 second.
888  */
889 static void etr_set_sync_timeout(void)
890 {
891 	mod_timer(&etr_timer, jiffies + HZ/2);
892 }
893 
894 /*
895  * Update the aib information for one or both ports.
896  */
897 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
898 					 struct etr_eacr eacr)
899 {
900 	/* With both ports disabled the aib information is useless. */
901 	if (!eacr.e0 && !eacr.e1)
902 		return eacr;
903 
904 	/* Update port0 or port1 with aib stored in etr_work_fn. */
905 	if (aib->esw.q == 0) {
906 		/* Information for port 0 stored. */
907 		if (eacr.p0 && !etr_port0_uptodate) {
908 			etr_port0 = *aib;
909 			if (etr_port0_online)
910 				etr_port0_uptodate = 1;
911 		}
912 	} else {
913 		/* Information for port 1 stored. */
914 		if (eacr.p1 && !etr_port1_uptodate) {
915 			etr_port1 = *aib;
916 			if (etr_port0_online)
917 				etr_port1_uptodate = 1;
918 		}
919 	}
920 
921 	/*
922 	 * Do not try to get the alternate port aib if the clock
923 	 * is not in sync yet.
924 	 */
925 	if (!eacr.es || !check_sync_clock())
926 		return eacr;
927 
928 	/*
929 	 * If steai is available we can get the information about
930 	 * the other port immediately. If only stetr is available the
931 	 * data-port bit toggle has to be used.
932 	 */
933 	if (etr_steai_available) {
934 		if (eacr.p0 && !etr_port0_uptodate) {
935 			etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
936 			etr_port0_uptodate = 1;
937 		}
938 		if (eacr.p1 && !etr_port1_uptodate) {
939 			etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
940 			etr_port1_uptodate = 1;
941 		}
942 	} else {
943 		/*
944 		 * One port was updated above, if the other
945 		 * port is not uptodate toggle dp bit.
946 		 */
947 		if ((eacr.p0 && !etr_port0_uptodate) ||
948 		    (eacr.p1 && !etr_port1_uptodate))
949 			eacr.dp ^= 1;
950 		else
951 			eacr.dp = 0;
952 	}
953 	return eacr;
954 }
955 
956 /*
957  * Write new etr control register if it differs from the current one.
958  * Return 1 if etr_tolec has been updated as well.
959  */
960 static void etr_update_eacr(struct etr_eacr eacr)
961 {
962 	int dp_changed;
963 
964 	if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
965 		/* No change, return. */
966 		return;
967 	/*
968 	 * The disable of an active port of the change of the data port
969 	 * bit can/will cause a change in the data port.
970 	 */
971 	dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
972 		(etr_eacr.dp ^ eacr.dp) != 0;
973 	etr_eacr = eacr;
974 	etr_setr(&etr_eacr);
975 	if (dp_changed)
976 		etr_tolec = get_tod_clock();
977 }
978 
979 /*
980  * ETR work. In this function you'll find the main logic. In
981  * particular this is the only function that calls etr_update_eacr(),
982  * it "controls" the etr control register.
983  */
984 static void etr_work_fn(struct work_struct *work)
985 {
986 	unsigned long long now;
987 	struct etr_eacr eacr;
988 	struct etr_aib aib;
989 	int sync_port;
990 
991 	/* prevent multiple execution. */
992 	mutex_lock(&etr_work_mutex);
993 
994 	/* Create working copy of etr_eacr. */
995 	eacr = etr_eacr;
996 
997 	/* Check for the different events and their immediate effects. */
998 	eacr = etr_handle_events(eacr);
999 
1000 	/* Check if ETR is supposed to be active. */
1001 	eacr.ea = eacr.p0 || eacr.p1;
1002 	if (!eacr.ea) {
1003 		/* Both ports offline. Reset everything. */
1004 		eacr.dp = eacr.es = eacr.sl = 0;
1005 		on_each_cpu(disable_sync_clock, NULL, 1);
1006 		del_timer_sync(&etr_timer);
1007 		etr_update_eacr(eacr);
1008 		goto out_unlock;
1009 	}
1010 
1011 	/* Store aib to get the current ETR status word. */
1012 	BUG_ON(etr_stetr(&aib) != 0);
1013 	etr_port0.esw = etr_port1.esw = aib.esw;	/* Copy status word. */
1014 	now = get_tod_clock();
1015 
1016 	/*
1017 	 * Update the port information if the last stepping port change
1018 	 * or data port change is older than 1.6 seconds.
1019 	 */
1020 	if (now >= etr_tolec + (1600000 << 12))
1021 		eacr = etr_handle_update(&aib, eacr);
1022 
1023 	/*
1024 	 * Select ports to enable. The preferred synchronization mode is PPS.
1025 	 * If a port can be enabled depends on a number of things:
1026 	 * 1) The port needs to be online and uptodate. A port is not
1027 	 *    disabled just because it is not uptodate, but it is only
1028 	 *    enabled if it is uptodate.
1029 	 * 2) The port needs to have the same mode (pps / etr).
1030 	 * 3) The port needs to be usable -> etr_port_valid() == 1
1031 	 * 4) To enable the second port the clock needs to be in sync.
1032 	 * 5) If both ports are useable and are ETR ports, the network id
1033 	 *    has to be the same.
1034 	 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1035 	 */
1036 	if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1037 		eacr.sl = 0;
1038 		eacr.e0 = 1;
1039 		if (!etr_mode_is_pps(etr_eacr))
1040 			eacr.es = 0;
1041 		if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1042 			eacr.e1 = 0;
1043 		// FIXME: uptodate checks ?
1044 		else if (etr_port0_uptodate && etr_port1_uptodate)
1045 			eacr.e1 = 1;
1046 		sync_port = (etr_port0_uptodate &&
1047 			     etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1048 	} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1049 		eacr.sl = 0;
1050 		eacr.e0 = 0;
1051 		eacr.e1 = 1;
1052 		if (!etr_mode_is_pps(etr_eacr))
1053 			eacr.es = 0;
1054 		sync_port = (etr_port1_uptodate &&
1055 			     etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1056 	} else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1057 		eacr.sl = 1;
1058 		eacr.e0 = 1;
1059 		if (!etr_mode_is_etr(etr_eacr))
1060 			eacr.es = 0;
1061 		if (!eacr.es || !eacr.p1 ||
1062 		    aib.esw.psc1 != etr_lpsc_operational_alt)
1063 			eacr.e1 = 0;
1064 		else if (etr_port0_uptodate && etr_port1_uptodate &&
1065 			 etr_compare_network(&etr_port0, &etr_port1))
1066 			eacr.e1 = 1;
1067 		sync_port = (etr_port0_uptodate &&
1068 			     etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1069 	} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1070 		eacr.sl = 1;
1071 		eacr.e0 = 0;
1072 		eacr.e1 = 1;
1073 		if (!etr_mode_is_etr(etr_eacr))
1074 			eacr.es = 0;
1075 		sync_port = (etr_port1_uptodate &&
1076 			     etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1077 	} else {
1078 		/* Both ports not usable. */
1079 		eacr.es = eacr.sl = 0;
1080 		sync_port = -1;
1081 	}
1082 
1083 	/*
1084 	 * If the clock is in sync just update the eacr and return.
1085 	 * If there is no valid sync port wait for a port update.
1086 	 */
1087 	if ((eacr.es && check_sync_clock()) || sync_port < 0) {
1088 		etr_update_eacr(eacr);
1089 		etr_set_tolec_timeout(now);
1090 		goto out_unlock;
1091 	}
1092 
1093 	/*
1094 	 * Prepare control register for clock syncing
1095 	 * (reset data port bit, set sync check control.
1096 	 */
1097 	eacr.dp = 0;
1098 	eacr.es = 1;
1099 
1100 	/*
1101 	 * Update eacr and try to synchronize the clock. If the update
1102 	 * of eacr caused a stepping port switch (or if we have to
1103 	 * assume that a stepping port switch has occurred) or the
1104 	 * clock syncing failed, reset the sync check control bit
1105 	 * and set up a timer to try again after 0.5 seconds
1106 	 */
1107 	etr_update_eacr(eacr);
1108 	if (now < etr_tolec + (1600000 << 12) ||
1109 	    etr_sync_clock_stop(&aib, sync_port) != 0) {
1110 		/* Sync failed. Try again in 1/2 second. */
1111 		eacr.es = 0;
1112 		etr_update_eacr(eacr);
1113 		etr_set_sync_timeout();
1114 	} else
1115 		etr_set_tolec_timeout(now);
1116 out_unlock:
1117 	mutex_unlock(&etr_work_mutex);
1118 }
1119 
1120 /*
1121  * Sysfs interface functions
1122  */
1123 static struct bus_type etr_subsys = {
1124 	.name		= "etr",
1125 	.dev_name	= "etr",
1126 };
1127 
1128 static struct device etr_port0_dev = {
1129 	.id	= 0,
1130 	.bus	= &etr_subsys,
1131 };
1132 
1133 static struct device etr_port1_dev = {
1134 	.id	= 1,
1135 	.bus	= &etr_subsys,
1136 };
1137 
1138 /*
1139  * ETR subsys attributes
1140  */
1141 static ssize_t etr_stepping_port_show(struct device *dev,
1142 					struct device_attribute *attr,
1143 					char *buf)
1144 {
1145 	return sprintf(buf, "%i\n", etr_port0.esw.p);
1146 }
1147 
1148 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1149 
1150 static ssize_t etr_stepping_mode_show(struct device *dev,
1151 					struct device_attribute *attr,
1152 					char *buf)
1153 {
1154 	char *mode_str;
1155 
1156 	if (etr_mode_is_pps(etr_eacr))
1157 		mode_str = "pps";
1158 	else if (etr_mode_is_etr(etr_eacr))
1159 		mode_str = "etr";
1160 	else
1161 		mode_str = "local";
1162 	return sprintf(buf, "%s\n", mode_str);
1163 }
1164 
1165 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1166 
1167 /*
1168  * ETR port attributes
1169  */
1170 static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
1171 {
1172 	if (dev == &etr_port0_dev)
1173 		return etr_port0_online ? &etr_port0 : NULL;
1174 	else
1175 		return etr_port1_online ? &etr_port1 : NULL;
1176 }
1177 
1178 static ssize_t etr_online_show(struct device *dev,
1179 				struct device_attribute *attr,
1180 				char *buf)
1181 {
1182 	unsigned int online;
1183 
1184 	online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1185 	return sprintf(buf, "%i\n", online);
1186 }
1187 
1188 static ssize_t etr_online_store(struct device *dev,
1189 				struct device_attribute *attr,
1190 				const char *buf, size_t count)
1191 {
1192 	unsigned int value;
1193 
1194 	value = simple_strtoul(buf, NULL, 0);
1195 	if (value != 0 && value != 1)
1196 		return -EINVAL;
1197 	if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1198 		return -EOPNOTSUPP;
1199 	mutex_lock(&clock_sync_mutex);
1200 	if (dev == &etr_port0_dev) {
1201 		if (etr_port0_online == value)
1202 			goto out;	/* Nothing to do. */
1203 		etr_port0_online = value;
1204 		if (etr_port0_online && etr_port1_online)
1205 			set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1206 		else
1207 			clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1208 		set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1209 		queue_work(time_sync_wq, &etr_work);
1210 	} else {
1211 		if (etr_port1_online == value)
1212 			goto out;	/* Nothing to do. */
1213 		etr_port1_online = value;
1214 		if (etr_port0_online && etr_port1_online)
1215 			set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1216 		else
1217 			clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1218 		set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1219 		queue_work(time_sync_wq, &etr_work);
1220 	}
1221 out:
1222 	mutex_unlock(&clock_sync_mutex);
1223 	return count;
1224 }
1225 
1226 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
1227 
1228 static ssize_t etr_stepping_control_show(struct device *dev,
1229 					struct device_attribute *attr,
1230 					char *buf)
1231 {
1232 	return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1233 		       etr_eacr.e0 : etr_eacr.e1);
1234 }
1235 
1236 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1237 
1238 static ssize_t etr_mode_code_show(struct device *dev,
1239 				struct device_attribute *attr, char *buf)
1240 {
1241 	if (!etr_port0_online && !etr_port1_online)
1242 		/* Status word is not uptodate if both ports are offline. */
1243 		return -ENODATA;
1244 	return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1245 		       etr_port0.esw.psc0 : etr_port0.esw.psc1);
1246 }
1247 
1248 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1249 
1250 static ssize_t etr_untuned_show(struct device *dev,
1251 				struct device_attribute *attr, char *buf)
1252 {
1253 	struct etr_aib *aib = etr_aib_from_dev(dev);
1254 
1255 	if (!aib || !aib->slsw.v1)
1256 		return -ENODATA;
1257 	return sprintf(buf, "%i\n", aib->edf1.u);
1258 }
1259 
1260 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
1261 
1262 static ssize_t etr_network_id_show(struct device *dev,
1263 				struct device_attribute *attr, char *buf)
1264 {
1265 	struct etr_aib *aib = etr_aib_from_dev(dev);
1266 
1267 	if (!aib || !aib->slsw.v1)
1268 		return -ENODATA;
1269 	return sprintf(buf, "%i\n", aib->edf1.net_id);
1270 }
1271 
1272 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
1273 
1274 static ssize_t etr_id_show(struct device *dev,
1275 			struct device_attribute *attr, char *buf)
1276 {
1277 	struct etr_aib *aib = etr_aib_from_dev(dev);
1278 
1279 	if (!aib || !aib->slsw.v1)
1280 		return -ENODATA;
1281 	return sprintf(buf, "%i\n", aib->edf1.etr_id);
1282 }
1283 
1284 static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
1285 
1286 static ssize_t etr_port_number_show(struct device *dev,
1287 			struct device_attribute *attr, char *buf)
1288 {
1289 	struct etr_aib *aib = etr_aib_from_dev(dev);
1290 
1291 	if (!aib || !aib->slsw.v1)
1292 		return -ENODATA;
1293 	return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1294 }
1295 
1296 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
1297 
1298 static ssize_t etr_coupled_show(struct device *dev,
1299 			struct device_attribute *attr, char *buf)
1300 {
1301 	struct etr_aib *aib = etr_aib_from_dev(dev);
1302 
1303 	if (!aib || !aib->slsw.v3)
1304 		return -ENODATA;
1305 	return sprintf(buf, "%i\n", aib->edf3.c);
1306 }
1307 
1308 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
1309 
1310 static ssize_t etr_local_time_show(struct device *dev,
1311 			struct device_attribute *attr, char *buf)
1312 {
1313 	struct etr_aib *aib = etr_aib_from_dev(dev);
1314 
1315 	if (!aib || !aib->slsw.v3)
1316 		return -ENODATA;
1317 	return sprintf(buf, "%i\n", aib->edf3.blto);
1318 }
1319 
1320 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
1321 
1322 static ssize_t etr_utc_offset_show(struct device *dev,
1323 			struct device_attribute *attr, char *buf)
1324 {
1325 	struct etr_aib *aib = etr_aib_from_dev(dev);
1326 
1327 	if (!aib || !aib->slsw.v3)
1328 		return -ENODATA;
1329 	return sprintf(buf, "%i\n", aib->edf3.buo);
1330 }
1331 
1332 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1333 
1334 static struct device_attribute *etr_port_attributes[] = {
1335 	&dev_attr_online,
1336 	&dev_attr_stepping_control,
1337 	&dev_attr_state_code,
1338 	&dev_attr_untuned,
1339 	&dev_attr_network,
1340 	&dev_attr_id,
1341 	&dev_attr_port,
1342 	&dev_attr_coupled,
1343 	&dev_attr_local_time,
1344 	&dev_attr_utc_offset,
1345 	NULL
1346 };
1347 
1348 static int __init etr_register_port(struct device *dev)
1349 {
1350 	struct device_attribute **attr;
1351 	int rc;
1352 
1353 	rc = device_register(dev);
1354 	if (rc)
1355 		goto out;
1356 	for (attr = etr_port_attributes; *attr; attr++) {
1357 		rc = device_create_file(dev, *attr);
1358 		if (rc)
1359 			goto out_unreg;
1360 	}
1361 	return 0;
1362 out_unreg:
1363 	for (; attr >= etr_port_attributes; attr--)
1364 		device_remove_file(dev, *attr);
1365 	device_unregister(dev);
1366 out:
1367 	return rc;
1368 }
1369 
1370 static void __init etr_unregister_port(struct device *dev)
1371 {
1372 	struct device_attribute **attr;
1373 
1374 	for (attr = etr_port_attributes; *attr; attr++)
1375 		device_remove_file(dev, *attr);
1376 	device_unregister(dev);
1377 }
1378 
1379 static int __init etr_init_sysfs(void)
1380 {
1381 	int rc;
1382 
1383 	rc = subsys_system_register(&etr_subsys, NULL);
1384 	if (rc)
1385 		goto out;
1386 	rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1387 	if (rc)
1388 		goto out_unreg_subsys;
1389 	rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1390 	if (rc)
1391 		goto out_remove_stepping_port;
1392 	rc = etr_register_port(&etr_port0_dev);
1393 	if (rc)
1394 		goto out_remove_stepping_mode;
1395 	rc = etr_register_port(&etr_port1_dev);
1396 	if (rc)
1397 		goto out_remove_port0;
1398 	return 0;
1399 
1400 out_remove_port0:
1401 	etr_unregister_port(&etr_port0_dev);
1402 out_remove_stepping_mode:
1403 	device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
1404 out_remove_stepping_port:
1405 	device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
1406 out_unreg_subsys:
1407 	bus_unregister(&etr_subsys);
1408 out:
1409 	return rc;
1410 }
1411 
1412 device_initcall(etr_init_sysfs);
1413 
1414 /*
1415  * Server Time Protocol (STP) code.
1416  */
1417 static int stp_online;
1418 static struct stp_sstpi stp_info;
1419 static void *stp_page;
1420 
1421 static void stp_work_fn(struct work_struct *work);
1422 static DEFINE_MUTEX(stp_work_mutex);
1423 static DECLARE_WORK(stp_work, stp_work_fn);
1424 static struct timer_list stp_timer;
1425 
1426 static int __init early_parse_stp(char *p)
1427 {
1428 	if (strncmp(p, "off", 3) == 0)
1429 		stp_online = 0;
1430 	else if (strncmp(p, "on", 2) == 0)
1431 		stp_online = 1;
1432 	return 0;
1433 }
1434 early_param("stp", early_parse_stp);
1435 
1436 /*
1437  * Reset STP attachment.
1438  */
1439 static void __init stp_reset(void)
1440 {
1441 	int rc;
1442 
1443 	stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1444 	rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1445 	if (rc == 0)
1446 		set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1447 	else if (stp_online) {
1448 		pr_warning("The real or virtual hardware system does "
1449 			   "not provide an STP interface\n");
1450 		free_page((unsigned long) stp_page);
1451 		stp_page = NULL;
1452 		stp_online = 0;
1453 	}
1454 }
1455 
1456 static void stp_timeout(unsigned long dummy)
1457 {
1458 	queue_work(time_sync_wq, &stp_work);
1459 }
1460 
1461 static int __init stp_init(void)
1462 {
1463 	if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1464 		return 0;
1465 	setup_timer(&stp_timer, stp_timeout, 0UL);
1466 	time_init_wq();
1467 	if (!stp_online)
1468 		return 0;
1469 	queue_work(time_sync_wq, &stp_work);
1470 	return 0;
1471 }
1472 
1473 arch_initcall(stp_init);
1474 
1475 /*
1476  * STP timing alert. There are three causes:
1477  * 1) timing status change
1478  * 2) link availability change
1479  * 3) time control parameter change
1480  * In all three cases we are only interested in the clock source state.
1481  * If a STP clock source is now available use it.
1482  */
1483 static void stp_timing_alert(struct stp_irq_parm *intparm)
1484 {
1485 	if (intparm->tsc || intparm->lac || intparm->tcpc)
1486 		queue_work(time_sync_wq, &stp_work);
1487 }
1488 
1489 /*
1490  * STP sync check machine check. This is called when the timing state
1491  * changes from the synchronized state to the unsynchronized state.
1492  * After a STP sync check the clock is not in sync. The machine check
1493  * is broadcasted to all cpus at the same time.
1494  */
1495 void stp_sync_check(void)
1496 {
1497 	disable_sync_clock(NULL);
1498 	queue_work(time_sync_wq, &stp_work);
1499 }
1500 
1501 /*
1502  * STP island condition machine check. This is called when an attached
1503  * server  attempts to communicate over an STP link and the servers
1504  * have matching CTN ids and have a valid stratum-1 configuration
1505  * but the configurations do not match.
1506  */
1507 void stp_island_check(void)
1508 {
1509 	disable_sync_clock(NULL);
1510 	queue_work(time_sync_wq, &stp_work);
1511 }
1512 
1513 
1514 static int stp_sync_clock(void *data)
1515 {
1516 	static int first;
1517 	unsigned long long old_clock, delta;
1518 	struct clock_sync_data *stp_sync;
1519 	int rc;
1520 
1521 	stp_sync = data;
1522 
1523 	if (xchg(&first, 1) == 1) {
1524 		/* Slave */
1525 		clock_sync_cpu(stp_sync);
1526 		return 0;
1527 	}
1528 
1529 	/* Wait until all other cpus entered the sync function. */
1530 	while (atomic_read(&stp_sync->cpus) != 0)
1531 		cpu_relax();
1532 
1533 	enable_sync_clock();
1534 
1535 	rc = 0;
1536 	if (stp_info.todoff[0] || stp_info.todoff[1] ||
1537 	    stp_info.todoff[2] || stp_info.todoff[3] ||
1538 	    stp_info.tmd != 2) {
1539 		old_clock = get_tod_clock();
1540 		rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1541 		if (rc == 0) {
1542 			delta = adjust_time(old_clock, get_tod_clock(), 0);
1543 			fixup_clock_comparator(delta);
1544 			rc = chsc_sstpi(stp_page, &stp_info,
1545 					sizeof(struct stp_sstpi));
1546 			if (rc == 0 && stp_info.tmd != 2)
1547 				rc = -EAGAIN;
1548 		}
1549 	}
1550 	if (rc) {
1551 		disable_sync_clock(NULL);
1552 		stp_sync->in_sync = -EAGAIN;
1553 	} else
1554 		stp_sync->in_sync = 1;
1555 	xchg(&first, 0);
1556 	return 0;
1557 }
1558 
1559 /*
1560  * STP work. Check for the STP state and take over the clock
1561  * synchronization if the STP clock source is usable.
1562  */
1563 static void stp_work_fn(struct work_struct *work)
1564 {
1565 	struct clock_sync_data stp_sync;
1566 	int rc;
1567 
1568 	/* prevent multiple execution. */
1569 	mutex_lock(&stp_work_mutex);
1570 
1571 	if (!stp_online) {
1572 		chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1573 		del_timer_sync(&stp_timer);
1574 		goto out_unlock;
1575 	}
1576 
1577 	rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1578 	if (rc)
1579 		goto out_unlock;
1580 
1581 	rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1582 	if (rc || stp_info.c == 0)
1583 		goto out_unlock;
1584 
1585 	/* Skip synchronization if the clock is already in sync. */
1586 	if (check_sync_clock())
1587 		goto out_unlock;
1588 
1589 	memset(&stp_sync, 0, sizeof(stp_sync));
1590 	get_online_cpus();
1591 	atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1592 	stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
1593 	put_online_cpus();
1594 
1595 	if (!check_sync_clock())
1596 		/*
1597 		 * There is a usable clock but the synchonization failed.
1598 		 * Retry after a second.
1599 		 */
1600 		mod_timer(&stp_timer, jiffies + HZ);
1601 
1602 out_unlock:
1603 	mutex_unlock(&stp_work_mutex);
1604 }
1605 
1606 /*
1607  * STP subsys sysfs interface functions
1608  */
1609 static struct bus_type stp_subsys = {
1610 	.name		= "stp",
1611 	.dev_name	= "stp",
1612 };
1613 
1614 static ssize_t stp_ctn_id_show(struct device *dev,
1615 				struct device_attribute *attr,
1616 				char *buf)
1617 {
1618 	if (!stp_online)
1619 		return -ENODATA;
1620 	return sprintf(buf, "%016llx\n",
1621 		       *(unsigned long long *) stp_info.ctnid);
1622 }
1623 
1624 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1625 
1626 static ssize_t stp_ctn_type_show(struct device *dev,
1627 				struct device_attribute *attr,
1628 				char *buf)
1629 {
1630 	if (!stp_online)
1631 		return -ENODATA;
1632 	return sprintf(buf, "%i\n", stp_info.ctn);
1633 }
1634 
1635 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1636 
1637 static ssize_t stp_dst_offset_show(struct device *dev,
1638 				   struct device_attribute *attr,
1639 				   char *buf)
1640 {
1641 	if (!stp_online || !(stp_info.vbits & 0x2000))
1642 		return -ENODATA;
1643 	return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1644 }
1645 
1646 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1647 
1648 static ssize_t stp_leap_seconds_show(struct device *dev,
1649 					struct device_attribute *attr,
1650 					char *buf)
1651 {
1652 	if (!stp_online || !(stp_info.vbits & 0x8000))
1653 		return -ENODATA;
1654 	return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1655 }
1656 
1657 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1658 
1659 static ssize_t stp_stratum_show(struct device *dev,
1660 				struct device_attribute *attr,
1661 				char *buf)
1662 {
1663 	if (!stp_online)
1664 		return -ENODATA;
1665 	return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1666 }
1667 
1668 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
1669 
1670 static ssize_t stp_time_offset_show(struct device *dev,
1671 				struct device_attribute *attr,
1672 				char *buf)
1673 {
1674 	if (!stp_online || !(stp_info.vbits & 0x0800))
1675 		return -ENODATA;
1676 	return sprintf(buf, "%i\n", (int) stp_info.tto);
1677 }
1678 
1679 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1680 
1681 static ssize_t stp_time_zone_offset_show(struct device *dev,
1682 				struct device_attribute *attr,
1683 				char *buf)
1684 {
1685 	if (!stp_online || !(stp_info.vbits & 0x4000))
1686 		return -ENODATA;
1687 	return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1688 }
1689 
1690 static DEVICE_ATTR(time_zone_offset, 0400,
1691 			 stp_time_zone_offset_show, NULL);
1692 
1693 static ssize_t stp_timing_mode_show(struct device *dev,
1694 				struct device_attribute *attr,
1695 				char *buf)
1696 {
1697 	if (!stp_online)
1698 		return -ENODATA;
1699 	return sprintf(buf, "%i\n", stp_info.tmd);
1700 }
1701 
1702 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1703 
1704 static ssize_t stp_timing_state_show(struct device *dev,
1705 				struct device_attribute *attr,
1706 				char *buf)
1707 {
1708 	if (!stp_online)
1709 		return -ENODATA;
1710 	return sprintf(buf, "%i\n", stp_info.tst);
1711 }
1712 
1713 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1714 
1715 static ssize_t stp_online_show(struct device *dev,
1716 				struct device_attribute *attr,
1717 				char *buf)
1718 {
1719 	return sprintf(buf, "%i\n", stp_online);
1720 }
1721 
1722 static ssize_t stp_online_store(struct device *dev,
1723 				struct device_attribute *attr,
1724 				const char *buf, size_t count)
1725 {
1726 	unsigned int value;
1727 
1728 	value = simple_strtoul(buf, NULL, 0);
1729 	if (value != 0 && value != 1)
1730 		return -EINVAL;
1731 	if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1732 		return -EOPNOTSUPP;
1733 	mutex_lock(&clock_sync_mutex);
1734 	stp_online = value;
1735 	if (stp_online)
1736 		set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1737 	else
1738 		clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1739 	queue_work(time_sync_wq, &stp_work);
1740 	mutex_unlock(&clock_sync_mutex);
1741 	return count;
1742 }
1743 
1744 /*
1745  * Can't use DEVICE_ATTR because the attribute should be named
1746  * stp/online but dev_attr_online already exists in this file ..
1747  */
1748 static struct device_attribute dev_attr_stp_online = {
1749 	.attr = { .name = "online", .mode = 0600 },
1750 	.show	= stp_online_show,
1751 	.store	= stp_online_store,
1752 };
1753 
1754 static struct device_attribute *stp_attributes[] = {
1755 	&dev_attr_ctn_id,
1756 	&dev_attr_ctn_type,
1757 	&dev_attr_dst_offset,
1758 	&dev_attr_leap_seconds,
1759 	&dev_attr_stp_online,
1760 	&dev_attr_stratum,
1761 	&dev_attr_time_offset,
1762 	&dev_attr_time_zone_offset,
1763 	&dev_attr_timing_mode,
1764 	&dev_attr_timing_state,
1765 	NULL
1766 };
1767 
1768 static int __init stp_init_sysfs(void)
1769 {
1770 	struct device_attribute **attr;
1771 	int rc;
1772 
1773 	rc = subsys_system_register(&stp_subsys, NULL);
1774 	if (rc)
1775 		goto out;
1776 	for (attr = stp_attributes; *attr; attr++) {
1777 		rc = device_create_file(stp_subsys.dev_root, *attr);
1778 		if (rc)
1779 			goto out_unreg;
1780 	}
1781 	return 0;
1782 out_unreg:
1783 	for (; attr >= stp_attributes; attr--)
1784 		device_remove_file(stp_subsys.dev_root, *attr);
1785 	bus_unregister(&stp_subsys);
1786 out:
1787 	return rc;
1788 }
1789 
1790 device_initcall(stp_init_sysfs);
1791