1 /* 2 * Time of day based timer functions. 3 * 4 * S390 version 5 * Copyright IBM Corp. 1999, 2008 6 * Author(s): Hartmut Penner (hp@de.ibm.com), 7 * Martin Schwidefsky (schwidefsky@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 9 * 10 * Derived from "arch/i386/kernel/time.c" 11 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 12 */ 13 14 #define KMSG_COMPONENT "time" 15 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 16 17 #include <linux/kernel_stat.h> 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/device.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/timekeeper_internal.h> 38 #include <linux/clockchips.h> 39 #include <linux/gfp.h> 40 #include <linux/kprobes.h> 41 #include <asm/uaccess.h> 42 #include <asm/delay.h> 43 #include <asm/div64.h> 44 #include <asm/vdso.h> 45 #include <asm/irq.h> 46 #include <asm/irq_regs.h> 47 #include <asm/vtimer.h> 48 #include <asm/etr.h> 49 #include <asm/cio.h> 50 #include "entry.h" 51 52 /* change this if you have some constant time drift */ 53 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 54 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 55 56 u64 sched_clock_base_cc = -1; /* Force to data section. */ 57 EXPORT_SYMBOL_GPL(sched_clock_base_cc); 58 59 static DEFINE_PER_CPU(struct clock_event_device, comparators); 60 61 /* 62 * Scheduler clock - returns current time in nanosec units. 63 */ 64 unsigned long long notrace __kprobes sched_clock(void) 65 { 66 return tod_to_ns(get_tod_clock_monotonic()); 67 } 68 69 /* 70 * Monotonic_clock - returns # of nanoseconds passed since time_init() 71 */ 72 unsigned long long monotonic_clock(void) 73 { 74 return sched_clock(); 75 } 76 EXPORT_SYMBOL(monotonic_clock); 77 78 void tod_to_timeval(__u64 todval, struct timespec *xt) 79 { 80 unsigned long long sec; 81 82 sec = todval >> 12; 83 do_div(sec, 1000000); 84 xt->tv_sec = sec; 85 todval -= (sec * 1000000) << 12; 86 xt->tv_nsec = ((todval * 1000) >> 12); 87 } 88 EXPORT_SYMBOL(tod_to_timeval); 89 90 void clock_comparator_work(void) 91 { 92 struct clock_event_device *cd; 93 94 S390_lowcore.clock_comparator = -1ULL; 95 cd = this_cpu_ptr(&comparators); 96 cd->event_handler(cd); 97 } 98 99 /* 100 * Fixup the clock comparator. 101 */ 102 static void fixup_clock_comparator(unsigned long long delta) 103 { 104 /* If nobody is waiting there's nothing to fix. */ 105 if (S390_lowcore.clock_comparator == -1ULL) 106 return; 107 S390_lowcore.clock_comparator += delta; 108 set_clock_comparator(S390_lowcore.clock_comparator); 109 } 110 111 static int s390_next_event(unsigned long delta, 112 struct clock_event_device *evt) 113 { 114 S390_lowcore.clock_comparator = get_tod_clock() + delta; 115 set_clock_comparator(S390_lowcore.clock_comparator); 116 return 0; 117 } 118 119 static void s390_set_mode(enum clock_event_mode mode, 120 struct clock_event_device *evt) 121 { 122 } 123 124 /* 125 * Set up lowcore and control register of the current cpu to 126 * enable TOD clock and clock comparator interrupts. 127 */ 128 void init_cpu_timer(void) 129 { 130 struct clock_event_device *cd; 131 int cpu; 132 133 S390_lowcore.clock_comparator = -1ULL; 134 set_clock_comparator(S390_lowcore.clock_comparator); 135 136 cpu = smp_processor_id(); 137 cd = &per_cpu(comparators, cpu); 138 cd->name = "comparator"; 139 cd->features = CLOCK_EVT_FEAT_ONESHOT; 140 cd->mult = 16777; 141 cd->shift = 12; 142 cd->min_delta_ns = 1; 143 cd->max_delta_ns = LONG_MAX; 144 cd->rating = 400; 145 cd->cpumask = cpumask_of(cpu); 146 cd->set_next_event = s390_next_event; 147 cd->set_mode = s390_set_mode; 148 149 clockevents_register_device(cd); 150 151 /* Enable clock comparator timer interrupt. */ 152 __ctl_set_bit(0,11); 153 154 /* Always allow the timing alert external interrupt. */ 155 __ctl_set_bit(0, 4); 156 } 157 158 static void clock_comparator_interrupt(struct ext_code ext_code, 159 unsigned int param32, 160 unsigned long param64) 161 { 162 inc_irq_stat(IRQEXT_CLK); 163 if (S390_lowcore.clock_comparator == -1ULL) 164 set_clock_comparator(S390_lowcore.clock_comparator); 165 } 166 167 static void etr_timing_alert(struct etr_irq_parm *); 168 static void stp_timing_alert(struct stp_irq_parm *); 169 170 static void timing_alert_interrupt(struct ext_code ext_code, 171 unsigned int param32, unsigned long param64) 172 { 173 inc_irq_stat(IRQEXT_TLA); 174 if (param32 & 0x00c40000) 175 etr_timing_alert((struct etr_irq_parm *) ¶m32); 176 if (param32 & 0x00038000) 177 stp_timing_alert((struct stp_irq_parm *) ¶m32); 178 } 179 180 static void etr_reset(void); 181 static void stp_reset(void); 182 183 void read_persistent_clock(struct timespec *ts) 184 { 185 tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts); 186 } 187 188 void read_boot_clock(struct timespec *ts) 189 { 190 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts); 191 } 192 193 static cycle_t read_tod_clock(struct clocksource *cs) 194 { 195 return get_tod_clock(); 196 } 197 198 static struct clocksource clocksource_tod = { 199 .name = "tod", 200 .rating = 400, 201 .read = read_tod_clock, 202 .mask = -1ULL, 203 .mult = 1000, 204 .shift = 12, 205 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 206 }; 207 208 struct clocksource * __init clocksource_default_clock(void) 209 { 210 return &clocksource_tod; 211 } 212 213 void update_vsyscall(struct timekeeper *tk) 214 { 215 u64 nsecps; 216 217 if (tk->tkr.clock != &clocksource_tod) 218 return; 219 220 /* Make userspace gettimeofday spin until we're done. */ 221 ++vdso_data->tb_update_count; 222 smp_wmb(); 223 vdso_data->xtime_tod_stamp = tk->tkr.cycle_last; 224 vdso_data->xtime_clock_sec = tk->xtime_sec; 225 vdso_data->xtime_clock_nsec = tk->tkr.xtime_nsec; 226 vdso_data->wtom_clock_sec = 227 tk->xtime_sec + tk->wall_to_monotonic.tv_sec; 228 vdso_data->wtom_clock_nsec = tk->tkr.xtime_nsec + 229 + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr.shift); 230 nsecps = (u64) NSEC_PER_SEC << tk->tkr.shift; 231 while (vdso_data->wtom_clock_nsec >= nsecps) { 232 vdso_data->wtom_clock_nsec -= nsecps; 233 vdso_data->wtom_clock_sec++; 234 } 235 236 vdso_data->xtime_coarse_sec = tk->xtime_sec; 237 vdso_data->xtime_coarse_nsec = 238 (long)(tk->tkr.xtime_nsec >> tk->tkr.shift); 239 vdso_data->wtom_coarse_sec = 240 vdso_data->xtime_coarse_sec + tk->wall_to_monotonic.tv_sec; 241 vdso_data->wtom_coarse_nsec = 242 vdso_data->xtime_coarse_nsec + tk->wall_to_monotonic.tv_nsec; 243 while (vdso_data->wtom_coarse_nsec >= NSEC_PER_SEC) { 244 vdso_data->wtom_coarse_nsec -= NSEC_PER_SEC; 245 vdso_data->wtom_coarse_sec++; 246 } 247 248 vdso_data->tk_mult = tk->tkr.mult; 249 vdso_data->tk_shift = tk->tkr.shift; 250 smp_wmb(); 251 ++vdso_data->tb_update_count; 252 } 253 254 extern struct timezone sys_tz; 255 256 void update_vsyscall_tz(void) 257 { 258 /* Make userspace gettimeofday spin until we're done. */ 259 ++vdso_data->tb_update_count; 260 smp_wmb(); 261 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 262 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 263 smp_wmb(); 264 ++vdso_data->tb_update_count; 265 } 266 267 /* 268 * Initialize the TOD clock and the CPU timer of 269 * the boot cpu. 270 */ 271 void __init time_init(void) 272 { 273 /* Reset time synchronization interfaces. */ 274 etr_reset(); 275 stp_reset(); 276 277 /* request the clock comparator external interrupt */ 278 if (register_external_irq(EXT_IRQ_CLK_COMP, clock_comparator_interrupt)) 279 panic("Couldn't request external interrupt 0x1004"); 280 281 /* request the timing alert external interrupt */ 282 if (register_external_irq(EXT_IRQ_TIMING_ALERT, timing_alert_interrupt)) 283 panic("Couldn't request external interrupt 0x1406"); 284 285 if (clocksource_register(&clocksource_tod) != 0) 286 panic("Could not register TOD clock source"); 287 288 /* Enable TOD clock interrupts on the boot cpu. */ 289 init_cpu_timer(); 290 291 /* Enable cpu timer interrupts on the boot cpu. */ 292 vtime_init(); 293 } 294 295 /* 296 * The time is "clock". old is what we think the time is. 297 * Adjust the value by a multiple of jiffies and add the delta to ntp. 298 * "delay" is an approximation how long the synchronization took. If 299 * the time correction is positive, then "delay" is subtracted from 300 * the time difference and only the remaining part is passed to ntp. 301 */ 302 static unsigned long long adjust_time(unsigned long long old, 303 unsigned long long clock, 304 unsigned long long delay) 305 { 306 unsigned long long delta, ticks; 307 struct timex adjust; 308 309 if (clock > old) { 310 /* It is later than we thought. */ 311 delta = ticks = clock - old; 312 delta = ticks = (delta < delay) ? 0 : delta - delay; 313 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 314 adjust.offset = ticks * (1000000 / HZ); 315 } else { 316 /* It is earlier than we thought. */ 317 delta = ticks = old - clock; 318 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 319 delta = -delta; 320 adjust.offset = -ticks * (1000000 / HZ); 321 } 322 sched_clock_base_cc += delta; 323 if (adjust.offset != 0) { 324 pr_notice("The ETR interface has adjusted the clock " 325 "by %li microseconds\n", adjust.offset); 326 adjust.modes = ADJ_OFFSET_SINGLESHOT; 327 do_adjtimex(&adjust); 328 } 329 return delta; 330 } 331 332 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 333 static DEFINE_MUTEX(clock_sync_mutex); 334 static unsigned long clock_sync_flags; 335 336 #define CLOCK_SYNC_HAS_ETR 0 337 #define CLOCK_SYNC_HAS_STP 1 338 #define CLOCK_SYNC_ETR 2 339 #define CLOCK_SYNC_STP 3 340 341 /* 342 * The synchronous get_clock function. It will write the current clock 343 * value to the clock pointer and return 0 if the clock is in sync with 344 * the external time source. If the clock mode is local it will return 345 * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external 346 * reference. 347 */ 348 int get_sync_clock(unsigned long long *clock) 349 { 350 atomic_t *sw_ptr; 351 unsigned int sw0, sw1; 352 353 sw_ptr = &get_cpu_var(clock_sync_word); 354 sw0 = atomic_read(sw_ptr); 355 *clock = get_tod_clock(); 356 sw1 = atomic_read(sw_ptr); 357 put_cpu_var(clock_sync_word); 358 if (sw0 == sw1 && (sw0 & 0x80000000U)) 359 /* Success: time is in sync. */ 360 return 0; 361 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 362 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 363 return -EOPNOTSUPP; 364 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 365 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 366 return -EACCES; 367 return -EAGAIN; 368 } 369 EXPORT_SYMBOL(get_sync_clock); 370 371 /* 372 * Make get_sync_clock return -EAGAIN. 373 */ 374 static void disable_sync_clock(void *dummy) 375 { 376 atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word); 377 /* 378 * Clear the in-sync bit 2^31. All get_sync_clock calls will 379 * fail until the sync bit is turned back on. In addition 380 * increase the "sequence" counter to avoid the race of an 381 * etr event and the complete recovery against get_sync_clock. 382 */ 383 atomic_clear_mask(0x80000000, sw_ptr); 384 atomic_inc(sw_ptr); 385 } 386 387 /* 388 * Make get_sync_clock return 0 again. 389 * Needs to be called from a context disabled for preemption. 390 */ 391 static void enable_sync_clock(void) 392 { 393 atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word); 394 atomic_set_mask(0x80000000, sw_ptr); 395 } 396 397 /* 398 * Function to check if the clock is in sync. 399 */ 400 static inline int check_sync_clock(void) 401 { 402 atomic_t *sw_ptr; 403 int rc; 404 405 sw_ptr = &get_cpu_var(clock_sync_word); 406 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 407 put_cpu_var(clock_sync_word); 408 return rc; 409 } 410 411 /* Single threaded workqueue used for etr and stp sync events */ 412 static struct workqueue_struct *time_sync_wq; 413 414 static void __init time_init_wq(void) 415 { 416 if (time_sync_wq) 417 return; 418 time_sync_wq = create_singlethread_workqueue("timesync"); 419 } 420 421 /* 422 * External Time Reference (ETR) code. 423 */ 424 static int etr_port0_online; 425 static int etr_port1_online; 426 static int etr_steai_available; 427 428 static int __init early_parse_etr(char *p) 429 { 430 if (strncmp(p, "off", 3) == 0) 431 etr_port0_online = etr_port1_online = 0; 432 else if (strncmp(p, "port0", 5) == 0) 433 etr_port0_online = 1; 434 else if (strncmp(p, "port1", 5) == 0) 435 etr_port1_online = 1; 436 else if (strncmp(p, "on", 2) == 0) 437 etr_port0_online = etr_port1_online = 1; 438 return 0; 439 } 440 early_param("etr", early_parse_etr); 441 442 enum etr_event { 443 ETR_EVENT_PORT0_CHANGE, 444 ETR_EVENT_PORT1_CHANGE, 445 ETR_EVENT_PORT_ALERT, 446 ETR_EVENT_SYNC_CHECK, 447 ETR_EVENT_SWITCH_LOCAL, 448 ETR_EVENT_UPDATE, 449 }; 450 451 /* 452 * Valid bit combinations of the eacr register are (x = don't care): 453 * e0 e1 dp p0 p1 ea es sl 454 * 0 0 x 0 0 0 0 0 initial, disabled state 455 * 0 0 x 0 1 1 0 0 port 1 online 456 * 0 0 x 1 0 1 0 0 port 0 online 457 * 0 0 x 1 1 1 0 0 both ports online 458 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 459 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 460 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 461 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 462 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 463 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 464 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 465 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 466 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 467 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 468 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 469 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 470 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 471 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 472 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 473 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 474 */ 475 static struct etr_eacr etr_eacr; 476 static u64 etr_tolec; /* time of last eacr update */ 477 static struct etr_aib etr_port0; 478 static int etr_port0_uptodate; 479 static struct etr_aib etr_port1; 480 static int etr_port1_uptodate; 481 static unsigned long etr_events; 482 static struct timer_list etr_timer; 483 484 static void etr_timeout(unsigned long dummy); 485 static void etr_work_fn(struct work_struct *work); 486 static DEFINE_MUTEX(etr_work_mutex); 487 static DECLARE_WORK(etr_work, etr_work_fn); 488 489 /* 490 * Reset ETR attachment. 491 */ 492 static void etr_reset(void) 493 { 494 etr_eacr = (struct etr_eacr) { 495 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 496 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 497 .es = 0, .sl = 0 }; 498 if (etr_setr(&etr_eacr) == 0) { 499 etr_tolec = get_tod_clock(); 500 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 501 if (etr_port0_online && etr_port1_online) 502 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 503 } else if (etr_port0_online || etr_port1_online) { 504 pr_warning("The real or virtual hardware system does " 505 "not provide an ETR interface\n"); 506 etr_port0_online = etr_port1_online = 0; 507 } 508 } 509 510 static int __init etr_init(void) 511 { 512 struct etr_aib aib; 513 514 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 515 return 0; 516 time_init_wq(); 517 /* Check if this machine has the steai instruction. */ 518 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 519 etr_steai_available = 1; 520 setup_timer(&etr_timer, etr_timeout, 0UL); 521 if (etr_port0_online) { 522 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 523 queue_work(time_sync_wq, &etr_work); 524 } 525 if (etr_port1_online) { 526 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 527 queue_work(time_sync_wq, &etr_work); 528 } 529 return 0; 530 } 531 532 arch_initcall(etr_init); 533 534 /* 535 * Two sorts of ETR machine checks. The architecture reads: 536 * "When a machine-check niterruption occurs and if a switch-to-local or 537 * ETR-sync-check interrupt request is pending but disabled, this pending 538 * disabled interruption request is indicated and is cleared". 539 * Which means that we can get etr_switch_to_local events from the machine 540 * check handler although the interruption condition is disabled. Lovely.. 541 */ 542 543 /* 544 * Switch to local machine check. This is called when the last usable 545 * ETR port goes inactive. After switch to local the clock is not in sync. 546 */ 547 void etr_switch_to_local(void) 548 { 549 if (!etr_eacr.sl) 550 return; 551 disable_sync_clock(NULL); 552 if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) { 553 etr_eacr.es = etr_eacr.sl = 0; 554 etr_setr(&etr_eacr); 555 queue_work(time_sync_wq, &etr_work); 556 } 557 } 558 559 /* 560 * ETR sync check machine check. This is called when the ETR OTE and the 561 * local clock OTE are farther apart than the ETR sync check tolerance. 562 * After a ETR sync check the clock is not in sync. The machine check 563 * is broadcasted to all cpus at the same time. 564 */ 565 void etr_sync_check(void) 566 { 567 if (!etr_eacr.es) 568 return; 569 disable_sync_clock(NULL); 570 if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) { 571 etr_eacr.es = 0; 572 etr_setr(&etr_eacr); 573 queue_work(time_sync_wq, &etr_work); 574 } 575 } 576 577 /* 578 * ETR timing alert. There are two causes: 579 * 1) port state change, check the usability of the port 580 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 581 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 582 * or ETR-data word 4 (edf4) has changed. 583 */ 584 static void etr_timing_alert(struct etr_irq_parm *intparm) 585 { 586 if (intparm->pc0) 587 /* ETR port 0 state change. */ 588 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 589 if (intparm->pc1) 590 /* ETR port 1 state change. */ 591 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 592 if (intparm->eai) 593 /* 594 * ETR port alert on either port 0, 1 or both. 595 * Both ports are not up-to-date now. 596 */ 597 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 598 queue_work(time_sync_wq, &etr_work); 599 } 600 601 static void etr_timeout(unsigned long dummy) 602 { 603 set_bit(ETR_EVENT_UPDATE, &etr_events); 604 queue_work(time_sync_wq, &etr_work); 605 } 606 607 /* 608 * Check if the etr mode is pss. 609 */ 610 static inline int etr_mode_is_pps(struct etr_eacr eacr) 611 { 612 return eacr.es && !eacr.sl; 613 } 614 615 /* 616 * Check if the etr mode is etr. 617 */ 618 static inline int etr_mode_is_etr(struct etr_eacr eacr) 619 { 620 return eacr.es && eacr.sl; 621 } 622 623 /* 624 * Check if the port can be used for TOD synchronization. 625 * For PPS mode the port has to receive OTEs. For ETR mode 626 * the port has to receive OTEs, the ETR stepping bit has to 627 * be zero and the validity bits for data frame 1, 2, and 3 628 * have to be 1. 629 */ 630 static int etr_port_valid(struct etr_aib *aib, int port) 631 { 632 unsigned int psc; 633 634 /* Check that this port is receiving OTEs. */ 635 if (aib->tsp == 0) 636 return 0; 637 638 psc = port ? aib->esw.psc1 : aib->esw.psc0; 639 if (psc == etr_lpsc_pps_mode) 640 return 1; 641 if (psc == etr_lpsc_operational_step) 642 return !aib->esw.y && aib->slsw.v1 && 643 aib->slsw.v2 && aib->slsw.v3; 644 return 0; 645 } 646 647 /* 648 * Check if two ports are on the same network. 649 */ 650 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 651 { 652 // FIXME: any other fields we have to compare? 653 return aib1->edf1.net_id == aib2->edf1.net_id; 654 } 655 656 /* 657 * Wrapper for etr_stei that converts physical port states 658 * to logical port states to be consistent with the output 659 * of stetr (see etr_psc vs. etr_lpsc). 660 */ 661 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 662 { 663 BUG_ON(etr_steai(aib, func) != 0); 664 /* Convert port state to logical port state. */ 665 if (aib->esw.psc0 == 1) 666 aib->esw.psc0 = 2; 667 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 668 aib->esw.psc0 = 1; 669 if (aib->esw.psc1 == 1) 670 aib->esw.psc1 = 2; 671 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 672 aib->esw.psc1 = 1; 673 } 674 675 /* 676 * Check if the aib a2 is still connected to the same attachment as 677 * aib a1, the etv values differ by one and a2 is valid. 678 */ 679 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 680 { 681 int state_a1, state_a2; 682 683 /* Paranoia check: e0/e1 should better be the same. */ 684 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 685 a1->esw.eacr.e1 != a2->esw.eacr.e1) 686 return 0; 687 688 /* Still connected to the same etr ? */ 689 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 690 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 691 if (state_a1 == etr_lpsc_operational_step) { 692 if (state_a2 != etr_lpsc_operational_step || 693 a1->edf1.net_id != a2->edf1.net_id || 694 a1->edf1.etr_id != a2->edf1.etr_id || 695 a1->edf1.etr_pn != a2->edf1.etr_pn) 696 return 0; 697 } else if (state_a2 != etr_lpsc_pps_mode) 698 return 0; 699 700 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 701 if (a1->edf2.etv + 1 != a2->edf2.etv) 702 return 0; 703 704 if (!etr_port_valid(a2, p)) 705 return 0; 706 707 return 1; 708 } 709 710 struct clock_sync_data { 711 atomic_t cpus; 712 int in_sync; 713 unsigned long long fixup_cc; 714 int etr_port; 715 struct etr_aib *etr_aib; 716 }; 717 718 static void clock_sync_cpu(struct clock_sync_data *sync) 719 { 720 atomic_dec(&sync->cpus); 721 enable_sync_clock(); 722 /* 723 * This looks like a busy wait loop but it isn't. etr_sync_cpus 724 * is called on all other cpus while the TOD clocks is stopped. 725 * __udelay will stop the cpu on an enabled wait psw until the 726 * TOD is running again. 727 */ 728 while (sync->in_sync == 0) { 729 __udelay(1); 730 /* 731 * A different cpu changes *in_sync. Therefore use 732 * barrier() to force memory access. 733 */ 734 barrier(); 735 } 736 if (sync->in_sync != 1) 737 /* Didn't work. Clear per-cpu in sync bit again. */ 738 disable_sync_clock(NULL); 739 /* 740 * This round of TOD syncing is done. Set the clock comparator 741 * to the next tick and let the processor continue. 742 */ 743 fixup_clock_comparator(sync->fixup_cc); 744 } 745 746 /* 747 * Sync the TOD clock using the port referred to by aibp. This port 748 * has to be enabled and the other port has to be disabled. The 749 * last eacr update has to be more than 1.6 seconds in the past. 750 */ 751 static int etr_sync_clock(void *data) 752 { 753 static int first; 754 unsigned long long clock, old_clock, delay, delta; 755 struct clock_sync_data *etr_sync; 756 struct etr_aib *sync_port, *aib; 757 int port; 758 int rc; 759 760 etr_sync = data; 761 762 if (xchg(&first, 1) == 1) { 763 /* Slave */ 764 clock_sync_cpu(etr_sync); 765 return 0; 766 } 767 768 /* Wait until all other cpus entered the sync function. */ 769 while (atomic_read(&etr_sync->cpus) != 0) 770 cpu_relax(); 771 772 port = etr_sync->etr_port; 773 aib = etr_sync->etr_aib; 774 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 775 enable_sync_clock(); 776 777 /* Set clock to next OTE. */ 778 __ctl_set_bit(14, 21); 779 __ctl_set_bit(0, 29); 780 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 781 old_clock = get_tod_clock(); 782 if (set_tod_clock(clock) == 0) { 783 __udelay(1); /* Wait for the clock to start. */ 784 __ctl_clear_bit(0, 29); 785 __ctl_clear_bit(14, 21); 786 etr_stetr(aib); 787 /* Adjust Linux timing variables. */ 788 delay = (unsigned long long) 789 (aib->edf2.etv - sync_port->edf2.etv) << 32; 790 delta = adjust_time(old_clock, clock, delay); 791 etr_sync->fixup_cc = delta; 792 fixup_clock_comparator(delta); 793 /* Verify that the clock is properly set. */ 794 if (!etr_aib_follows(sync_port, aib, port)) { 795 /* Didn't work. */ 796 disable_sync_clock(NULL); 797 etr_sync->in_sync = -EAGAIN; 798 rc = -EAGAIN; 799 } else { 800 etr_sync->in_sync = 1; 801 rc = 0; 802 } 803 } else { 804 /* Could not set the clock ?!? */ 805 __ctl_clear_bit(0, 29); 806 __ctl_clear_bit(14, 21); 807 disable_sync_clock(NULL); 808 etr_sync->in_sync = -EAGAIN; 809 rc = -EAGAIN; 810 } 811 xchg(&first, 0); 812 return rc; 813 } 814 815 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 816 { 817 struct clock_sync_data etr_sync; 818 struct etr_aib *sync_port; 819 int follows; 820 int rc; 821 822 /* Check if the current aib is adjacent to the sync port aib. */ 823 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 824 follows = etr_aib_follows(sync_port, aib, port); 825 memcpy(sync_port, aib, sizeof(*aib)); 826 if (!follows) 827 return -EAGAIN; 828 memset(&etr_sync, 0, sizeof(etr_sync)); 829 etr_sync.etr_aib = aib; 830 etr_sync.etr_port = port; 831 get_online_cpus(); 832 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 833 rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask); 834 put_online_cpus(); 835 return rc; 836 } 837 838 /* 839 * Handle the immediate effects of the different events. 840 * The port change event is used for online/offline changes. 841 */ 842 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 843 { 844 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 845 eacr.es = 0; 846 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 847 eacr.es = eacr.sl = 0; 848 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 849 etr_port0_uptodate = etr_port1_uptodate = 0; 850 851 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 852 if (eacr.e0) 853 /* 854 * Port change of an enabled port. We have to 855 * assume that this can have caused an stepping 856 * port switch. 857 */ 858 etr_tolec = get_tod_clock(); 859 eacr.p0 = etr_port0_online; 860 if (!eacr.p0) 861 eacr.e0 = 0; 862 etr_port0_uptodate = 0; 863 } 864 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 865 if (eacr.e1) 866 /* 867 * Port change of an enabled port. We have to 868 * assume that this can have caused an stepping 869 * port switch. 870 */ 871 etr_tolec = get_tod_clock(); 872 eacr.p1 = etr_port1_online; 873 if (!eacr.p1) 874 eacr.e1 = 0; 875 etr_port1_uptodate = 0; 876 } 877 clear_bit(ETR_EVENT_UPDATE, &etr_events); 878 return eacr; 879 } 880 881 /* 882 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 883 * one of the ports needs an update. 884 */ 885 static void etr_set_tolec_timeout(unsigned long long now) 886 { 887 unsigned long micros; 888 889 if ((!etr_eacr.p0 || etr_port0_uptodate) && 890 (!etr_eacr.p1 || etr_port1_uptodate)) 891 return; 892 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 893 micros = (micros > 1600000) ? 0 : 1600000 - micros; 894 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 895 } 896 897 /* 898 * Set up a time that expires after 1/2 second. 899 */ 900 static void etr_set_sync_timeout(void) 901 { 902 mod_timer(&etr_timer, jiffies + HZ/2); 903 } 904 905 /* 906 * Update the aib information for one or both ports. 907 */ 908 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 909 struct etr_eacr eacr) 910 { 911 /* With both ports disabled the aib information is useless. */ 912 if (!eacr.e0 && !eacr.e1) 913 return eacr; 914 915 /* Update port0 or port1 with aib stored in etr_work_fn. */ 916 if (aib->esw.q == 0) { 917 /* Information for port 0 stored. */ 918 if (eacr.p0 && !etr_port0_uptodate) { 919 etr_port0 = *aib; 920 if (etr_port0_online) 921 etr_port0_uptodate = 1; 922 } 923 } else { 924 /* Information for port 1 stored. */ 925 if (eacr.p1 && !etr_port1_uptodate) { 926 etr_port1 = *aib; 927 if (etr_port0_online) 928 etr_port1_uptodate = 1; 929 } 930 } 931 932 /* 933 * Do not try to get the alternate port aib if the clock 934 * is not in sync yet. 935 */ 936 if (!eacr.es || !check_sync_clock()) 937 return eacr; 938 939 /* 940 * If steai is available we can get the information about 941 * the other port immediately. If only stetr is available the 942 * data-port bit toggle has to be used. 943 */ 944 if (etr_steai_available) { 945 if (eacr.p0 && !etr_port0_uptodate) { 946 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 947 etr_port0_uptodate = 1; 948 } 949 if (eacr.p1 && !etr_port1_uptodate) { 950 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 951 etr_port1_uptodate = 1; 952 } 953 } else { 954 /* 955 * One port was updated above, if the other 956 * port is not uptodate toggle dp bit. 957 */ 958 if ((eacr.p0 && !etr_port0_uptodate) || 959 (eacr.p1 && !etr_port1_uptodate)) 960 eacr.dp ^= 1; 961 else 962 eacr.dp = 0; 963 } 964 return eacr; 965 } 966 967 /* 968 * Write new etr control register if it differs from the current one. 969 * Return 1 if etr_tolec has been updated as well. 970 */ 971 static void etr_update_eacr(struct etr_eacr eacr) 972 { 973 int dp_changed; 974 975 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 976 /* No change, return. */ 977 return; 978 /* 979 * The disable of an active port of the change of the data port 980 * bit can/will cause a change in the data port. 981 */ 982 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 983 (etr_eacr.dp ^ eacr.dp) != 0; 984 etr_eacr = eacr; 985 etr_setr(&etr_eacr); 986 if (dp_changed) 987 etr_tolec = get_tod_clock(); 988 } 989 990 /* 991 * ETR work. In this function you'll find the main logic. In 992 * particular this is the only function that calls etr_update_eacr(), 993 * it "controls" the etr control register. 994 */ 995 static void etr_work_fn(struct work_struct *work) 996 { 997 unsigned long long now; 998 struct etr_eacr eacr; 999 struct etr_aib aib; 1000 int sync_port; 1001 1002 /* prevent multiple execution. */ 1003 mutex_lock(&etr_work_mutex); 1004 1005 /* Create working copy of etr_eacr. */ 1006 eacr = etr_eacr; 1007 1008 /* Check for the different events and their immediate effects. */ 1009 eacr = etr_handle_events(eacr); 1010 1011 /* Check if ETR is supposed to be active. */ 1012 eacr.ea = eacr.p0 || eacr.p1; 1013 if (!eacr.ea) { 1014 /* Both ports offline. Reset everything. */ 1015 eacr.dp = eacr.es = eacr.sl = 0; 1016 on_each_cpu(disable_sync_clock, NULL, 1); 1017 del_timer_sync(&etr_timer); 1018 etr_update_eacr(eacr); 1019 goto out_unlock; 1020 } 1021 1022 /* Store aib to get the current ETR status word. */ 1023 BUG_ON(etr_stetr(&aib) != 0); 1024 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1025 now = get_tod_clock(); 1026 1027 /* 1028 * Update the port information if the last stepping port change 1029 * or data port change is older than 1.6 seconds. 1030 */ 1031 if (now >= etr_tolec + (1600000 << 12)) 1032 eacr = etr_handle_update(&aib, eacr); 1033 1034 /* 1035 * Select ports to enable. The preferred synchronization mode is PPS. 1036 * If a port can be enabled depends on a number of things: 1037 * 1) The port needs to be online and uptodate. A port is not 1038 * disabled just because it is not uptodate, but it is only 1039 * enabled if it is uptodate. 1040 * 2) The port needs to have the same mode (pps / etr). 1041 * 3) The port needs to be usable -> etr_port_valid() == 1 1042 * 4) To enable the second port the clock needs to be in sync. 1043 * 5) If both ports are useable and are ETR ports, the network id 1044 * has to be the same. 1045 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1046 */ 1047 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1048 eacr.sl = 0; 1049 eacr.e0 = 1; 1050 if (!etr_mode_is_pps(etr_eacr)) 1051 eacr.es = 0; 1052 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1053 eacr.e1 = 0; 1054 // FIXME: uptodate checks ? 1055 else if (etr_port0_uptodate && etr_port1_uptodate) 1056 eacr.e1 = 1; 1057 sync_port = (etr_port0_uptodate && 1058 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1059 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1060 eacr.sl = 0; 1061 eacr.e0 = 0; 1062 eacr.e1 = 1; 1063 if (!etr_mode_is_pps(etr_eacr)) 1064 eacr.es = 0; 1065 sync_port = (etr_port1_uptodate && 1066 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1067 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1068 eacr.sl = 1; 1069 eacr.e0 = 1; 1070 if (!etr_mode_is_etr(etr_eacr)) 1071 eacr.es = 0; 1072 if (!eacr.es || !eacr.p1 || 1073 aib.esw.psc1 != etr_lpsc_operational_alt) 1074 eacr.e1 = 0; 1075 else if (etr_port0_uptodate && etr_port1_uptodate && 1076 etr_compare_network(&etr_port0, &etr_port1)) 1077 eacr.e1 = 1; 1078 sync_port = (etr_port0_uptodate && 1079 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1080 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1081 eacr.sl = 1; 1082 eacr.e0 = 0; 1083 eacr.e1 = 1; 1084 if (!etr_mode_is_etr(etr_eacr)) 1085 eacr.es = 0; 1086 sync_port = (etr_port1_uptodate && 1087 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1088 } else { 1089 /* Both ports not usable. */ 1090 eacr.es = eacr.sl = 0; 1091 sync_port = -1; 1092 } 1093 1094 /* 1095 * If the clock is in sync just update the eacr and return. 1096 * If there is no valid sync port wait for a port update. 1097 */ 1098 if ((eacr.es && check_sync_clock()) || sync_port < 0) { 1099 etr_update_eacr(eacr); 1100 etr_set_tolec_timeout(now); 1101 goto out_unlock; 1102 } 1103 1104 /* 1105 * Prepare control register for clock syncing 1106 * (reset data port bit, set sync check control. 1107 */ 1108 eacr.dp = 0; 1109 eacr.es = 1; 1110 1111 /* 1112 * Update eacr and try to synchronize the clock. If the update 1113 * of eacr caused a stepping port switch (or if we have to 1114 * assume that a stepping port switch has occurred) or the 1115 * clock syncing failed, reset the sync check control bit 1116 * and set up a timer to try again after 0.5 seconds 1117 */ 1118 etr_update_eacr(eacr); 1119 if (now < etr_tolec + (1600000 << 12) || 1120 etr_sync_clock_stop(&aib, sync_port) != 0) { 1121 /* Sync failed. Try again in 1/2 second. */ 1122 eacr.es = 0; 1123 etr_update_eacr(eacr); 1124 etr_set_sync_timeout(); 1125 } else 1126 etr_set_tolec_timeout(now); 1127 out_unlock: 1128 mutex_unlock(&etr_work_mutex); 1129 } 1130 1131 /* 1132 * Sysfs interface functions 1133 */ 1134 static struct bus_type etr_subsys = { 1135 .name = "etr", 1136 .dev_name = "etr", 1137 }; 1138 1139 static struct device etr_port0_dev = { 1140 .id = 0, 1141 .bus = &etr_subsys, 1142 }; 1143 1144 static struct device etr_port1_dev = { 1145 .id = 1, 1146 .bus = &etr_subsys, 1147 }; 1148 1149 /* 1150 * ETR subsys attributes 1151 */ 1152 static ssize_t etr_stepping_port_show(struct device *dev, 1153 struct device_attribute *attr, 1154 char *buf) 1155 { 1156 return sprintf(buf, "%i\n", etr_port0.esw.p); 1157 } 1158 1159 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1160 1161 static ssize_t etr_stepping_mode_show(struct device *dev, 1162 struct device_attribute *attr, 1163 char *buf) 1164 { 1165 char *mode_str; 1166 1167 if (etr_mode_is_pps(etr_eacr)) 1168 mode_str = "pps"; 1169 else if (etr_mode_is_etr(etr_eacr)) 1170 mode_str = "etr"; 1171 else 1172 mode_str = "local"; 1173 return sprintf(buf, "%s\n", mode_str); 1174 } 1175 1176 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1177 1178 /* 1179 * ETR port attributes 1180 */ 1181 static inline struct etr_aib *etr_aib_from_dev(struct device *dev) 1182 { 1183 if (dev == &etr_port0_dev) 1184 return etr_port0_online ? &etr_port0 : NULL; 1185 else 1186 return etr_port1_online ? &etr_port1 : NULL; 1187 } 1188 1189 static ssize_t etr_online_show(struct device *dev, 1190 struct device_attribute *attr, 1191 char *buf) 1192 { 1193 unsigned int online; 1194 1195 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1196 return sprintf(buf, "%i\n", online); 1197 } 1198 1199 static ssize_t etr_online_store(struct device *dev, 1200 struct device_attribute *attr, 1201 const char *buf, size_t count) 1202 { 1203 unsigned int value; 1204 1205 value = simple_strtoul(buf, NULL, 0); 1206 if (value != 0 && value != 1) 1207 return -EINVAL; 1208 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1209 return -EOPNOTSUPP; 1210 mutex_lock(&clock_sync_mutex); 1211 if (dev == &etr_port0_dev) { 1212 if (etr_port0_online == value) 1213 goto out; /* Nothing to do. */ 1214 etr_port0_online = value; 1215 if (etr_port0_online && etr_port1_online) 1216 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1217 else 1218 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1219 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1220 queue_work(time_sync_wq, &etr_work); 1221 } else { 1222 if (etr_port1_online == value) 1223 goto out; /* Nothing to do. */ 1224 etr_port1_online = value; 1225 if (etr_port0_online && etr_port1_online) 1226 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1227 else 1228 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1229 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1230 queue_work(time_sync_wq, &etr_work); 1231 } 1232 out: 1233 mutex_unlock(&clock_sync_mutex); 1234 return count; 1235 } 1236 1237 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store); 1238 1239 static ssize_t etr_stepping_control_show(struct device *dev, 1240 struct device_attribute *attr, 1241 char *buf) 1242 { 1243 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1244 etr_eacr.e0 : etr_eacr.e1); 1245 } 1246 1247 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1248 1249 static ssize_t etr_mode_code_show(struct device *dev, 1250 struct device_attribute *attr, char *buf) 1251 { 1252 if (!etr_port0_online && !etr_port1_online) 1253 /* Status word is not uptodate if both ports are offline. */ 1254 return -ENODATA; 1255 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1256 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1257 } 1258 1259 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1260 1261 static ssize_t etr_untuned_show(struct device *dev, 1262 struct device_attribute *attr, char *buf) 1263 { 1264 struct etr_aib *aib = etr_aib_from_dev(dev); 1265 1266 if (!aib || !aib->slsw.v1) 1267 return -ENODATA; 1268 return sprintf(buf, "%i\n", aib->edf1.u); 1269 } 1270 1271 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL); 1272 1273 static ssize_t etr_network_id_show(struct device *dev, 1274 struct device_attribute *attr, char *buf) 1275 { 1276 struct etr_aib *aib = etr_aib_from_dev(dev); 1277 1278 if (!aib || !aib->slsw.v1) 1279 return -ENODATA; 1280 return sprintf(buf, "%i\n", aib->edf1.net_id); 1281 } 1282 1283 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL); 1284 1285 static ssize_t etr_id_show(struct device *dev, 1286 struct device_attribute *attr, char *buf) 1287 { 1288 struct etr_aib *aib = etr_aib_from_dev(dev); 1289 1290 if (!aib || !aib->slsw.v1) 1291 return -ENODATA; 1292 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1293 } 1294 1295 static DEVICE_ATTR(id, 0400, etr_id_show, NULL); 1296 1297 static ssize_t etr_port_number_show(struct device *dev, 1298 struct device_attribute *attr, char *buf) 1299 { 1300 struct etr_aib *aib = etr_aib_from_dev(dev); 1301 1302 if (!aib || !aib->slsw.v1) 1303 return -ENODATA; 1304 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1305 } 1306 1307 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL); 1308 1309 static ssize_t etr_coupled_show(struct device *dev, 1310 struct device_attribute *attr, char *buf) 1311 { 1312 struct etr_aib *aib = etr_aib_from_dev(dev); 1313 1314 if (!aib || !aib->slsw.v3) 1315 return -ENODATA; 1316 return sprintf(buf, "%i\n", aib->edf3.c); 1317 } 1318 1319 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL); 1320 1321 static ssize_t etr_local_time_show(struct device *dev, 1322 struct device_attribute *attr, char *buf) 1323 { 1324 struct etr_aib *aib = etr_aib_from_dev(dev); 1325 1326 if (!aib || !aib->slsw.v3) 1327 return -ENODATA; 1328 return sprintf(buf, "%i\n", aib->edf3.blto); 1329 } 1330 1331 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL); 1332 1333 static ssize_t etr_utc_offset_show(struct device *dev, 1334 struct device_attribute *attr, char *buf) 1335 { 1336 struct etr_aib *aib = etr_aib_from_dev(dev); 1337 1338 if (!aib || !aib->slsw.v3) 1339 return -ENODATA; 1340 return sprintf(buf, "%i\n", aib->edf3.buo); 1341 } 1342 1343 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1344 1345 static struct device_attribute *etr_port_attributes[] = { 1346 &dev_attr_online, 1347 &dev_attr_stepping_control, 1348 &dev_attr_state_code, 1349 &dev_attr_untuned, 1350 &dev_attr_network, 1351 &dev_attr_id, 1352 &dev_attr_port, 1353 &dev_attr_coupled, 1354 &dev_attr_local_time, 1355 &dev_attr_utc_offset, 1356 NULL 1357 }; 1358 1359 static int __init etr_register_port(struct device *dev) 1360 { 1361 struct device_attribute **attr; 1362 int rc; 1363 1364 rc = device_register(dev); 1365 if (rc) 1366 goto out; 1367 for (attr = etr_port_attributes; *attr; attr++) { 1368 rc = device_create_file(dev, *attr); 1369 if (rc) 1370 goto out_unreg; 1371 } 1372 return 0; 1373 out_unreg: 1374 for (; attr >= etr_port_attributes; attr--) 1375 device_remove_file(dev, *attr); 1376 device_unregister(dev); 1377 out: 1378 return rc; 1379 } 1380 1381 static void __init etr_unregister_port(struct device *dev) 1382 { 1383 struct device_attribute **attr; 1384 1385 for (attr = etr_port_attributes; *attr; attr++) 1386 device_remove_file(dev, *attr); 1387 device_unregister(dev); 1388 } 1389 1390 static int __init etr_init_sysfs(void) 1391 { 1392 int rc; 1393 1394 rc = subsys_system_register(&etr_subsys, NULL); 1395 if (rc) 1396 goto out; 1397 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port); 1398 if (rc) 1399 goto out_unreg_subsys; 1400 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode); 1401 if (rc) 1402 goto out_remove_stepping_port; 1403 rc = etr_register_port(&etr_port0_dev); 1404 if (rc) 1405 goto out_remove_stepping_mode; 1406 rc = etr_register_port(&etr_port1_dev); 1407 if (rc) 1408 goto out_remove_port0; 1409 return 0; 1410 1411 out_remove_port0: 1412 etr_unregister_port(&etr_port0_dev); 1413 out_remove_stepping_mode: 1414 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode); 1415 out_remove_stepping_port: 1416 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port); 1417 out_unreg_subsys: 1418 bus_unregister(&etr_subsys); 1419 out: 1420 return rc; 1421 } 1422 1423 device_initcall(etr_init_sysfs); 1424 1425 /* 1426 * Server Time Protocol (STP) code. 1427 */ 1428 static int stp_online; 1429 static struct stp_sstpi stp_info; 1430 static void *stp_page; 1431 1432 static void stp_work_fn(struct work_struct *work); 1433 static DEFINE_MUTEX(stp_work_mutex); 1434 static DECLARE_WORK(stp_work, stp_work_fn); 1435 static struct timer_list stp_timer; 1436 1437 static int __init early_parse_stp(char *p) 1438 { 1439 if (strncmp(p, "off", 3) == 0) 1440 stp_online = 0; 1441 else if (strncmp(p, "on", 2) == 0) 1442 stp_online = 1; 1443 return 0; 1444 } 1445 early_param("stp", early_parse_stp); 1446 1447 /* 1448 * Reset STP attachment. 1449 */ 1450 static void __init stp_reset(void) 1451 { 1452 int rc; 1453 1454 stp_page = (void *) get_zeroed_page(GFP_ATOMIC); 1455 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1456 if (rc == 0) 1457 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1458 else if (stp_online) { 1459 pr_warning("The real or virtual hardware system does " 1460 "not provide an STP interface\n"); 1461 free_page((unsigned long) stp_page); 1462 stp_page = NULL; 1463 stp_online = 0; 1464 } 1465 } 1466 1467 static void stp_timeout(unsigned long dummy) 1468 { 1469 queue_work(time_sync_wq, &stp_work); 1470 } 1471 1472 static int __init stp_init(void) 1473 { 1474 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1475 return 0; 1476 setup_timer(&stp_timer, stp_timeout, 0UL); 1477 time_init_wq(); 1478 if (!stp_online) 1479 return 0; 1480 queue_work(time_sync_wq, &stp_work); 1481 return 0; 1482 } 1483 1484 arch_initcall(stp_init); 1485 1486 /* 1487 * STP timing alert. There are three causes: 1488 * 1) timing status change 1489 * 2) link availability change 1490 * 3) time control parameter change 1491 * In all three cases we are only interested in the clock source state. 1492 * If a STP clock source is now available use it. 1493 */ 1494 static void stp_timing_alert(struct stp_irq_parm *intparm) 1495 { 1496 if (intparm->tsc || intparm->lac || intparm->tcpc) 1497 queue_work(time_sync_wq, &stp_work); 1498 } 1499 1500 /* 1501 * STP sync check machine check. This is called when the timing state 1502 * changes from the synchronized state to the unsynchronized state. 1503 * After a STP sync check the clock is not in sync. The machine check 1504 * is broadcasted to all cpus at the same time. 1505 */ 1506 void stp_sync_check(void) 1507 { 1508 disable_sync_clock(NULL); 1509 queue_work(time_sync_wq, &stp_work); 1510 } 1511 1512 /* 1513 * STP island condition machine check. This is called when an attached 1514 * server attempts to communicate over an STP link and the servers 1515 * have matching CTN ids and have a valid stratum-1 configuration 1516 * but the configurations do not match. 1517 */ 1518 void stp_island_check(void) 1519 { 1520 disable_sync_clock(NULL); 1521 queue_work(time_sync_wq, &stp_work); 1522 } 1523 1524 1525 static int stp_sync_clock(void *data) 1526 { 1527 static int first; 1528 unsigned long long old_clock, delta; 1529 struct clock_sync_data *stp_sync; 1530 int rc; 1531 1532 stp_sync = data; 1533 1534 if (xchg(&first, 1) == 1) { 1535 /* Slave */ 1536 clock_sync_cpu(stp_sync); 1537 return 0; 1538 } 1539 1540 /* Wait until all other cpus entered the sync function. */ 1541 while (atomic_read(&stp_sync->cpus) != 0) 1542 cpu_relax(); 1543 1544 enable_sync_clock(); 1545 1546 rc = 0; 1547 if (stp_info.todoff[0] || stp_info.todoff[1] || 1548 stp_info.todoff[2] || stp_info.todoff[3] || 1549 stp_info.tmd != 2) { 1550 old_clock = get_tod_clock(); 1551 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1552 if (rc == 0) { 1553 delta = adjust_time(old_clock, get_tod_clock(), 0); 1554 fixup_clock_comparator(delta); 1555 rc = chsc_sstpi(stp_page, &stp_info, 1556 sizeof(struct stp_sstpi)); 1557 if (rc == 0 && stp_info.tmd != 2) 1558 rc = -EAGAIN; 1559 } 1560 } 1561 if (rc) { 1562 disable_sync_clock(NULL); 1563 stp_sync->in_sync = -EAGAIN; 1564 } else 1565 stp_sync->in_sync = 1; 1566 xchg(&first, 0); 1567 return 0; 1568 } 1569 1570 /* 1571 * STP work. Check for the STP state and take over the clock 1572 * synchronization if the STP clock source is usable. 1573 */ 1574 static void stp_work_fn(struct work_struct *work) 1575 { 1576 struct clock_sync_data stp_sync; 1577 int rc; 1578 1579 /* prevent multiple execution. */ 1580 mutex_lock(&stp_work_mutex); 1581 1582 if (!stp_online) { 1583 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1584 del_timer_sync(&stp_timer); 1585 goto out_unlock; 1586 } 1587 1588 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1589 if (rc) 1590 goto out_unlock; 1591 1592 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1593 if (rc || stp_info.c == 0) 1594 goto out_unlock; 1595 1596 /* Skip synchronization if the clock is already in sync. */ 1597 if (check_sync_clock()) 1598 goto out_unlock; 1599 1600 memset(&stp_sync, 0, sizeof(stp_sync)); 1601 get_online_cpus(); 1602 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1603 stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask); 1604 put_online_cpus(); 1605 1606 if (!check_sync_clock()) 1607 /* 1608 * There is a usable clock but the synchonization failed. 1609 * Retry after a second. 1610 */ 1611 mod_timer(&stp_timer, jiffies + HZ); 1612 1613 out_unlock: 1614 mutex_unlock(&stp_work_mutex); 1615 } 1616 1617 /* 1618 * STP subsys sysfs interface functions 1619 */ 1620 static struct bus_type stp_subsys = { 1621 .name = "stp", 1622 .dev_name = "stp", 1623 }; 1624 1625 static ssize_t stp_ctn_id_show(struct device *dev, 1626 struct device_attribute *attr, 1627 char *buf) 1628 { 1629 if (!stp_online) 1630 return -ENODATA; 1631 return sprintf(buf, "%016llx\n", 1632 *(unsigned long long *) stp_info.ctnid); 1633 } 1634 1635 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1636 1637 static ssize_t stp_ctn_type_show(struct device *dev, 1638 struct device_attribute *attr, 1639 char *buf) 1640 { 1641 if (!stp_online) 1642 return -ENODATA; 1643 return sprintf(buf, "%i\n", stp_info.ctn); 1644 } 1645 1646 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1647 1648 static ssize_t stp_dst_offset_show(struct device *dev, 1649 struct device_attribute *attr, 1650 char *buf) 1651 { 1652 if (!stp_online || !(stp_info.vbits & 0x2000)) 1653 return -ENODATA; 1654 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1655 } 1656 1657 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1658 1659 static ssize_t stp_leap_seconds_show(struct device *dev, 1660 struct device_attribute *attr, 1661 char *buf) 1662 { 1663 if (!stp_online || !(stp_info.vbits & 0x8000)) 1664 return -ENODATA; 1665 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1666 } 1667 1668 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1669 1670 static ssize_t stp_stratum_show(struct device *dev, 1671 struct device_attribute *attr, 1672 char *buf) 1673 { 1674 if (!stp_online) 1675 return -ENODATA; 1676 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1677 } 1678 1679 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL); 1680 1681 static ssize_t stp_time_offset_show(struct device *dev, 1682 struct device_attribute *attr, 1683 char *buf) 1684 { 1685 if (!stp_online || !(stp_info.vbits & 0x0800)) 1686 return -ENODATA; 1687 return sprintf(buf, "%i\n", (int) stp_info.tto); 1688 } 1689 1690 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1691 1692 static ssize_t stp_time_zone_offset_show(struct device *dev, 1693 struct device_attribute *attr, 1694 char *buf) 1695 { 1696 if (!stp_online || !(stp_info.vbits & 0x4000)) 1697 return -ENODATA; 1698 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1699 } 1700 1701 static DEVICE_ATTR(time_zone_offset, 0400, 1702 stp_time_zone_offset_show, NULL); 1703 1704 static ssize_t stp_timing_mode_show(struct device *dev, 1705 struct device_attribute *attr, 1706 char *buf) 1707 { 1708 if (!stp_online) 1709 return -ENODATA; 1710 return sprintf(buf, "%i\n", stp_info.tmd); 1711 } 1712 1713 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1714 1715 static ssize_t stp_timing_state_show(struct device *dev, 1716 struct device_attribute *attr, 1717 char *buf) 1718 { 1719 if (!stp_online) 1720 return -ENODATA; 1721 return sprintf(buf, "%i\n", stp_info.tst); 1722 } 1723 1724 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1725 1726 static ssize_t stp_online_show(struct device *dev, 1727 struct device_attribute *attr, 1728 char *buf) 1729 { 1730 return sprintf(buf, "%i\n", stp_online); 1731 } 1732 1733 static ssize_t stp_online_store(struct device *dev, 1734 struct device_attribute *attr, 1735 const char *buf, size_t count) 1736 { 1737 unsigned int value; 1738 1739 value = simple_strtoul(buf, NULL, 0); 1740 if (value != 0 && value != 1) 1741 return -EINVAL; 1742 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1743 return -EOPNOTSUPP; 1744 mutex_lock(&clock_sync_mutex); 1745 stp_online = value; 1746 if (stp_online) 1747 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1748 else 1749 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1750 queue_work(time_sync_wq, &stp_work); 1751 mutex_unlock(&clock_sync_mutex); 1752 return count; 1753 } 1754 1755 /* 1756 * Can't use DEVICE_ATTR because the attribute should be named 1757 * stp/online but dev_attr_online already exists in this file .. 1758 */ 1759 static struct device_attribute dev_attr_stp_online = { 1760 .attr = { .name = "online", .mode = 0600 }, 1761 .show = stp_online_show, 1762 .store = stp_online_store, 1763 }; 1764 1765 static struct device_attribute *stp_attributes[] = { 1766 &dev_attr_ctn_id, 1767 &dev_attr_ctn_type, 1768 &dev_attr_dst_offset, 1769 &dev_attr_leap_seconds, 1770 &dev_attr_stp_online, 1771 &dev_attr_stratum, 1772 &dev_attr_time_offset, 1773 &dev_attr_time_zone_offset, 1774 &dev_attr_timing_mode, 1775 &dev_attr_timing_state, 1776 NULL 1777 }; 1778 1779 static int __init stp_init_sysfs(void) 1780 { 1781 struct device_attribute **attr; 1782 int rc; 1783 1784 rc = subsys_system_register(&stp_subsys, NULL); 1785 if (rc) 1786 goto out; 1787 for (attr = stp_attributes; *attr; attr++) { 1788 rc = device_create_file(stp_subsys.dev_root, *attr); 1789 if (rc) 1790 goto out_unreg; 1791 } 1792 return 0; 1793 out_unreg: 1794 for (; attr >= stp_attributes; attr--) 1795 device_remove_file(stp_subsys.dev_root, *attr); 1796 bus_unregister(&stp_subsys); 1797 out: 1798 return rc; 1799 } 1800 1801 device_initcall(stp_init_sysfs); 1802