1 /* 2 * Time of day based timer functions. 3 * 4 * S390 version 5 * Copyright IBM Corp. 1999, 2008 6 * Author(s): Hartmut Penner (hp@de.ibm.com), 7 * Martin Schwidefsky (schwidefsky@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 9 * 10 * Derived from "arch/i386/kernel/time.c" 11 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 12 */ 13 14 #define KMSG_COMPONENT "time" 15 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 16 17 #include <linux/kernel_stat.h> 18 #include <linux/errno.h> 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <linux/kernel.h> 22 #include <linux/param.h> 23 #include <linux/string.h> 24 #include <linux/mm.h> 25 #include <linux/interrupt.h> 26 #include <linux/cpu.h> 27 #include <linux/stop_machine.h> 28 #include <linux/time.h> 29 #include <linux/device.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/smp.h> 33 #include <linux/types.h> 34 #include <linux/profile.h> 35 #include <linux/timex.h> 36 #include <linux/notifier.h> 37 #include <linux/timekeeper_internal.h> 38 #include <linux/clockchips.h> 39 #include <linux/gfp.h> 40 #include <linux/kprobes.h> 41 #include <asm/uaccess.h> 42 #include <asm/delay.h> 43 #include <asm/div64.h> 44 #include <asm/vdso.h> 45 #include <asm/irq.h> 46 #include <asm/irq_regs.h> 47 #include <asm/vtimer.h> 48 #include <asm/etr.h> 49 #include <asm/cio.h> 50 #include "entry.h" 51 52 /* change this if you have some constant time drift */ 53 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ) 54 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12) 55 56 u64 sched_clock_base_cc = -1; /* Force to data section. */ 57 EXPORT_SYMBOL_GPL(sched_clock_base_cc); 58 59 static DEFINE_PER_CPU(struct clock_event_device, comparators); 60 61 ATOMIC_NOTIFIER_HEAD(s390_epoch_delta_notifier); 62 EXPORT_SYMBOL(s390_epoch_delta_notifier); 63 64 /* 65 * Scheduler clock - returns current time in nanosec units. 66 */ 67 unsigned long long notrace sched_clock(void) 68 { 69 return tod_to_ns(get_tod_clock_monotonic()); 70 } 71 NOKPROBE_SYMBOL(sched_clock); 72 73 /* 74 * Monotonic_clock - returns # of nanoseconds passed since time_init() 75 */ 76 unsigned long long monotonic_clock(void) 77 { 78 return sched_clock(); 79 } 80 EXPORT_SYMBOL(monotonic_clock); 81 82 void tod_to_timeval(__u64 todval, struct timespec64 *xt) 83 { 84 unsigned long long sec; 85 86 sec = todval >> 12; 87 do_div(sec, 1000000); 88 xt->tv_sec = sec; 89 todval -= (sec * 1000000) << 12; 90 xt->tv_nsec = ((todval * 1000) >> 12); 91 } 92 EXPORT_SYMBOL(tod_to_timeval); 93 94 void clock_comparator_work(void) 95 { 96 struct clock_event_device *cd; 97 98 S390_lowcore.clock_comparator = -1ULL; 99 cd = this_cpu_ptr(&comparators); 100 cd->event_handler(cd); 101 } 102 103 /* 104 * Fixup the clock comparator. 105 */ 106 static void fixup_clock_comparator(unsigned long long delta) 107 { 108 /* If nobody is waiting there's nothing to fix. */ 109 if (S390_lowcore.clock_comparator == -1ULL) 110 return; 111 S390_lowcore.clock_comparator += delta; 112 set_clock_comparator(S390_lowcore.clock_comparator); 113 } 114 115 static int s390_next_event(unsigned long delta, 116 struct clock_event_device *evt) 117 { 118 S390_lowcore.clock_comparator = get_tod_clock() + delta; 119 set_clock_comparator(S390_lowcore.clock_comparator); 120 return 0; 121 } 122 123 /* 124 * Set up lowcore and control register of the current cpu to 125 * enable TOD clock and clock comparator interrupts. 126 */ 127 void init_cpu_timer(void) 128 { 129 struct clock_event_device *cd; 130 int cpu; 131 132 S390_lowcore.clock_comparator = -1ULL; 133 set_clock_comparator(S390_lowcore.clock_comparator); 134 135 cpu = smp_processor_id(); 136 cd = &per_cpu(comparators, cpu); 137 cd->name = "comparator"; 138 cd->features = CLOCK_EVT_FEAT_ONESHOT; 139 cd->mult = 16777; 140 cd->shift = 12; 141 cd->min_delta_ns = 1; 142 cd->max_delta_ns = LONG_MAX; 143 cd->rating = 400; 144 cd->cpumask = cpumask_of(cpu); 145 cd->set_next_event = s390_next_event; 146 147 clockevents_register_device(cd); 148 149 /* Enable clock comparator timer interrupt. */ 150 __ctl_set_bit(0,11); 151 152 /* Always allow the timing alert external interrupt. */ 153 __ctl_set_bit(0, 4); 154 } 155 156 static void clock_comparator_interrupt(struct ext_code ext_code, 157 unsigned int param32, 158 unsigned long param64) 159 { 160 inc_irq_stat(IRQEXT_CLK); 161 if (S390_lowcore.clock_comparator == -1ULL) 162 set_clock_comparator(S390_lowcore.clock_comparator); 163 } 164 165 static void etr_timing_alert(struct etr_irq_parm *); 166 static void stp_timing_alert(struct stp_irq_parm *); 167 168 static void timing_alert_interrupt(struct ext_code ext_code, 169 unsigned int param32, unsigned long param64) 170 { 171 inc_irq_stat(IRQEXT_TLA); 172 if (param32 & 0x00c40000) 173 etr_timing_alert((struct etr_irq_parm *) ¶m32); 174 if (param32 & 0x00038000) 175 stp_timing_alert((struct stp_irq_parm *) ¶m32); 176 } 177 178 static void etr_reset(void); 179 static void stp_reset(void); 180 181 void read_persistent_clock64(struct timespec64 *ts) 182 { 183 tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts); 184 } 185 186 void read_boot_clock64(struct timespec64 *ts) 187 { 188 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts); 189 } 190 191 static cycle_t read_tod_clock(struct clocksource *cs) 192 { 193 return get_tod_clock(); 194 } 195 196 static struct clocksource clocksource_tod = { 197 .name = "tod", 198 .rating = 400, 199 .read = read_tod_clock, 200 .mask = -1ULL, 201 .mult = 1000, 202 .shift = 12, 203 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 204 }; 205 206 struct clocksource * __init clocksource_default_clock(void) 207 { 208 return &clocksource_tod; 209 } 210 211 void update_vsyscall(struct timekeeper *tk) 212 { 213 u64 nsecps; 214 215 if (tk->tkr_mono.clock != &clocksource_tod) 216 return; 217 218 /* Make userspace gettimeofday spin until we're done. */ 219 ++vdso_data->tb_update_count; 220 smp_wmb(); 221 vdso_data->xtime_tod_stamp = tk->tkr_mono.cycle_last; 222 vdso_data->xtime_clock_sec = tk->xtime_sec; 223 vdso_data->xtime_clock_nsec = tk->tkr_mono.xtime_nsec; 224 vdso_data->wtom_clock_sec = 225 tk->xtime_sec + tk->wall_to_monotonic.tv_sec; 226 vdso_data->wtom_clock_nsec = tk->tkr_mono.xtime_nsec + 227 + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr_mono.shift); 228 nsecps = (u64) NSEC_PER_SEC << tk->tkr_mono.shift; 229 while (vdso_data->wtom_clock_nsec >= nsecps) { 230 vdso_data->wtom_clock_nsec -= nsecps; 231 vdso_data->wtom_clock_sec++; 232 } 233 234 vdso_data->xtime_coarse_sec = tk->xtime_sec; 235 vdso_data->xtime_coarse_nsec = 236 (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); 237 vdso_data->wtom_coarse_sec = 238 vdso_data->xtime_coarse_sec + tk->wall_to_monotonic.tv_sec; 239 vdso_data->wtom_coarse_nsec = 240 vdso_data->xtime_coarse_nsec + tk->wall_to_monotonic.tv_nsec; 241 while (vdso_data->wtom_coarse_nsec >= NSEC_PER_SEC) { 242 vdso_data->wtom_coarse_nsec -= NSEC_PER_SEC; 243 vdso_data->wtom_coarse_sec++; 244 } 245 246 vdso_data->tk_mult = tk->tkr_mono.mult; 247 vdso_data->tk_shift = tk->tkr_mono.shift; 248 smp_wmb(); 249 ++vdso_data->tb_update_count; 250 } 251 252 extern struct timezone sys_tz; 253 254 void update_vsyscall_tz(void) 255 { 256 /* Make userspace gettimeofday spin until we're done. */ 257 ++vdso_data->tb_update_count; 258 smp_wmb(); 259 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest; 260 vdso_data->tz_dsttime = sys_tz.tz_dsttime; 261 smp_wmb(); 262 ++vdso_data->tb_update_count; 263 } 264 265 /* 266 * Initialize the TOD clock and the CPU timer of 267 * the boot cpu. 268 */ 269 void __init time_init(void) 270 { 271 /* Reset time synchronization interfaces. */ 272 etr_reset(); 273 stp_reset(); 274 275 /* request the clock comparator external interrupt */ 276 if (register_external_irq(EXT_IRQ_CLK_COMP, clock_comparator_interrupt)) 277 panic("Couldn't request external interrupt 0x1004"); 278 279 /* request the timing alert external interrupt */ 280 if (register_external_irq(EXT_IRQ_TIMING_ALERT, timing_alert_interrupt)) 281 panic("Couldn't request external interrupt 0x1406"); 282 283 if (__clocksource_register(&clocksource_tod) != 0) 284 panic("Could not register TOD clock source"); 285 286 /* Enable TOD clock interrupts on the boot cpu. */ 287 init_cpu_timer(); 288 289 /* Enable cpu timer interrupts on the boot cpu. */ 290 vtime_init(); 291 } 292 293 /* 294 * The time is "clock". old is what we think the time is. 295 * Adjust the value by a multiple of jiffies and add the delta to ntp. 296 * "delay" is an approximation how long the synchronization took. If 297 * the time correction is positive, then "delay" is subtracted from 298 * the time difference and only the remaining part is passed to ntp. 299 */ 300 static unsigned long long adjust_time(unsigned long long old, 301 unsigned long long clock, 302 unsigned long long delay) 303 { 304 unsigned long long delta, ticks; 305 struct timex adjust; 306 307 if (clock > old) { 308 /* It is later than we thought. */ 309 delta = ticks = clock - old; 310 delta = ticks = (delta < delay) ? 0 : delta - delay; 311 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 312 adjust.offset = ticks * (1000000 / HZ); 313 } else { 314 /* It is earlier than we thought. */ 315 delta = ticks = old - clock; 316 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); 317 delta = -delta; 318 adjust.offset = -ticks * (1000000 / HZ); 319 } 320 sched_clock_base_cc += delta; 321 if (adjust.offset != 0) { 322 pr_notice("The ETR interface has adjusted the clock " 323 "by %li microseconds\n", adjust.offset); 324 adjust.modes = ADJ_OFFSET_SINGLESHOT; 325 do_adjtimex(&adjust); 326 } 327 return delta; 328 } 329 330 static DEFINE_PER_CPU(atomic_t, clock_sync_word); 331 static DEFINE_MUTEX(clock_sync_mutex); 332 static unsigned long clock_sync_flags; 333 334 #define CLOCK_SYNC_HAS_ETR 0 335 #define CLOCK_SYNC_HAS_STP 1 336 #define CLOCK_SYNC_ETR 2 337 #define CLOCK_SYNC_STP 3 338 339 /* 340 * The synchronous get_clock function. It will write the current clock 341 * value to the clock pointer and return 0 if the clock is in sync with 342 * the external time source. If the clock mode is local it will return 343 * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external 344 * reference. 345 */ 346 int get_sync_clock(unsigned long long *clock) 347 { 348 atomic_t *sw_ptr; 349 unsigned int sw0, sw1; 350 351 sw_ptr = &get_cpu_var(clock_sync_word); 352 sw0 = atomic_read(sw_ptr); 353 *clock = get_tod_clock(); 354 sw1 = atomic_read(sw_ptr); 355 put_cpu_var(clock_sync_word); 356 if (sw0 == sw1 && (sw0 & 0x80000000U)) 357 /* Success: time is in sync. */ 358 return 0; 359 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && 360 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 361 return -EOPNOTSUPP; 362 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && 363 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) 364 return -EACCES; 365 return -EAGAIN; 366 } 367 EXPORT_SYMBOL(get_sync_clock); 368 369 /* 370 * Make get_sync_clock return -EAGAIN. 371 */ 372 static void disable_sync_clock(void *dummy) 373 { 374 atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word); 375 /* 376 * Clear the in-sync bit 2^31. All get_sync_clock calls will 377 * fail until the sync bit is turned back on. In addition 378 * increase the "sequence" counter to avoid the race of an 379 * etr event and the complete recovery against get_sync_clock. 380 */ 381 atomic_andnot(0x80000000, sw_ptr); 382 atomic_inc(sw_ptr); 383 } 384 385 /* 386 * Make get_sync_clock return 0 again. 387 * Needs to be called from a context disabled for preemption. 388 */ 389 static void enable_sync_clock(void) 390 { 391 atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word); 392 atomic_or(0x80000000, sw_ptr); 393 } 394 395 /* 396 * Function to check if the clock is in sync. 397 */ 398 static inline int check_sync_clock(void) 399 { 400 atomic_t *sw_ptr; 401 int rc; 402 403 sw_ptr = &get_cpu_var(clock_sync_word); 404 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0; 405 put_cpu_var(clock_sync_word); 406 return rc; 407 } 408 409 /* Single threaded workqueue used for etr and stp sync events */ 410 static struct workqueue_struct *time_sync_wq; 411 412 static void __init time_init_wq(void) 413 { 414 if (time_sync_wq) 415 return; 416 time_sync_wq = create_singlethread_workqueue("timesync"); 417 } 418 419 /* 420 * External Time Reference (ETR) code. 421 */ 422 static int etr_port0_online; 423 static int etr_port1_online; 424 static int etr_steai_available; 425 426 static int __init early_parse_etr(char *p) 427 { 428 if (strncmp(p, "off", 3) == 0) 429 etr_port0_online = etr_port1_online = 0; 430 else if (strncmp(p, "port0", 5) == 0) 431 etr_port0_online = 1; 432 else if (strncmp(p, "port1", 5) == 0) 433 etr_port1_online = 1; 434 else if (strncmp(p, "on", 2) == 0) 435 etr_port0_online = etr_port1_online = 1; 436 return 0; 437 } 438 early_param("etr", early_parse_etr); 439 440 enum etr_event { 441 ETR_EVENT_PORT0_CHANGE, 442 ETR_EVENT_PORT1_CHANGE, 443 ETR_EVENT_PORT_ALERT, 444 ETR_EVENT_SYNC_CHECK, 445 ETR_EVENT_SWITCH_LOCAL, 446 ETR_EVENT_UPDATE, 447 }; 448 449 /* 450 * Valid bit combinations of the eacr register are (x = don't care): 451 * e0 e1 dp p0 p1 ea es sl 452 * 0 0 x 0 0 0 0 0 initial, disabled state 453 * 0 0 x 0 1 1 0 0 port 1 online 454 * 0 0 x 1 0 1 0 0 port 0 online 455 * 0 0 x 1 1 1 0 0 both ports online 456 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode 457 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode 458 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync 459 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync 460 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable 461 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync 462 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync 463 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode 464 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode 465 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync 466 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync 467 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable 468 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync 469 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync 470 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync 471 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync 472 */ 473 static struct etr_eacr etr_eacr; 474 static u64 etr_tolec; /* time of last eacr update */ 475 static struct etr_aib etr_port0; 476 static int etr_port0_uptodate; 477 static struct etr_aib etr_port1; 478 static int etr_port1_uptodate; 479 static unsigned long etr_events; 480 static struct timer_list etr_timer; 481 482 static void etr_timeout(unsigned long dummy); 483 static void etr_work_fn(struct work_struct *work); 484 static DEFINE_MUTEX(etr_work_mutex); 485 static DECLARE_WORK(etr_work, etr_work_fn); 486 487 /* 488 * Reset ETR attachment. 489 */ 490 static void etr_reset(void) 491 { 492 etr_eacr = (struct etr_eacr) { 493 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, 494 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, 495 .es = 0, .sl = 0 }; 496 if (etr_setr(&etr_eacr) == 0) { 497 etr_tolec = get_tod_clock(); 498 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); 499 if (etr_port0_online && etr_port1_online) 500 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 501 } else if (etr_port0_online || etr_port1_online) { 502 pr_warn("The real or virtual hardware system does not provide an ETR interface\n"); 503 etr_port0_online = etr_port1_online = 0; 504 } 505 } 506 507 static int __init etr_init(void) 508 { 509 struct etr_aib aib; 510 511 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 512 return 0; 513 time_init_wq(); 514 /* Check if this machine has the steai instruction. */ 515 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) 516 etr_steai_available = 1; 517 setup_timer(&etr_timer, etr_timeout, 0UL); 518 if (etr_port0_online) { 519 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 520 queue_work(time_sync_wq, &etr_work); 521 } 522 if (etr_port1_online) { 523 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 524 queue_work(time_sync_wq, &etr_work); 525 } 526 return 0; 527 } 528 529 arch_initcall(etr_init); 530 531 /* 532 * Two sorts of ETR machine checks. The architecture reads: 533 * "When a machine-check niterruption occurs and if a switch-to-local or 534 * ETR-sync-check interrupt request is pending but disabled, this pending 535 * disabled interruption request is indicated and is cleared". 536 * Which means that we can get etr_switch_to_local events from the machine 537 * check handler although the interruption condition is disabled. Lovely.. 538 */ 539 540 /* 541 * Switch to local machine check. This is called when the last usable 542 * ETR port goes inactive. After switch to local the clock is not in sync. 543 */ 544 int etr_switch_to_local(void) 545 { 546 if (!etr_eacr.sl) 547 return 0; 548 disable_sync_clock(NULL); 549 if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) { 550 etr_eacr.es = etr_eacr.sl = 0; 551 etr_setr(&etr_eacr); 552 return 1; 553 } 554 return 0; 555 } 556 557 /* 558 * ETR sync check machine check. This is called when the ETR OTE and the 559 * local clock OTE are farther apart than the ETR sync check tolerance. 560 * After a ETR sync check the clock is not in sync. The machine check 561 * is broadcasted to all cpus at the same time. 562 */ 563 int etr_sync_check(void) 564 { 565 if (!etr_eacr.es) 566 return 0; 567 disable_sync_clock(NULL); 568 if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) { 569 etr_eacr.es = 0; 570 etr_setr(&etr_eacr); 571 return 1; 572 } 573 return 0; 574 } 575 576 void etr_queue_work(void) 577 { 578 queue_work(time_sync_wq, &etr_work); 579 } 580 581 /* 582 * ETR timing alert. There are two causes: 583 * 1) port state change, check the usability of the port 584 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the 585 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) 586 * or ETR-data word 4 (edf4) has changed. 587 */ 588 static void etr_timing_alert(struct etr_irq_parm *intparm) 589 { 590 if (intparm->pc0) 591 /* ETR port 0 state change. */ 592 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 593 if (intparm->pc1) 594 /* ETR port 1 state change. */ 595 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 596 if (intparm->eai) 597 /* 598 * ETR port alert on either port 0, 1 or both. 599 * Both ports are not up-to-date now. 600 */ 601 set_bit(ETR_EVENT_PORT_ALERT, &etr_events); 602 queue_work(time_sync_wq, &etr_work); 603 } 604 605 static void etr_timeout(unsigned long dummy) 606 { 607 set_bit(ETR_EVENT_UPDATE, &etr_events); 608 queue_work(time_sync_wq, &etr_work); 609 } 610 611 /* 612 * Check if the etr mode is pss. 613 */ 614 static inline int etr_mode_is_pps(struct etr_eacr eacr) 615 { 616 return eacr.es && !eacr.sl; 617 } 618 619 /* 620 * Check if the etr mode is etr. 621 */ 622 static inline int etr_mode_is_etr(struct etr_eacr eacr) 623 { 624 return eacr.es && eacr.sl; 625 } 626 627 /* 628 * Check if the port can be used for TOD synchronization. 629 * For PPS mode the port has to receive OTEs. For ETR mode 630 * the port has to receive OTEs, the ETR stepping bit has to 631 * be zero and the validity bits for data frame 1, 2, and 3 632 * have to be 1. 633 */ 634 static int etr_port_valid(struct etr_aib *aib, int port) 635 { 636 unsigned int psc; 637 638 /* Check that this port is receiving OTEs. */ 639 if (aib->tsp == 0) 640 return 0; 641 642 psc = port ? aib->esw.psc1 : aib->esw.psc0; 643 if (psc == etr_lpsc_pps_mode) 644 return 1; 645 if (psc == etr_lpsc_operational_step) 646 return !aib->esw.y && aib->slsw.v1 && 647 aib->slsw.v2 && aib->slsw.v3; 648 return 0; 649 } 650 651 /* 652 * Check if two ports are on the same network. 653 */ 654 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2) 655 { 656 // FIXME: any other fields we have to compare? 657 return aib1->edf1.net_id == aib2->edf1.net_id; 658 } 659 660 /* 661 * Wrapper for etr_stei that converts physical port states 662 * to logical port states to be consistent with the output 663 * of stetr (see etr_psc vs. etr_lpsc). 664 */ 665 static void etr_steai_cv(struct etr_aib *aib, unsigned int func) 666 { 667 BUG_ON(etr_steai(aib, func) != 0); 668 /* Convert port state to logical port state. */ 669 if (aib->esw.psc0 == 1) 670 aib->esw.psc0 = 2; 671 else if (aib->esw.psc0 == 0 && aib->esw.p == 0) 672 aib->esw.psc0 = 1; 673 if (aib->esw.psc1 == 1) 674 aib->esw.psc1 = 2; 675 else if (aib->esw.psc1 == 0 && aib->esw.p == 1) 676 aib->esw.psc1 = 1; 677 } 678 679 /* 680 * Check if the aib a2 is still connected to the same attachment as 681 * aib a1, the etv values differ by one and a2 is valid. 682 */ 683 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) 684 { 685 int state_a1, state_a2; 686 687 /* Paranoia check: e0/e1 should better be the same. */ 688 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 || 689 a1->esw.eacr.e1 != a2->esw.eacr.e1) 690 return 0; 691 692 /* Still connected to the same etr ? */ 693 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0; 694 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0; 695 if (state_a1 == etr_lpsc_operational_step) { 696 if (state_a2 != etr_lpsc_operational_step || 697 a1->edf1.net_id != a2->edf1.net_id || 698 a1->edf1.etr_id != a2->edf1.etr_id || 699 a1->edf1.etr_pn != a2->edf1.etr_pn) 700 return 0; 701 } else if (state_a2 != etr_lpsc_pps_mode) 702 return 0; 703 704 /* The ETV value of a2 needs to be ETV of a1 + 1. */ 705 if (a1->edf2.etv + 1 != a2->edf2.etv) 706 return 0; 707 708 if (!etr_port_valid(a2, p)) 709 return 0; 710 711 return 1; 712 } 713 714 struct clock_sync_data { 715 atomic_t cpus; 716 int in_sync; 717 unsigned long long fixup_cc; 718 int etr_port; 719 struct etr_aib *etr_aib; 720 }; 721 722 static void clock_sync_cpu(struct clock_sync_data *sync) 723 { 724 atomic_dec(&sync->cpus); 725 enable_sync_clock(); 726 /* 727 * This looks like a busy wait loop but it isn't. etr_sync_cpus 728 * is called on all other cpus while the TOD clocks is stopped. 729 * __udelay will stop the cpu on an enabled wait psw until the 730 * TOD is running again. 731 */ 732 while (sync->in_sync == 0) { 733 __udelay(1); 734 /* 735 * A different cpu changes *in_sync. Therefore use 736 * barrier() to force memory access. 737 */ 738 barrier(); 739 } 740 if (sync->in_sync != 1) 741 /* Didn't work. Clear per-cpu in sync bit again. */ 742 disable_sync_clock(NULL); 743 /* 744 * This round of TOD syncing is done. Set the clock comparator 745 * to the next tick and let the processor continue. 746 */ 747 fixup_clock_comparator(sync->fixup_cc); 748 } 749 750 /* 751 * Sync the TOD clock using the port referred to by aibp. This port 752 * has to be enabled and the other port has to be disabled. The 753 * last eacr update has to be more than 1.6 seconds in the past. 754 */ 755 static int etr_sync_clock(void *data) 756 { 757 static int first; 758 unsigned long long clock, old_clock, clock_delta, delay, delta; 759 struct clock_sync_data *etr_sync; 760 struct etr_aib *sync_port, *aib; 761 int port; 762 int rc; 763 764 etr_sync = data; 765 766 if (xchg(&first, 1) == 1) { 767 /* Slave */ 768 clock_sync_cpu(etr_sync); 769 return 0; 770 } 771 772 /* Wait until all other cpus entered the sync function. */ 773 while (atomic_read(&etr_sync->cpus) != 0) 774 cpu_relax(); 775 776 port = etr_sync->etr_port; 777 aib = etr_sync->etr_aib; 778 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 779 enable_sync_clock(); 780 781 /* Set clock to next OTE. */ 782 __ctl_set_bit(14, 21); 783 __ctl_set_bit(0, 29); 784 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32; 785 old_clock = get_tod_clock(); 786 if (set_tod_clock(clock) == 0) { 787 __udelay(1); /* Wait for the clock to start. */ 788 __ctl_clear_bit(0, 29); 789 __ctl_clear_bit(14, 21); 790 etr_stetr(aib); 791 /* Adjust Linux timing variables. */ 792 delay = (unsigned long long) 793 (aib->edf2.etv - sync_port->edf2.etv) << 32; 794 delta = adjust_time(old_clock, clock, delay); 795 clock_delta = clock - old_clock; 796 atomic_notifier_call_chain(&s390_epoch_delta_notifier, 0, 797 &clock_delta); 798 etr_sync->fixup_cc = delta; 799 fixup_clock_comparator(delta); 800 /* Verify that the clock is properly set. */ 801 if (!etr_aib_follows(sync_port, aib, port)) { 802 /* Didn't work. */ 803 disable_sync_clock(NULL); 804 etr_sync->in_sync = -EAGAIN; 805 rc = -EAGAIN; 806 } else { 807 etr_sync->in_sync = 1; 808 rc = 0; 809 } 810 } else { 811 /* Could not set the clock ?!? */ 812 __ctl_clear_bit(0, 29); 813 __ctl_clear_bit(14, 21); 814 disable_sync_clock(NULL); 815 etr_sync->in_sync = -EAGAIN; 816 rc = -EAGAIN; 817 } 818 xchg(&first, 0); 819 return rc; 820 } 821 822 static int etr_sync_clock_stop(struct etr_aib *aib, int port) 823 { 824 struct clock_sync_data etr_sync; 825 struct etr_aib *sync_port; 826 int follows; 827 int rc; 828 829 /* Check if the current aib is adjacent to the sync port aib. */ 830 sync_port = (port == 0) ? &etr_port0 : &etr_port1; 831 follows = etr_aib_follows(sync_port, aib, port); 832 memcpy(sync_port, aib, sizeof(*aib)); 833 if (!follows) 834 return -EAGAIN; 835 memset(&etr_sync, 0, sizeof(etr_sync)); 836 etr_sync.etr_aib = aib; 837 etr_sync.etr_port = port; 838 get_online_cpus(); 839 atomic_set(&etr_sync.cpus, num_online_cpus() - 1); 840 rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask); 841 put_online_cpus(); 842 return rc; 843 } 844 845 /* 846 * Handle the immediate effects of the different events. 847 * The port change event is used for online/offline changes. 848 */ 849 static struct etr_eacr etr_handle_events(struct etr_eacr eacr) 850 { 851 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) 852 eacr.es = 0; 853 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) 854 eacr.es = eacr.sl = 0; 855 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events)) 856 etr_port0_uptodate = etr_port1_uptodate = 0; 857 858 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) { 859 if (eacr.e0) 860 /* 861 * Port change of an enabled port. We have to 862 * assume that this can have caused an stepping 863 * port switch. 864 */ 865 etr_tolec = get_tod_clock(); 866 eacr.p0 = etr_port0_online; 867 if (!eacr.p0) 868 eacr.e0 = 0; 869 etr_port0_uptodate = 0; 870 } 871 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) { 872 if (eacr.e1) 873 /* 874 * Port change of an enabled port. We have to 875 * assume that this can have caused an stepping 876 * port switch. 877 */ 878 etr_tolec = get_tod_clock(); 879 eacr.p1 = etr_port1_online; 880 if (!eacr.p1) 881 eacr.e1 = 0; 882 etr_port1_uptodate = 0; 883 } 884 clear_bit(ETR_EVENT_UPDATE, &etr_events); 885 return eacr; 886 } 887 888 /* 889 * Set up a timer that expires after the etr_tolec + 1.6 seconds if 890 * one of the ports needs an update. 891 */ 892 static void etr_set_tolec_timeout(unsigned long long now) 893 { 894 unsigned long micros; 895 896 if ((!etr_eacr.p0 || etr_port0_uptodate) && 897 (!etr_eacr.p1 || etr_port1_uptodate)) 898 return; 899 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0; 900 micros = (micros > 1600000) ? 0 : 1600000 - micros; 901 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1); 902 } 903 904 /* 905 * Set up a time that expires after 1/2 second. 906 */ 907 static void etr_set_sync_timeout(void) 908 { 909 mod_timer(&etr_timer, jiffies + HZ/2); 910 } 911 912 /* 913 * Update the aib information for one or both ports. 914 */ 915 static struct etr_eacr etr_handle_update(struct etr_aib *aib, 916 struct etr_eacr eacr) 917 { 918 /* With both ports disabled the aib information is useless. */ 919 if (!eacr.e0 && !eacr.e1) 920 return eacr; 921 922 /* Update port0 or port1 with aib stored in etr_work_fn. */ 923 if (aib->esw.q == 0) { 924 /* Information for port 0 stored. */ 925 if (eacr.p0 && !etr_port0_uptodate) { 926 etr_port0 = *aib; 927 if (etr_port0_online) 928 etr_port0_uptodate = 1; 929 } 930 } else { 931 /* Information for port 1 stored. */ 932 if (eacr.p1 && !etr_port1_uptodate) { 933 etr_port1 = *aib; 934 if (etr_port0_online) 935 etr_port1_uptodate = 1; 936 } 937 } 938 939 /* 940 * Do not try to get the alternate port aib if the clock 941 * is not in sync yet. 942 */ 943 if (!eacr.es || !check_sync_clock()) 944 return eacr; 945 946 /* 947 * If steai is available we can get the information about 948 * the other port immediately. If only stetr is available the 949 * data-port bit toggle has to be used. 950 */ 951 if (etr_steai_available) { 952 if (eacr.p0 && !etr_port0_uptodate) { 953 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); 954 etr_port0_uptodate = 1; 955 } 956 if (eacr.p1 && !etr_port1_uptodate) { 957 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1); 958 etr_port1_uptodate = 1; 959 } 960 } else { 961 /* 962 * One port was updated above, if the other 963 * port is not uptodate toggle dp bit. 964 */ 965 if ((eacr.p0 && !etr_port0_uptodate) || 966 (eacr.p1 && !etr_port1_uptodate)) 967 eacr.dp ^= 1; 968 else 969 eacr.dp = 0; 970 } 971 return eacr; 972 } 973 974 /* 975 * Write new etr control register if it differs from the current one. 976 * Return 1 if etr_tolec has been updated as well. 977 */ 978 static void etr_update_eacr(struct etr_eacr eacr) 979 { 980 int dp_changed; 981 982 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0) 983 /* No change, return. */ 984 return; 985 /* 986 * The disable of an active port of the change of the data port 987 * bit can/will cause a change in the data port. 988 */ 989 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 || 990 (etr_eacr.dp ^ eacr.dp) != 0; 991 etr_eacr = eacr; 992 etr_setr(&etr_eacr); 993 if (dp_changed) 994 etr_tolec = get_tod_clock(); 995 } 996 997 /* 998 * ETR work. In this function you'll find the main logic. In 999 * particular this is the only function that calls etr_update_eacr(), 1000 * it "controls" the etr control register. 1001 */ 1002 static void etr_work_fn(struct work_struct *work) 1003 { 1004 unsigned long long now; 1005 struct etr_eacr eacr; 1006 struct etr_aib aib; 1007 int sync_port; 1008 1009 /* prevent multiple execution. */ 1010 mutex_lock(&etr_work_mutex); 1011 1012 /* Create working copy of etr_eacr. */ 1013 eacr = etr_eacr; 1014 1015 /* Check for the different events and their immediate effects. */ 1016 eacr = etr_handle_events(eacr); 1017 1018 /* Check if ETR is supposed to be active. */ 1019 eacr.ea = eacr.p0 || eacr.p1; 1020 if (!eacr.ea) { 1021 /* Both ports offline. Reset everything. */ 1022 eacr.dp = eacr.es = eacr.sl = 0; 1023 on_each_cpu(disable_sync_clock, NULL, 1); 1024 del_timer_sync(&etr_timer); 1025 etr_update_eacr(eacr); 1026 goto out_unlock; 1027 } 1028 1029 /* Store aib to get the current ETR status word. */ 1030 BUG_ON(etr_stetr(&aib) != 0); 1031 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */ 1032 now = get_tod_clock(); 1033 1034 /* 1035 * Update the port information if the last stepping port change 1036 * or data port change is older than 1.6 seconds. 1037 */ 1038 if (now >= etr_tolec + (1600000 << 12)) 1039 eacr = etr_handle_update(&aib, eacr); 1040 1041 /* 1042 * Select ports to enable. The preferred synchronization mode is PPS. 1043 * If a port can be enabled depends on a number of things: 1044 * 1) The port needs to be online and uptodate. A port is not 1045 * disabled just because it is not uptodate, but it is only 1046 * enabled if it is uptodate. 1047 * 2) The port needs to have the same mode (pps / etr). 1048 * 3) The port needs to be usable -> etr_port_valid() == 1 1049 * 4) To enable the second port the clock needs to be in sync. 1050 * 5) If both ports are useable and are ETR ports, the network id 1051 * has to be the same. 1052 * The eacr.sl bit is used to indicate etr mode vs. pps mode. 1053 */ 1054 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) { 1055 eacr.sl = 0; 1056 eacr.e0 = 1; 1057 if (!etr_mode_is_pps(etr_eacr)) 1058 eacr.es = 0; 1059 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode) 1060 eacr.e1 = 0; 1061 // FIXME: uptodate checks ? 1062 else if (etr_port0_uptodate && etr_port1_uptodate) 1063 eacr.e1 = 1; 1064 sync_port = (etr_port0_uptodate && 1065 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1066 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { 1067 eacr.sl = 0; 1068 eacr.e0 = 0; 1069 eacr.e1 = 1; 1070 if (!etr_mode_is_pps(etr_eacr)) 1071 eacr.es = 0; 1072 sync_port = (etr_port1_uptodate && 1073 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1074 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { 1075 eacr.sl = 1; 1076 eacr.e0 = 1; 1077 if (!etr_mode_is_etr(etr_eacr)) 1078 eacr.es = 0; 1079 if (!eacr.es || !eacr.p1 || 1080 aib.esw.psc1 != etr_lpsc_operational_alt) 1081 eacr.e1 = 0; 1082 else if (etr_port0_uptodate && etr_port1_uptodate && 1083 etr_compare_network(&etr_port0, &etr_port1)) 1084 eacr.e1 = 1; 1085 sync_port = (etr_port0_uptodate && 1086 etr_port_valid(&etr_port0, 0)) ? 0 : -1; 1087 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { 1088 eacr.sl = 1; 1089 eacr.e0 = 0; 1090 eacr.e1 = 1; 1091 if (!etr_mode_is_etr(etr_eacr)) 1092 eacr.es = 0; 1093 sync_port = (etr_port1_uptodate && 1094 etr_port_valid(&etr_port1, 1)) ? 1 : -1; 1095 } else { 1096 /* Both ports not usable. */ 1097 eacr.es = eacr.sl = 0; 1098 sync_port = -1; 1099 } 1100 1101 /* 1102 * If the clock is in sync just update the eacr and return. 1103 * If there is no valid sync port wait for a port update. 1104 */ 1105 if ((eacr.es && check_sync_clock()) || sync_port < 0) { 1106 etr_update_eacr(eacr); 1107 etr_set_tolec_timeout(now); 1108 goto out_unlock; 1109 } 1110 1111 /* 1112 * Prepare control register for clock syncing 1113 * (reset data port bit, set sync check control. 1114 */ 1115 eacr.dp = 0; 1116 eacr.es = 1; 1117 1118 /* 1119 * Update eacr and try to synchronize the clock. If the update 1120 * of eacr caused a stepping port switch (or if we have to 1121 * assume that a stepping port switch has occurred) or the 1122 * clock syncing failed, reset the sync check control bit 1123 * and set up a timer to try again after 0.5 seconds 1124 */ 1125 etr_update_eacr(eacr); 1126 if (now < etr_tolec + (1600000 << 12) || 1127 etr_sync_clock_stop(&aib, sync_port) != 0) { 1128 /* Sync failed. Try again in 1/2 second. */ 1129 eacr.es = 0; 1130 etr_update_eacr(eacr); 1131 etr_set_sync_timeout(); 1132 } else 1133 etr_set_tolec_timeout(now); 1134 out_unlock: 1135 mutex_unlock(&etr_work_mutex); 1136 } 1137 1138 /* 1139 * Sysfs interface functions 1140 */ 1141 static struct bus_type etr_subsys = { 1142 .name = "etr", 1143 .dev_name = "etr", 1144 }; 1145 1146 static struct device etr_port0_dev = { 1147 .id = 0, 1148 .bus = &etr_subsys, 1149 }; 1150 1151 static struct device etr_port1_dev = { 1152 .id = 1, 1153 .bus = &etr_subsys, 1154 }; 1155 1156 /* 1157 * ETR subsys attributes 1158 */ 1159 static ssize_t etr_stepping_port_show(struct device *dev, 1160 struct device_attribute *attr, 1161 char *buf) 1162 { 1163 return sprintf(buf, "%i\n", etr_port0.esw.p); 1164 } 1165 1166 static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL); 1167 1168 static ssize_t etr_stepping_mode_show(struct device *dev, 1169 struct device_attribute *attr, 1170 char *buf) 1171 { 1172 char *mode_str; 1173 1174 if (etr_mode_is_pps(etr_eacr)) 1175 mode_str = "pps"; 1176 else if (etr_mode_is_etr(etr_eacr)) 1177 mode_str = "etr"; 1178 else 1179 mode_str = "local"; 1180 return sprintf(buf, "%s\n", mode_str); 1181 } 1182 1183 static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL); 1184 1185 /* 1186 * ETR port attributes 1187 */ 1188 static inline struct etr_aib *etr_aib_from_dev(struct device *dev) 1189 { 1190 if (dev == &etr_port0_dev) 1191 return etr_port0_online ? &etr_port0 : NULL; 1192 else 1193 return etr_port1_online ? &etr_port1 : NULL; 1194 } 1195 1196 static ssize_t etr_online_show(struct device *dev, 1197 struct device_attribute *attr, 1198 char *buf) 1199 { 1200 unsigned int online; 1201 1202 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online; 1203 return sprintf(buf, "%i\n", online); 1204 } 1205 1206 static ssize_t etr_online_store(struct device *dev, 1207 struct device_attribute *attr, 1208 const char *buf, size_t count) 1209 { 1210 unsigned int value; 1211 1212 value = simple_strtoul(buf, NULL, 0); 1213 if (value != 0 && value != 1) 1214 return -EINVAL; 1215 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) 1216 return -EOPNOTSUPP; 1217 mutex_lock(&clock_sync_mutex); 1218 if (dev == &etr_port0_dev) { 1219 if (etr_port0_online == value) 1220 goto out; /* Nothing to do. */ 1221 etr_port0_online = value; 1222 if (etr_port0_online && etr_port1_online) 1223 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1224 else 1225 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1226 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); 1227 queue_work(time_sync_wq, &etr_work); 1228 } else { 1229 if (etr_port1_online == value) 1230 goto out; /* Nothing to do. */ 1231 etr_port1_online = value; 1232 if (etr_port0_online && etr_port1_online) 1233 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1234 else 1235 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); 1236 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events); 1237 queue_work(time_sync_wq, &etr_work); 1238 } 1239 out: 1240 mutex_unlock(&clock_sync_mutex); 1241 return count; 1242 } 1243 1244 static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store); 1245 1246 static ssize_t etr_stepping_control_show(struct device *dev, 1247 struct device_attribute *attr, 1248 char *buf) 1249 { 1250 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1251 etr_eacr.e0 : etr_eacr.e1); 1252 } 1253 1254 static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); 1255 1256 static ssize_t etr_mode_code_show(struct device *dev, 1257 struct device_attribute *attr, char *buf) 1258 { 1259 if (!etr_port0_online && !etr_port1_online) 1260 /* Status word is not uptodate if both ports are offline. */ 1261 return -ENODATA; 1262 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? 1263 etr_port0.esw.psc0 : etr_port0.esw.psc1); 1264 } 1265 1266 static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL); 1267 1268 static ssize_t etr_untuned_show(struct device *dev, 1269 struct device_attribute *attr, char *buf) 1270 { 1271 struct etr_aib *aib = etr_aib_from_dev(dev); 1272 1273 if (!aib || !aib->slsw.v1) 1274 return -ENODATA; 1275 return sprintf(buf, "%i\n", aib->edf1.u); 1276 } 1277 1278 static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL); 1279 1280 static ssize_t etr_network_id_show(struct device *dev, 1281 struct device_attribute *attr, char *buf) 1282 { 1283 struct etr_aib *aib = etr_aib_from_dev(dev); 1284 1285 if (!aib || !aib->slsw.v1) 1286 return -ENODATA; 1287 return sprintf(buf, "%i\n", aib->edf1.net_id); 1288 } 1289 1290 static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL); 1291 1292 static ssize_t etr_id_show(struct device *dev, 1293 struct device_attribute *attr, char *buf) 1294 { 1295 struct etr_aib *aib = etr_aib_from_dev(dev); 1296 1297 if (!aib || !aib->slsw.v1) 1298 return -ENODATA; 1299 return sprintf(buf, "%i\n", aib->edf1.etr_id); 1300 } 1301 1302 static DEVICE_ATTR(id, 0400, etr_id_show, NULL); 1303 1304 static ssize_t etr_port_number_show(struct device *dev, 1305 struct device_attribute *attr, char *buf) 1306 { 1307 struct etr_aib *aib = etr_aib_from_dev(dev); 1308 1309 if (!aib || !aib->slsw.v1) 1310 return -ENODATA; 1311 return sprintf(buf, "%i\n", aib->edf1.etr_pn); 1312 } 1313 1314 static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL); 1315 1316 static ssize_t etr_coupled_show(struct device *dev, 1317 struct device_attribute *attr, char *buf) 1318 { 1319 struct etr_aib *aib = etr_aib_from_dev(dev); 1320 1321 if (!aib || !aib->slsw.v3) 1322 return -ENODATA; 1323 return sprintf(buf, "%i\n", aib->edf3.c); 1324 } 1325 1326 static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL); 1327 1328 static ssize_t etr_local_time_show(struct device *dev, 1329 struct device_attribute *attr, char *buf) 1330 { 1331 struct etr_aib *aib = etr_aib_from_dev(dev); 1332 1333 if (!aib || !aib->slsw.v3) 1334 return -ENODATA; 1335 return sprintf(buf, "%i\n", aib->edf3.blto); 1336 } 1337 1338 static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL); 1339 1340 static ssize_t etr_utc_offset_show(struct device *dev, 1341 struct device_attribute *attr, char *buf) 1342 { 1343 struct etr_aib *aib = etr_aib_from_dev(dev); 1344 1345 if (!aib || !aib->slsw.v3) 1346 return -ENODATA; 1347 return sprintf(buf, "%i\n", aib->edf3.buo); 1348 } 1349 1350 static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL); 1351 1352 static struct device_attribute *etr_port_attributes[] = { 1353 &dev_attr_online, 1354 &dev_attr_stepping_control, 1355 &dev_attr_state_code, 1356 &dev_attr_untuned, 1357 &dev_attr_network, 1358 &dev_attr_id, 1359 &dev_attr_port, 1360 &dev_attr_coupled, 1361 &dev_attr_local_time, 1362 &dev_attr_utc_offset, 1363 NULL 1364 }; 1365 1366 static int __init etr_register_port(struct device *dev) 1367 { 1368 struct device_attribute **attr; 1369 int rc; 1370 1371 rc = device_register(dev); 1372 if (rc) 1373 goto out; 1374 for (attr = etr_port_attributes; *attr; attr++) { 1375 rc = device_create_file(dev, *attr); 1376 if (rc) 1377 goto out_unreg; 1378 } 1379 return 0; 1380 out_unreg: 1381 for (; attr >= etr_port_attributes; attr--) 1382 device_remove_file(dev, *attr); 1383 device_unregister(dev); 1384 out: 1385 return rc; 1386 } 1387 1388 static void __init etr_unregister_port(struct device *dev) 1389 { 1390 struct device_attribute **attr; 1391 1392 for (attr = etr_port_attributes; *attr; attr++) 1393 device_remove_file(dev, *attr); 1394 device_unregister(dev); 1395 } 1396 1397 static int __init etr_init_sysfs(void) 1398 { 1399 int rc; 1400 1401 rc = subsys_system_register(&etr_subsys, NULL); 1402 if (rc) 1403 goto out; 1404 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port); 1405 if (rc) 1406 goto out_unreg_subsys; 1407 rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode); 1408 if (rc) 1409 goto out_remove_stepping_port; 1410 rc = etr_register_port(&etr_port0_dev); 1411 if (rc) 1412 goto out_remove_stepping_mode; 1413 rc = etr_register_port(&etr_port1_dev); 1414 if (rc) 1415 goto out_remove_port0; 1416 return 0; 1417 1418 out_remove_port0: 1419 etr_unregister_port(&etr_port0_dev); 1420 out_remove_stepping_mode: 1421 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode); 1422 out_remove_stepping_port: 1423 device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port); 1424 out_unreg_subsys: 1425 bus_unregister(&etr_subsys); 1426 out: 1427 return rc; 1428 } 1429 1430 device_initcall(etr_init_sysfs); 1431 1432 /* 1433 * Server Time Protocol (STP) code. 1434 */ 1435 static bool stp_online; 1436 static struct stp_sstpi stp_info; 1437 static void *stp_page; 1438 1439 static void stp_work_fn(struct work_struct *work); 1440 static DEFINE_MUTEX(stp_work_mutex); 1441 static DECLARE_WORK(stp_work, stp_work_fn); 1442 static struct timer_list stp_timer; 1443 1444 static int __init early_parse_stp(char *p) 1445 { 1446 return kstrtobool(p, &stp_online); 1447 } 1448 early_param("stp", early_parse_stp); 1449 1450 /* 1451 * Reset STP attachment. 1452 */ 1453 static void __init stp_reset(void) 1454 { 1455 int rc; 1456 1457 stp_page = (void *) get_zeroed_page(GFP_ATOMIC); 1458 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1459 if (rc == 0) 1460 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); 1461 else if (stp_online) { 1462 pr_warn("The real or virtual hardware system does not provide an STP interface\n"); 1463 free_page((unsigned long) stp_page); 1464 stp_page = NULL; 1465 stp_online = 0; 1466 } 1467 } 1468 1469 static void stp_timeout(unsigned long dummy) 1470 { 1471 queue_work(time_sync_wq, &stp_work); 1472 } 1473 1474 static int __init stp_init(void) 1475 { 1476 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1477 return 0; 1478 setup_timer(&stp_timer, stp_timeout, 0UL); 1479 time_init_wq(); 1480 if (!stp_online) 1481 return 0; 1482 queue_work(time_sync_wq, &stp_work); 1483 return 0; 1484 } 1485 1486 arch_initcall(stp_init); 1487 1488 /* 1489 * STP timing alert. There are three causes: 1490 * 1) timing status change 1491 * 2) link availability change 1492 * 3) time control parameter change 1493 * In all three cases we are only interested in the clock source state. 1494 * If a STP clock source is now available use it. 1495 */ 1496 static void stp_timing_alert(struct stp_irq_parm *intparm) 1497 { 1498 if (intparm->tsc || intparm->lac || intparm->tcpc) 1499 queue_work(time_sync_wq, &stp_work); 1500 } 1501 1502 /* 1503 * STP sync check machine check. This is called when the timing state 1504 * changes from the synchronized state to the unsynchronized state. 1505 * After a STP sync check the clock is not in sync. The machine check 1506 * is broadcasted to all cpus at the same time. 1507 */ 1508 int stp_sync_check(void) 1509 { 1510 disable_sync_clock(NULL); 1511 return 1; 1512 } 1513 1514 /* 1515 * STP island condition machine check. This is called when an attached 1516 * server attempts to communicate over an STP link and the servers 1517 * have matching CTN ids and have a valid stratum-1 configuration 1518 * but the configurations do not match. 1519 */ 1520 int stp_island_check(void) 1521 { 1522 disable_sync_clock(NULL); 1523 return 1; 1524 } 1525 1526 void stp_queue_work(void) 1527 { 1528 queue_work(time_sync_wq, &stp_work); 1529 } 1530 1531 static int stp_sync_clock(void *data) 1532 { 1533 static int first; 1534 unsigned long long old_clock, delta, new_clock, clock_delta; 1535 struct clock_sync_data *stp_sync; 1536 int rc; 1537 1538 stp_sync = data; 1539 1540 if (xchg(&first, 1) == 1) { 1541 /* Slave */ 1542 clock_sync_cpu(stp_sync); 1543 return 0; 1544 } 1545 1546 /* Wait until all other cpus entered the sync function. */ 1547 while (atomic_read(&stp_sync->cpus) != 0) 1548 cpu_relax(); 1549 1550 enable_sync_clock(); 1551 1552 rc = 0; 1553 if (stp_info.todoff[0] || stp_info.todoff[1] || 1554 stp_info.todoff[2] || stp_info.todoff[3] || 1555 stp_info.tmd != 2) { 1556 old_clock = get_tod_clock(); 1557 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); 1558 if (rc == 0) { 1559 new_clock = get_tod_clock(); 1560 delta = adjust_time(old_clock, new_clock, 0); 1561 clock_delta = new_clock - old_clock; 1562 atomic_notifier_call_chain(&s390_epoch_delta_notifier, 1563 0, &clock_delta); 1564 fixup_clock_comparator(delta); 1565 rc = chsc_sstpi(stp_page, &stp_info, 1566 sizeof(struct stp_sstpi)); 1567 if (rc == 0 && stp_info.tmd != 2) 1568 rc = -EAGAIN; 1569 } 1570 } 1571 if (rc) { 1572 disable_sync_clock(NULL); 1573 stp_sync->in_sync = -EAGAIN; 1574 } else 1575 stp_sync->in_sync = 1; 1576 xchg(&first, 0); 1577 return 0; 1578 } 1579 1580 /* 1581 * STP work. Check for the STP state and take over the clock 1582 * synchronization if the STP clock source is usable. 1583 */ 1584 static void stp_work_fn(struct work_struct *work) 1585 { 1586 struct clock_sync_data stp_sync; 1587 int rc; 1588 1589 /* prevent multiple execution. */ 1590 mutex_lock(&stp_work_mutex); 1591 1592 if (!stp_online) { 1593 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); 1594 del_timer_sync(&stp_timer); 1595 goto out_unlock; 1596 } 1597 1598 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); 1599 if (rc) 1600 goto out_unlock; 1601 1602 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); 1603 if (rc || stp_info.c == 0) 1604 goto out_unlock; 1605 1606 /* Skip synchronization if the clock is already in sync. */ 1607 if (check_sync_clock()) 1608 goto out_unlock; 1609 1610 memset(&stp_sync, 0, sizeof(stp_sync)); 1611 get_online_cpus(); 1612 atomic_set(&stp_sync.cpus, num_online_cpus() - 1); 1613 stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask); 1614 put_online_cpus(); 1615 1616 if (!check_sync_clock()) 1617 /* 1618 * There is a usable clock but the synchonization failed. 1619 * Retry after a second. 1620 */ 1621 mod_timer(&stp_timer, jiffies + HZ); 1622 1623 out_unlock: 1624 mutex_unlock(&stp_work_mutex); 1625 } 1626 1627 /* 1628 * STP subsys sysfs interface functions 1629 */ 1630 static struct bus_type stp_subsys = { 1631 .name = "stp", 1632 .dev_name = "stp", 1633 }; 1634 1635 static ssize_t stp_ctn_id_show(struct device *dev, 1636 struct device_attribute *attr, 1637 char *buf) 1638 { 1639 if (!stp_online) 1640 return -ENODATA; 1641 return sprintf(buf, "%016llx\n", 1642 *(unsigned long long *) stp_info.ctnid); 1643 } 1644 1645 static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); 1646 1647 static ssize_t stp_ctn_type_show(struct device *dev, 1648 struct device_attribute *attr, 1649 char *buf) 1650 { 1651 if (!stp_online) 1652 return -ENODATA; 1653 return sprintf(buf, "%i\n", stp_info.ctn); 1654 } 1655 1656 static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); 1657 1658 static ssize_t stp_dst_offset_show(struct device *dev, 1659 struct device_attribute *attr, 1660 char *buf) 1661 { 1662 if (!stp_online || !(stp_info.vbits & 0x2000)) 1663 return -ENODATA; 1664 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); 1665 } 1666 1667 static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); 1668 1669 static ssize_t stp_leap_seconds_show(struct device *dev, 1670 struct device_attribute *attr, 1671 char *buf) 1672 { 1673 if (!stp_online || !(stp_info.vbits & 0x8000)) 1674 return -ENODATA; 1675 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); 1676 } 1677 1678 static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); 1679 1680 static ssize_t stp_stratum_show(struct device *dev, 1681 struct device_attribute *attr, 1682 char *buf) 1683 { 1684 if (!stp_online) 1685 return -ENODATA; 1686 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); 1687 } 1688 1689 static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL); 1690 1691 static ssize_t stp_time_offset_show(struct device *dev, 1692 struct device_attribute *attr, 1693 char *buf) 1694 { 1695 if (!stp_online || !(stp_info.vbits & 0x0800)) 1696 return -ENODATA; 1697 return sprintf(buf, "%i\n", (int) stp_info.tto); 1698 } 1699 1700 static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL); 1701 1702 static ssize_t stp_time_zone_offset_show(struct device *dev, 1703 struct device_attribute *attr, 1704 char *buf) 1705 { 1706 if (!stp_online || !(stp_info.vbits & 0x4000)) 1707 return -ENODATA; 1708 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); 1709 } 1710 1711 static DEVICE_ATTR(time_zone_offset, 0400, 1712 stp_time_zone_offset_show, NULL); 1713 1714 static ssize_t stp_timing_mode_show(struct device *dev, 1715 struct device_attribute *attr, 1716 char *buf) 1717 { 1718 if (!stp_online) 1719 return -ENODATA; 1720 return sprintf(buf, "%i\n", stp_info.tmd); 1721 } 1722 1723 static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); 1724 1725 static ssize_t stp_timing_state_show(struct device *dev, 1726 struct device_attribute *attr, 1727 char *buf) 1728 { 1729 if (!stp_online) 1730 return -ENODATA; 1731 return sprintf(buf, "%i\n", stp_info.tst); 1732 } 1733 1734 static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL); 1735 1736 static ssize_t stp_online_show(struct device *dev, 1737 struct device_attribute *attr, 1738 char *buf) 1739 { 1740 return sprintf(buf, "%i\n", stp_online); 1741 } 1742 1743 static ssize_t stp_online_store(struct device *dev, 1744 struct device_attribute *attr, 1745 const char *buf, size_t count) 1746 { 1747 unsigned int value; 1748 1749 value = simple_strtoul(buf, NULL, 0); 1750 if (value != 0 && value != 1) 1751 return -EINVAL; 1752 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) 1753 return -EOPNOTSUPP; 1754 mutex_lock(&clock_sync_mutex); 1755 stp_online = value; 1756 if (stp_online) 1757 set_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1758 else 1759 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); 1760 queue_work(time_sync_wq, &stp_work); 1761 mutex_unlock(&clock_sync_mutex); 1762 return count; 1763 } 1764 1765 /* 1766 * Can't use DEVICE_ATTR because the attribute should be named 1767 * stp/online but dev_attr_online already exists in this file .. 1768 */ 1769 static struct device_attribute dev_attr_stp_online = { 1770 .attr = { .name = "online", .mode = 0600 }, 1771 .show = stp_online_show, 1772 .store = stp_online_store, 1773 }; 1774 1775 static struct device_attribute *stp_attributes[] = { 1776 &dev_attr_ctn_id, 1777 &dev_attr_ctn_type, 1778 &dev_attr_dst_offset, 1779 &dev_attr_leap_seconds, 1780 &dev_attr_stp_online, 1781 &dev_attr_stratum, 1782 &dev_attr_time_offset, 1783 &dev_attr_time_zone_offset, 1784 &dev_attr_timing_mode, 1785 &dev_attr_timing_state, 1786 NULL 1787 }; 1788 1789 static int __init stp_init_sysfs(void) 1790 { 1791 struct device_attribute **attr; 1792 int rc; 1793 1794 rc = subsys_system_register(&stp_subsys, NULL); 1795 if (rc) 1796 goto out; 1797 for (attr = stp_attributes; *attr; attr++) { 1798 rc = device_create_file(stp_subsys.dev_root, *attr); 1799 if (rc) 1800 goto out_unreg; 1801 } 1802 return 0; 1803 out_unreg: 1804 for (; attr >= stp_attributes; attr--) 1805 device_remove_file(stp_subsys.dev_root, *attr); 1806 bus_unregister(&stp_subsys); 1807 out: 1808 return rc; 1809 } 1810 1811 device_initcall(stp_init_sysfs); 1812