1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/memblock.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/kprobes.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/debug.h> 51 #include <asm/os_info.h> 52 #include <asm/sigp.h> 53 #include <asm/idle.h> 54 #include <asm/nmi.h> 55 #include <asm/stacktrace.h> 56 #include <asm/topology.h> 57 #include <asm/vdso.h> 58 #include "entry.h" 59 60 enum { 61 ec_schedule = 0, 62 ec_call_function_single, 63 ec_stop_cpu, 64 ec_mcck_pending, 65 }; 66 67 enum { 68 CPU_STATE_STANDBY, 69 CPU_STATE_CONFIGURED, 70 }; 71 72 static DEFINE_PER_CPU(struct cpu *, cpu_device); 73 74 struct pcpu { 75 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 76 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 77 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 78 signed char state; /* physical cpu state */ 79 signed char polarization; /* physical polarization */ 80 u16 address; /* physical cpu address */ 81 }; 82 83 static u8 boot_core_type; 84 static struct pcpu pcpu_devices[NR_CPUS]; 85 86 unsigned int smp_cpu_mt_shift; 87 EXPORT_SYMBOL(smp_cpu_mt_shift); 88 89 unsigned int smp_cpu_mtid; 90 EXPORT_SYMBOL(smp_cpu_mtid); 91 92 #ifdef CONFIG_CRASH_DUMP 93 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 94 #endif 95 96 static unsigned int smp_max_threads __initdata = -1U; 97 98 static int __init early_nosmt(char *s) 99 { 100 smp_max_threads = 1; 101 return 0; 102 } 103 early_param("nosmt", early_nosmt); 104 105 static int __init early_smt(char *s) 106 { 107 get_option(&s, &smp_max_threads); 108 return 0; 109 } 110 early_param("smt", early_smt); 111 112 /* 113 * The smp_cpu_state_mutex must be held when changing the state or polarization 114 * member of a pcpu data structure within the pcpu_devices arreay. 115 */ 116 DEFINE_MUTEX(smp_cpu_state_mutex); 117 118 /* 119 * Signal processor helper functions. 120 */ 121 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 122 { 123 int cc; 124 125 while (1) { 126 cc = __pcpu_sigp(addr, order, parm, NULL); 127 if (cc != SIGP_CC_BUSY) 128 return cc; 129 cpu_relax(); 130 } 131 } 132 133 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 134 { 135 int cc, retry; 136 137 for (retry = 0; ; retry++) { 138 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 139 if (cc != SIGP_CC_BUSY) 140 break; 141 if (retry >= 3) 142 udelay(10); 143 } 144 return cc; 145 } 146 147 static inline int pcpu_stopped(struct pcpu *pcpu) 148 { 149 u32 status; 150 151 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 152 0, &status) != SIGP_CC_STATUS_STORED) 153 return 0; 154 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 155 } 156 157 static inline int pcpu_running(struct pcpu *pcpu) 158 { 159 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 160 0, NULL) != SIGP_CC_STATUS_STORED) 161 return 1; 162 /* Status stored condition code is equivalent to cpu not running. */ 163 return 0; 164 } 165 166 /* 167 * Find struct pcpu by cpu address. 168 */ 169 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 170 { 171 int cpu; 172 173 for_each_cpu(cpu, mask) 174 if (pcpu_devices[cpu].address == address) 175 return pcpu_devices + cpu; 176 return NULL; 177 } 178 179 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 180 { 181 int order; 182 183 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 184 return; 185 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 186 pcpu->ec_clk = get_tod_clock_fast(); 187 pcpu_sigp_retry(pcpu, order, 0); 188 } 189 190 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 191 { 192 unsigned long async_stack, nodat_stack; 193 struct lowcore *lc; 194 195 if (pcpu != &pcpu_devices[0]) { 196 pcpu->lowcore = (struct lowcore *) 197 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 198 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 199 if (!pcpu->lowcore || !nodat_stack) 200 goto out; 201 } else { 202 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 203 } 204 async_stack = stack_alloc(); 205 if (!async_stack) 206 goto out; 207 lc = pcpu->lowcore; 208 memcpy(lc, &S390_lowcore, 512); 209 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 210 lc->async_stack = async_stack + STACK_INIT_OFFSET; 211 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 212 lc->cpu_nr = cpu; 213 lc->spinlock_lockval = arch_spin_lockval(cpu); 214 lc->spinlock_index = 0; 215 lc->br_r1_trampoline = 0x07f1; /* br %r1 */ 216 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW); 217 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW); 218 if (nmi_alloc_per_cpu(lc)) 219 goto out_async; 220 lowcore_ptr[cpu] = lc; 221 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 222 return 0; 223 224 out_async: 225 stack_free(async_stack); 226 out: 227 if (pcpu != &pcpu_devices[0]) { 228 free_pages(nodat_stack, THREAD_SIZE_ORDER); 229 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 230 } 231 return -ENOMEM; 232 } 233 234 static void pcpu_free_lowcore(struct pcpu *pcpu) 235 { 236 unsigned long async_stack, nodat_stack, lowcore; 237 238 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 239 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET; 240 lowcore = (unsigned long) pcpu->lowcore; 241 242 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 243 lowcore_ptr[pcpu - pcpu_devices] = NULL; 244 nmi_free_per_cpu(pcpu->lowcore); 245 stack_free(async_stack); 246 if (pcpu == &pcpu_devices[0]) 247 return; 248 free_pages(nodat_stack, THREAD_SIZE_ORDER); 249 free_pages(lowcore, LC_ORDER); 250 } 251 252 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 253 { 254 struct lowcore *lc = pcpu->lowcore; 255 256 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 257 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 258 lc->cpu_nr = cpu; 259 lc->spinlock_lockval = arch_spin_lockval(cpu); 260 lc->spinlock_index = 0; 261 lc->percpu_offset = __per_cpu_offset[cpu]; 262 lc->kernel_asce = S390_lowcore.kernel_asce; 263 lc->user_asce = s390_invalid_asce; 264 lc->machine_flags = S390_lowcore.machine_flags; 265 lc->user_timer = lc->system_timer = 266 lc->steal_timer = lc->avg_steal_timer = 0; 267 __ctl_store(lc->cregs_save_area, 0, 15); 268 lc->cregs_save_area[1] = lc->kernel_asce; 269 lc->cregs_save_area[7] = lc->user_asce; 270 save_access_regs((unsigned int *) lc->access_regs_save_area); 271 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 272 sizeof(lc->stfle_fac_list)); 273 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list, 274 sizeof(lc->alt_stfle_fac_list)); 275 arch_spin_lock_setup(cpu); 276 } 277 278 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 279 { 280 struct lowcore *lc = pcpu->lowcore; 281 282 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 283 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 284 lc->current_task = (unsigned long) tsk; 285 lc->lpp = LPP_MAGIC; 286 lc->current_pid = tsk->pid; 287 lc->user_timer = tsk->thread.user_timer; 288 lc->guest_timer = tsk->thread.guest_timer; 289 lc->system_timer = tsk->thread.system_timer; 290 lc->hardirq_timer = tsk->thread.hardirq_timer; 291 lc->softirq_timer = tsk->thread.softirq_timer; 292 lc->steal_timer = 0; 293 } 294 295 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 296 { 297 struct lowcore *lc = pcpu->lowcore; 298 299 lc->restart_stack = lc->nodat_stack; 300 lc->restart_fn = (unsigned long) func; 301 lc->restart_data = (unsigned long) data; 302 lc->restart_source = -1UL; 303 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 304 } 305 306 /* 307 * Call function via PSW restart on pcpu and stop the current cpu. 308 */ 309 static void __pcpu_delegate(void (*func)(void*), void *data) 310 { 311 func(data); /* should not return */ 312 } 313 314 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu, 315 void (*func)(void *), 316 void *data, unsigned long stack) 317 { 318 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 319 unsigned long source_cpu = stap(); 320 321 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 322 if (pcpu->address == source_cpu) 323 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data); 324 /* Stop target cpu (if func returns this stops the current cpu). */ 325 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 326 /* Restart func on the target cpu and stop the current cpu. */ 327 mem_assign_absolute(lc->restart_stack, stack); 328 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 329 mem_assign_absolute(lc->restart_data, (unsigned long) data); 330 mem_assign_absolute(lc->restart_source, source_cpu); 331 __bpon(); 332 asm volatile( 333 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 334 " brc 2,0b # busy, try again\n" 335 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 336 " brc 2,1b # busy, try again\n" 337 : : "d" (pcpu->address), "d" (source_cpu), 338 "K" (SIGP_RESTART), "K" (SIGP_STOP) 339 : "0", "1", "cc"); 340 for (;;) ; 341 } 342 343 /* 344 * Enable additional logical cpus for multi-threading. 345 */ 346 static int pcpu_set_smt(unsigned int mtid) 347 { 348 int cc; 349 350 if (smp_cpu_mtid == mtid) 351 return 0; 352 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 353 if (cc == 0) { 354 smp_cpu_mtid = mtid; 355 smp_cpu_mt_shift = 0; 356 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 357 smp_cpu_mt_shift++; 358 pcpu_devices[0].address = stap(); 359 } 360 return cc; 361 } 362 363 /* 364 * Call function on an online CPU. 365 */ 366 void smp_call_online_cpu(void (*func)(void *), void *data) 367 { 368 struct pcpu *pcpu; 369 370 /* Use the current cpu if it is online. */ 371 pcpu = pcpu_find_address(cpu_online_mask, stap()); 372 if (!pcpu) 373 /* Use the first online cpu. */ 374 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 375 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 376 } 377 378 /* 379 * Call function on the ipl CPU. 380 */ 381 void smp_call_ipl_cpu(void (*func)(void *), void *data) 382 { 383 struct lowcore *lc = pcpu_devices->lowcore; 384 385 if (pcpu_devices[0].address == stap()) 386 lc = &S390_lowcore; 387 388 pcpu_delegate(&pcpu_devices[0], func, data, 389 lc->nodat_stack); 390 } 391 392 int smp_find_processor_id(u16 address) 393 { 394 int cpu; 395 396 for_each_present_cpu(cpu) 397 if (pcpu_devices[cpu].address == address) 398 return cpu; 399 return -1; 400 } 401 402 void schedule_mcck_handler(void) 403 { 404 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending); 405 } 406 407 bool notrace arch_vcpu_is_preempted(int cpu) 408 { 409 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 410 return false; 411 if (pcpu_running(pcpu_devices + cpu)) 412 return false; 413 return true; 414 } 415 EXPORT_SYMBOL(arch_vcpu_is_preempted); 416 417 void notrace smp_yield_cpu(int cpu) 418 { 419 if (!MACHINE_HAS_DIAG9C) 420 return; 421 diag_stat_inc_norecursion(DIAG_STAT_X09C); 422 asm volatile("diag %0,0,0x9c" 423 : : "d" (pcpu_devices[cpu].address)); 424 } 425 426 /* 427 * Send cpus emergency shutdown signal. This gives the cpus the 428 * opportunity to complete outstanding interrupts. 429 */ 430 void notrace smp_emergency_stop(void) 431 { 432 cpumask_t cpumask; 433 u64 end; 434 int cpu; 435 436 cpumask_copy(&cpumask, cpu_online_mask); 437 cpumask_clear_cpu(smp_processor_id(), &cpumask); 438 439 end = get_tod_clock() + (1000000UL << 12); 440 for_each_cpu(cpu, &cpumask) { 441 struct pcpu *pcpu = pcpu_devices + cpu; 442 set_bit(ec_stop_cpu, &pcpu->ec_mask); 443 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 444 0, NULL) == SIGP_CC_BUSY && 445 get_tod_clock() < end) 446 cpu_relax(); 447 } 448 while (get_tod_clock() < end) { 449 for_each_cpu(cpu, &cpumask) 450 if (pcpu_stopped(pcpu_devices + cpu)) 451 cpumask_clear_cpu(cpu, &cpumask); 452 if (cpumask_empty(&cpumask)) 453 break; 454 cpu_relax(); 455 } 456 } 457 NOKPROBE_SYMBOL(smp_emergency_stop); 458 459 /* 460 * Stop all cpus but the current one. 461 */ 462 void smp_send_stop(void) 463 { 464 int cpu; 465 466 /* Disable all interrupts/machine checks */ 467 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 468 trace_hardirqs_off(); 469 470 debug_set_critical(); 471 472 if (oops_in_progress) 473 smp_emergency_stop(); 474 475 /* stop all processors */ 476 for_each_online_cpu(cpu) { 477 if (cpu == smp_processor_id()) 478 continue; 479 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 480 while (!pcpu_stopped(pcpu_devices + cpu)) 481 cpu_relax(); 482 } 483 } 484 485 /* 486 * This is the main routine where commands issued by other 487 * cpus are handled. 488 */ 489 static void smp_handle_ext_call(void) 490 { 491 unsigned long bits; 492 493 /* handle bit signal external calls */ 494 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 495 if (test_bit(ec_stop_cpu, &bits)) 496 smp_stop_cpu(); 497 if (test_bit(ec_schedule, &bits)) 498 scheduler_ipi(); 499 if (test_bit(ec_call_function_single, &bits)) 500 generic_smp_call_function_single_interrupt(); 501 if (test_bit(ec_mcck_pending, &bits)) 502 s390_handle_mcck(); 503 } 504 505 static void do_ext_call_interrupt(struct ext_code ext_code, 506 unsigned int param32, unsigned long param64) 507 { 508 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 509 smp_handle_ext_call(); 510 } 511 512 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 513 { 514 int cpu; 515 516 for_each_cpu(cpu, mask) 517 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 518 } 519 520 void arch_send_call_function_single_ipi(int cpu) 521 { 522 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 523 } 524 525 /* 526 * this function sends a 'reschedule' IPI to another CPU. 527 * it goes straight through and wastes no time serializing 528 * anything. Worst case is that we lose a reschedule ... 529 */ 530 void smp_send_reschedule(int cpu) 531 { 532 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 533 } 534 535 /* 536 * parameter area for the set/clear control bit callbacks 537 */ 538 struct ec_creg_mask_parms { 539 unsigned long orval; 540 unsigned long andval; 541 int cr; 542 }; 543 544 /* 545 * callback for setting/clearing control bits 546 */ 547 static void smp_ctl_bit_callback(void *info) 548 { 549 struct ec_creg_mask_parms *pp = info; 550 unsigned long cregs[16]; 551 552 __ctl_store(cregs, 0, 15); 553 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 554 __ctl_load(cregs, 0, 15); 555 } 556 557 /* 558 * Set a bit in a control register of all cpus 559 */ 560 void smp_ctl_set_bit(int cr, int bit) 561 { 562 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 563 564 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 565 } 566 EXPORT_SYMBOL(smp_ctl_set_bit); 567 568 /* 569 * Clear a bit in a control register of all cpus 570 */ 571 void smp_ctl_clear_bit(int cr, int bit) 572 { 573 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 574 575 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 576 } 577 EXPORT_SYMBOL(smp_ctl_clear_bit); 578 579 #ifdef CONFIG_CRASH_DUMP 580 581 int smp_store_status(int cpu) 582 { 583 struct pcpu *pcpu = pcpu_devices + cpu; 584 unsigned long pa; 585 586 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 587 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 588 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 589 return -EIO; 590 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 591 return 0; 592 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 593 if (MACHINE_HAS_GS) 594 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 595 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 596 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 597 return -EIO; 598 return 0; 599 } 600 601 /* 602 * Collect CPU state of the previous, crashed system. 603 * There are four cases: 604 * 1) standard zfcp/nvme dump 605 * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true 606 * The state for all CPUs except the boot CPU needs to be collected 607 * with sigp stop-and-store-status. The boot CPU state is located in 608 * the absolute lowcore of the memory stored in the HSA. The zcore code 609 * will copy the boot CPU state from the HSA. 610 * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory) 611 * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true 612 * The state for all CPUs except the boot CPU needs to be collected 613 * with sigp stop-and-store-status. The firmware or the boot-loader 614 * stored the registers of the boot CPU in the absolute lowcore in the 615 * memory of the old system. 616 * 3) kdump and the old kernel did not store the CPU state, 617 * or stand-alone kdump for DASD 618 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 619 * The state for all CPUs except the boot CPU needs to be collected 620 * with sigp stop-and-store-status. The kexec code or the boot-loader 621 * stored the registers of the boot CPU in the memory of the old system. 622 * 4) kdump and the old kernel stored the CPU state 623 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 624 * This case does not exist for s390 anymore, setup_arch explicitly 625 * deactivates the elfcorehdr= kernel parameter 626 */ 627 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 628 bool is_boot_cpu, unsigned long page) 629 { 630 __vector128 *vxrs = (__vector128 *) page; 631 632 if (is_boot_cpu) 633 vxrs = boot_cpu_vector_save_area; 634 else 635 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 636 save_area_add_vxrs(sa, vxrs); 637 } 638 639 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 640 bool is_boot_cpu, unsigned long page) 641 { 642 void *regs = (void *) page; 643 644 if (is_boot_cpu) 645 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 646 else 647 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 648 save_area_add_regs(sa, regs); 649 } 650 651 void __init smp_save_dump_cpus(void) 652 { 653 int addr, boot_cpu_addr, max_cpu_addr; 654 struct save_area *sa; 655 unsigned long page; 656 bool is_boot_cpu; 657 658 if (!(OLDMEM_BASE || is_ipl_type_dump())) 659 /* No previous system present, normal boot. */ 660 return; 661 /* Allocate a page as dumping area for the store status sigps */ 662 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31); 663 if (!page) 664 panic("ERROR: Failed to allocate %lx bytes below %lx\n", 665 PAGE_SIZE, 1UL << 31); 666 667 /* Set multi-threading state to the previous system. */ 668 pcpu_set_smt(sclp.mtid_prev); 669 boot_cpu_addr = stap(); 670 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 671 for (addr = 0; addr <= max_cpu_addr; addr++) { 672 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 673 SIGP_CC_NOT_OPERATIONAL) 674 continue; 675 is_boot_cpu = (addr == boot_cpu_addr); 676 /* Allocate save area */ 677 sa = save_area_alloc(is_boot_cpu); 678 if (!sa) 679 panic("could not allocate memory for save area\n"); 680 if (MACHINE_HAS_VX) 681 /* Get the vector registers */ 682 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 683 /* 684 * For a zfcp/nvme dump OLDMEM_BASE == NULL and the registers 685 * of the boot CPU are stored in the HSA. To retrieve 686 * these registers an SCLP request is required which is 687 * done by drivers/s390/char/zcore.c:init_cpu_info() 688 */ 689 if (!is_boot_cpu || OLDMEM_BASE) 690 /* Get the CPU registers */ 691 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 692 } 693 memblock_free(page, PAGE_SIZE); 694 diag_dma_ops.diag308_reset(); 695 pcpu_set_smt(0); 696 } 697 #endif /* CONFIG_CRASH_DUMP */ 698 699 void smp_cpu_set_polarization(int cpu, int val) 700 { 701 pcpu_devices[cpu].polarization = val; 702 } 703 704 int smp_cpu_get_polarization(int cpu) 705 { 706 return pcpu_devices[cpu].polarization; 707 } 708 709 int smp_cpu_get_cpu_address(int cpu) 710 { 711 return pcpu_devices[cpu].address; 712 } 713 714 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 715 { 716 static int use_sigp_detection; 717 int address; 718 719 if (use_sigp_detection || sclp_get_core_info(info, early)) { 720 use_sigp_detection = 1; 721 for (address = 0; 722 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 723 address += (1U << smp_cpu_mt_shift)) { 724 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 725 SIGP_CC_NOT_OPERATIONAL) 726 continue; 727 info->core[info->configured].core_id = 728 address >> smp_cpu_mt_shift; 729 info->configured++; 730 } 731 info->combined = info->configured; 732 } 733 } 734 735 static int smp_add_present_cpu(int cpu); 736 737 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail, 738 bool configured, bool early) 739 { 740 struct pcpu *pcpu; 741 int cpu, nr, i; 742 u16 address; 743 744 nr = 0; 745 if (sclp.has_core_type && core->type != boot_core_type) 746 return nr; 747 cpu = cpumask_first(avail); 748 address = core->core_id << smp_cpu_mt_shift; 749 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) { 750 if (pcpu_find_address(cpu_present_mask, address + i)) 751 continue; 752 pcpu = pcpu_devices + cpu; 753 pcpu->address = address + i; 754 if (configured) 755 pcpu->state = CPU_STATE_CONFIGURED; 756 else 757 pcpu->state = CPU_STATE_STANDBY; 758 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 759 set_cpu_present(cpu, true); 760 if (!early && smp_add_present_cpu(cpu) != 0) 761 set_cpu_present(cpu, false); 762 else 763 nr++; 764 cpumask_clear_cpu(cpu, avail); 765 cpu = cpumask_next(cpu, avail); 766 } 767 return nr; 768 } 769 770 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early) 771 { 772 struct sclp_core_entry *core; 773 cpumask_t avail; 774 bool configured; 775 u16 core_id; 776 int nr, i; 777 778 nr = 0; 779 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 780 /* 781 * Add IPL core first (which got logical CPU number 0) to make sure 782 * that all SMT threads get subsequent logical CPU numbers. 783 */ 784 if (early) { 785 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift; 786 for (i = 0; i < info->configured; i++) { 787 core = &info->core[i]; 788 if (core->core_id == core_id) { 789 nr += smp_add_core(core, &avail, true, early); 790 break; 791 } 792 } 793 } 794 for (i = 0; i < info->combined; i++) { 795 configured = i < info->configured; 796 nr += smp_add_core(&info->core[i], &avail, configured, early); 797 } 798 return nr; 799 } 800 801 void __init smp_detect_cpus(void) 802 { 803 unsigned int cpu, mtid, c_cpus, s_cpus; 804 struct sclp_core_info *info; 805 u16 address; 806 807 /* Get CPU information */ 808 info = memblock_alloc(sizeof(*info), 8); 809 if (!info) 810 panic("%s: Failed to allocate %zu bytes align=0x%x\n", 811 __func__, sizeof(*info), 8); 812 smp_get_core_info(info, 1); 813 /* Find boot CPU type */ 814 if (sclp.has_core_type) { 815 address = stap(); 816 for (cpu = 0; cpu < info->combined; cpu++) 817 if (info->core[cpu].core_id == address) { 818 /* The boot cpu dictates the cpu type. */ 819 boot_core_type = info->core[cpu].type; 820 break; 821 } 822 if (cpu >= info->combined) 823 panic("Could not find boot CPU type"); 824 } 825 826 /* Set multi-threading state for the current system */ 827 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 828 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 829 pcpu_set_smt(mtid); 830 831 /* Print number of CPUs */ 832 c_cpus = s_cpus = 0; 833 for (cpu = 0; cpu < info->combined; cpu++) { 834 if (sclp.has_core_type && 835 info->core[cpu].type != boot_core_type) 836 continue; 837 if (cpu < info->configured) 838 c_cpus += smp_cpu_mtid + 1; 839 else 840 s_cpus += smp_cpu_mtid + 1; 841 } 842 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 843 844 /* Add CPUs present at boot */ 845 get_online_cpus(); 846 __smp_rescan_cpus(info, true); 847 put_online_cpus(); 848 memblock_free_early((unsigned long)info, sizeof(*info)); 849 } 850 851 static void smp_init_secondary(void) 852 { 853 int cpu = raw_smp_processor_id(); 854 855 S390_lowcore.last_update_clock = get_tod_clock(); 856 restore_access_regs(S390_lowcore.access_regs_save_area); 857 cpu_init(); 858 rcu_cpu_starting(cpu); 859 preempt_disable(); 860 init_cpu_timer(); 861 vtime_init(); 862 vdso_getcpu_init(); 863 pfault_init(); 864 notify_cpu_starting(cpu); 865 if (topology_cpu_dedicated(cpu)) 866 set_cpu_flag(CIF_DEDICATED_CPU); 867 else 868 clear_cpu_flag(CIF_DEDICATED_CPU); 869 set_cpu_online(cpu, true); 870 update_cpu_masks(); 871 inc_irq_stat(CPU_RST); 872 local_irq_enable(); 873 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 874 } 875 876 /* 877 * Activate a secondary processor. 878 */ 879 static void __no_sanitize_address smp_start_secondary(void *cpuvoid) 880 { 881 S390_lowcore.restart_stack = (unsigned long) restart_stack; 882 S390_lowcore.restart_fn = (unsigned long) do_restart; 883 S390_lowcore.restart_data = 0; 884 S390_lowcore.restart_source = -1UL; 885 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 886 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 887 CALL_ON_STACK_NORETURN(smp_init_secondary, S390_lowcore.kernel_stack); 888 } 889 890 /* Upping and downing of CPUs */ 891 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 892 { 893 struct pcpu *pcpu = pcpu_devices + cpu; 894 int rc; 895 896 if (pcpu->state != CPU_STATE_CONFIGURED) 897 return -EIO; 898 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) != 899 SIGP_CC_ORDER_CODE_ACCEPTED) 900 return -EIO; 901 902 rc = pcpu_alloc_lowcore(pcpu, cpu); 903 if (rc) 904 return rc; 905 pcpu_prepare_secondary(pcpu, cpu); 906 pcpu_attach_task(pcpu, tidle); 907 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 908 /* Wait until cpu puts itself in the online & active maps */ 909 while (!cpu_online(cpu)) 910 cpu_relax(); 911 return 0; 912 } 913 914 static unsigned int setup_possible_cpus __initdata; 915 916 static int __init _setup_possible_cpus(char *s) 917 { 918 get_option(&s, &setup_possible_cpus); 919 return 0; 920 } 921 early_param("possible_cpus", _setup_possible_cpus); 922 923 int __cpu_disable(void) 924 { 925 unsigned long cregs[16]; 926 927 /* Handle possible pending IPIs */ 928 smp_handle_ext_call(); 929 set_cpu_online(smp_processor_id(), false); 930 update_cpu_masks(); 931 /* Disable pseudo page faults on this cpu. */ 932 pfault_fini(); 933 /* Disable interrupt sources via control register. */ 934 __ctl_store(cregs, 0, 15); 935 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 936 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 937 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 938 __ctl_load(cregs, 0, 15); 939 clear_cpu_flag(CIF_NOHZ_DELAY); 940 return 0; 941 } 942 943 void __cpu_die(unsigned int cpu) 944 { 945 struct pcpu *pcpu; 946 947 /* Wait until target cpu is down */ 948 pcpu = pcpu_devices + cpu; 949 while (!pcpu_stopped(pcpu)) 950 cpu_relax(); 951 pcpu_free_lowcore(pcpu); 952 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 953 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 954 } 955 956 void __noreturn cpu_die(void) 957 { 958 idle_task_exit(); 959 __bpon(); 960 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 961 for (;;) ; 962 } 963 964 void __init smp_fill_possible_mask(void) 965 { 966 unsigned int possible, sclp_max, cpu; 967 968 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 969 sclp_max = min(smp_max_threads, sclp_max); 970 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 971 possible = setup_possible_cpus ?: nr_cpu_ids; 972 possible = min(possible, sclp_max); 973 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 974 set_cpu_possible(cpu, true); 975 } 976 977 void __init smp_prepare_cpus(unsigned int max_cpus) 978 { 979 /* request the 0x1201 emergency signal external interrupt */ 980 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 981 panic("Couldn't request external interrupt 0x1201"); 982 /* request the 0x1202 external call external interrupt */ 983 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 984 panic("Couldn't request external interrupt 0x1202"); 985 } 986 987 void __init smp_prepare_boot_cpu(void) 988 { 989 struct pcpu *pcpu = pcpu_devices; 990 991 WARN_ON(!cpu_present(0) || !cpu_online(0)); 992 pcpu->state = CPU_STATE_CONFIGURED; 993 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 994 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 995 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 996 } 997 998 void __init smp_setup_processor_id(void) 999 { 1000 pcpu_devices[0].address = stap(); 1001 S390_lowcore.cpu_nr = 0; 1002 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 1003 S390_lowcore.spinlock_index = 0; 1004 } 1005 1006 /* 1007 * the frequency of the profiling timer can be changed 1008 * by writing a multiplier value into /proc/profile. 1009 * 1010 * usually you want to run this on all CPUs ;) 1011 */ 1012 int setup_profiling_timer(unsigned int multiplier) 1013 { 1014 return 0; 1015 } 1016 1017 static ssize_t cpu_configure_show(struct device *dev, 1018 struct device_attribute *attr, char *buf) 1019 { 1020 ssize_t count; 1021 1022 mutex_lock(&smp_cpu_state_mutex); 1023 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 1024 mutex_unlock(&smp_cpu_state_mutex); 1025 return count; 1026 } 1027 1028 static ssize_t cpu_configure_store(struct device *dev, 1029 struct device_attribute *attr, 1030 const char *buf, size_t count) 1031 { 1032 struct pcpu *pcpu; 1033 int cpu, val, rc, i; 1034 char delim; 1035 1036 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1037 return -EINVAL; 1038 if (val != 0 && val != 1) 1039 return -EINVAL; 1040 get_online_cpus(); 1041 mutex_lock(&smp_cpu_state_mutex); 1042 rc = -EBUSY; 1043 /* disallow configuration changes of online cpus and cpu 0 */ 1044 cpu = dev->id; 1045 cpu = smp_get_base_cpu(cpu); 1046 if (cpu == 0) 1047 goto out; 1048 for (i = 0; i <= smp_cpu_mtid; i++) 1049 if (cpu_online(cpu + i)) 1050 goto out; 1051 pcpu = pcpu_devices + cpu; 1052 rc = 0; 1053 switch (val) { 1054 case 0: 1055 if (pcpu->state != CPU_STATE_CONFIGURED) 1056 break; 1057 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1058 if (rc) 1059 break; 1060 for (i = 0; i <= smp_cpu_mtid; i++) { 1061 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1062 continue; 1063 pcpu[i].state = CPU_STATE_STANDBY; 1064 smp_cpu_set_polarization(cpu + i, 1065 POLARIZATION_UNKNOWN); 1066 } 1067 topology_expect_change(); 1068 break; 1069 case 1: 1070 if (pcpu->state != CPU_STATE_STANDBY) 1071 break; 1072 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1073 if (rc) 1074 break; 1075 for (i = 0; i <= smp_cpu_mtid; i++) { 1076 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1077 continue; 1078 pcpu[i].state = CPU_STATE_CONFIGURED; 1079 smp_cpu_set_polarization(cpu + i, 1080 POLARIZATION_UNKNOWN); 1081 } 1082 topology_expect_change(); 1083 break; 1084 default: 1085 break; 1086 } 1087 out: 1088 mutex_unlock(&smp_cpu_state_mutex); 1089 put_online_cpus(); 1090 return rc ? rc : count; 1091 } 1092 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1093 1094 static ssize_t show_cpu_address(struct device *dev, 1095 struct device_attribute *attr, char *buf) 1096 { 1097 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1098 } 1099 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1100 1101 static struct attribute *cpu_common_attrs[] = { 1102 &dev_attr_configure.attr, 1103 &dev_attr_address.attr, 1104 NULL, 1105 }; 1106 1107 static struct attribute_group cpu_common_attr_group = { 1108 .attrs = cpu_common_attrs, 1109 }; 1110 1111 static struct attribute *cpu_online_attrs[] = { 1112 &dev_attr_idle_count.attr, 1113 &dev_attr_idle_time_us.attr, 1114 NULL, 1115 }; 1116 1117 static struct attribute_group cpu_online_attr_group = { 1118 .attrs = cpu_online_attrs, 1119 }; 1120 1121 static int smp_cpu_online(unsigned int cpu) 1122 { 1123 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1124 1125 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1126 } 1127 1128 static int smp_cpu_pre_down(unsigned int cpu) 1129 { 1130 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1131 1132 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1133 return 0; 1134 } 1135 1136 static int smp_add_present_cpu(int cpu) 1137 { 1138 struct device *s; 1139 struct cpu *c; 1140 int rc; 1141 1142 c = kzalloc(sizeof(*c), GFP_KERNEL); 1143 if (!c) 1144 return -ENOMEM; 1145 per_cpu(cpu_device, cpu) = c; 1146 s = &c->dev; 1147 c->hotpluggable = 1; 1148 rc = register_cpu(c, cpu); 1149 if (rc) 1150 goto out; 1151 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1152 if (rc) 1153 goto out_cpu; 1154 rc = topology_cpu_init(c); 1155 if (rc) 1156 goto out_topology; 1157 return 0; 1158 1159 out_topology: 1160 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1161 out_cpu: 1162 unregister_cpu(c); 1163 out: 1164 return rc; 1165 } 1166 1167 int __ref smp_rescan_cpus(void) 1168 { 1169 struct sclp_core_info *info; 1170 int nr; 1171 1172 info = kzalloc(sizeof(*info), GFP_KERNEL); 1173 if (!info) 1174 return -ENOMEM; 1175 smp_get_core_info(info, 0); 1176 get_online_cpus(); 1177 mutex_lock(&smp_cpu_state_mutex); 1178 nr = __smp_rescan_cpus(info, false); 1179 mutex_unlock(&smp_cpu_state_mutex); 1180 put_online_cpus(); 1181 kfree(info); 1182 if (nr) 1183 topology_schedule_update(); 1184 return 0; 1185 } 1186 1187 static ssize_t __ref rescan_store(struct device *dev, 1188 struct device_attribute *attr, 1189 const char *buf, 1190 size_t count) 1191 { 1192 int rc; 1193 1194 rc = lock_device_hotplug_sysfs(); 1195 if (rc) 1196 return rc; 1197 rc = smp_rescan_cpus(); 1198 unlock_device_hotplug(); 1199 return rc ? rc : count; 1200 } 1201 static DEVICE_ATTR_WO(rescan); 1202 1203 static int __init s390_smp_init(void) 1204 { 1205 int cpu, rc = 0; 1206 1207 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1208 if (rc) 1209 return rc; 1210 for_each_present_cpu(cpu) { 1211 rc = smp_add_present_cpu(cpu); 1212 if (rc) 1213 goto out; 1214 } 1215 1216 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1217 smp_cpu_online, smp_cpu_pre_down); 1218 rc = rc <= 0 ? rc : 0; 1219 out: 1220 return rc; 1221 } 1222 subsys_initcall(s390_smp_init); 1223