1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * 9 * based on other smp stuff by 10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 11 * (c) 1998 Ingo Molnar 12 * 13 * The code outside of smp.c uses logical cpu numbers, only smp.c does 14 * the translation of logical to physical cpu ids. All new code that 15 * operates on physical cpu numbers needs to go into smp.c. 16 */ 17 18 #define KMSG_COMPONENT "cpu" 19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 20 21 #include <linux/workqueue.h> 22 #include <linux/memblock.h> 23 #include <linux/export.h> 24 #include <linux/init.h> 25 #include <linux/mm.h> 26 #include <linux/err.h> 27 #include <linux/spinlock.h> 28 #include <linux/kernel_stat.h> 29 #include <linux/delay.h> 30 #include <linux/interrupt.h> 31 #include <linux/irqflags.h> 32 #include <linux/irq_work.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/kprobes.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/abs_lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/debug.h> 51 #include <asm/os_info.h> 52 #include <asm/sigp.h> 53 #include <asm/idle.h> 54 #include <asm/nmi.h> 55 #include <asm/stacktrace.h> 56 #include <asm/topology.h> 57 #include <asm/vdso.h> 58 #include <asm/maccess.h> 59 #include "entry.h" 60 61 enum { 62 ec_schedule = 0, 63 ec_call_function_single, 64 ec_stop_cpu, 65 ec_mcck_pending, 66 ec_irq_work, 67 }; 68 69 enum { 70 CPU_STATE_STANDBY, 71 CPU_STATE_CONFIGURED, 72 }; 73 74 static DEFINE_PER_CPU(struct cpu *, cpu_device); 75 76 struct pcpu { 77 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 78 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 79 signed char state; /* physical cpu state */ 80 signed char polarization; /* physical polarization */ 81 u16 address; /* physical cpu address */ 82 }; 83 84 static u8 boot_core_type; 85 static struct pcpu pcpu_devices[NR_CPUS]; 86 87 unsigned int smp_cpu_mt_shift; 88 EXPORT_SYMBOL(smp_cpu_mt_shift); 89 90 unsigned int smp_cpu_mtid; 91 EXPORT_SYMBOL(smp_cpu_mtid); 92 93 #ifdef CONFIG_CRASH_DUMP 94 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 95 #endif 96 97 static unsigned int smp_max_threads __initdata = -1U; 98 cpumask_t cpu_setup_mask; 99 100 static int __init early_nosmt(char *s) 101 { 102 smp_max_threads = 1; 103 return 0; 104 } 105 early_param("nosmt", early_nosmt); 106 107 static int __init early_smt(char *s) 108 { 109 get_option(&s, &smp_max_threads); 110 return 0; 111 } 112 early_param("smt", early_smt); 113 114 /* 115 * The smp_cpu_state_mutex must be held when changing the state or polarization 116 * member of a pcpu data structure within the pcpu_devices array. 117 */ 118 DEFINE_MUTEX(smp_cpu_state_mutex); 119 120 /* 121 * Signal processor helper functions. 122 */ 123 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 124 { 125 int cc; 126 127 while (1) { 128 cc = __pcpu_sigp(addr, order, parm, NULL); 129 if (cc != SIGP_CC_BUSY) 130 return cc; 131 cpu_relax(); 132 } 133 } 134 135 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 136 { 137 int cc, retry; 138 139 for (retry = 0; ; retry++) { 140 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 141 if (cc != SIGP_CC_BUSY) 142 break; 143 if (retry >= 3) 144 udelay(10); 145 } 146 return cc; 147 } 148 149 static inline int pcpu_stopped(struct pcpu *pcpu) 150 { 151 u32 status; 152 153 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 154 0, &status) != SIGP_CC_STATUS_STORED) 155 return 0; 156 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 157 } 158 159 static inline int pcpu_running(struct pcpu *pcpu) 160 { 161 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 162 0, NULL) != SIGP_CC_STATUS_STORED) 163 return 1; 164 /* Status stored condition code is equivalent to cpu not running. */ 165 return 0; 166 } 167 168 /* 169 * Find struct pcpu by cpu address. 170 */ 171 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 172 { 173 int cpu; 174 175 for_each_cpu(cpu, mask) 176 if (pcpu_devices[cpu].address == address) 177 return pcpu_devices + cpu; 178 return NULL; 179 } 180 181 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 182 { 183 int order; 184 185 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 186 return; 187 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 188 pcpu->ec_clk = get_tod_clock_fast(); 189 pcpu_sigp_retry(pcpu, order, 0); 190 } 191 192 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 193 { 194 unsigned long async_stack, nodat_stack, mcck_stack; 195 struct lowcore *lc; 196 197 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 198 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 199 async_stack = stack_alloc(); 200 mcck_stack = stack_alloc(); 201 if (!lc || !nodat_stack || !async_stack || !mcck_stack) 202 goto out; 203 memcpy(lc, &S390_lowcore, 512); 204 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 205 lc->async_stack = async_stack + STACK_INIT_OFFSET; 206 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 207 lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET; 208 lc->cpu_nr = cpu; 209 lc->spinlock_lockval = arch_spin_lockval(cpu); 210 lc->spinlock_index = 0; 211 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW); 212 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW); 213 lc->preempt_count = PREEMPT_DISABLED; 214 if (nmi_alloc_mcesa(&lc->mcesad)) 215 goto out; 216 if (abs_lowcore_map(cpu, lc, true)) 217 goto out_mcesa; 218 lowcore_ptr[cpu] = lc; 219 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, __pa(lc)); 220 return 0; 221 222 out_mcesa: 223 nmi_free_mcesa(&lc->mcesad); 224 out: 225 stack_free(mcck_stack); 226 stack_free(async_stack); 227 free_pages(nodat_stack, THREAD_SIZE_ORDER); 228 free_pages((unsigned long) lc, LC_ORDER); 229 return -ENOMEM; 230 } 231 232 static void pcpu_free_lowcore(struct pcpu *pcpu) 233 { 234 unsigned long async_stack, nodat_stack, mcck_stack; 235 struct lowcore *lc; 236 int cpu; 237 238 cpu = pcpu - pcpu_devices; 239 lc = lowcore_ptr[cpu]; 240 nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET; 241 async_stack = lc->async_stack - STACK_INIT_OFFSET; 242 mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET; 243 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 244 lowcore_ptr[cpu] = NULL; 245 abs_lowcore_unmap(cpu); 246 nmi_free_mcesa(&lc->mcesad); 247 stack_free(async_stack); 248 stack_free(mcck_stack); 249 free_pages(nodat_stack, THREAD_SIZE_ORDER); 250 free_pages((unsigned long) lc, LC_ORDER); 251 } 252 253 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 254 { 255 struct lowcore *lc = lowcore_ptr[cpu]; 256 257 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 258 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 259 lc->cpu_nr = cpu; 260 lc->restart_flags = RESTART_FLAG_CTLREGS; 261 lc->spinlock_lockval = arch_spin_lockval(cpu); 262 lc->spinlock_index = 0; 263 lc->percpu_offset = __per_cpu_offset[cpu]; 264 lc->kernel_asce = S390_lowcore.kernel_asce; 265 lc->user_asce = s390_invalid_asce; 266 lc->machine_flags = S390_lowcore.machine_flags; 267 lc->user_timer = lc->system_timer = 268 lc->steal_timer = lc->avg_steal_timer = 0; 269 __ctl_store(lc->cregs_save_area, 0, 15); 270 lc->cregs_save_area[1] = lc->kernel_asce; 271 lc->cregs_save_area[7] = lc->user_asce; 272 save_access_regs((unsigned int *) lc->access_regs_save_area); 273 arch_spin_lock_setup(cpu); 274 } 275 276 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 277 { 278 struct lowcore *lc; 279 int cpu; 280 281 cpu = pcpu - pcpu_devices; 282 lc = lowcore_ptr[cpu]; 283 lc->kernel_stack = (unsigned long)task_stack_page(tsk) + STACK_INIT_OFFSET; 284 lc->current_task = (unsigned long)tsk; 285 lc->lpp = LPP_MAGIC; 286 lc->current_pid = tsk->pid; 287 lc->user_timer = tsk->thread.user_timer; 288 lc->guest_timer = tsk->thread.guest_timer; 289 lc->system_timer = tsk->thread.system_timer; 290 lc->hardirq_timer = tsk->thread.hardirq_timer; 291 lc->softirq_timer = tsk->thread.softirq_timer; 292 lc->steal_timer = 0; 293 } 294 295 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 296 { 297 struct lowcore *lc; 298 int cpu; 299 300 cpu = pcpu - pcpu_devices; 301 lc = lowcore_ptr[cpu]; 302 lc->restart_stack = lc->kernel_stack; 303 lc->restart_fn = (unsigned long) func; 304 lc->restart_data = (unsigned long) data; 305 lc->restart_source = -1U; 306 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 307 } 308 309 typedef void (pcpu_delegate_fn)(void *); 310 311 /* 312 * Call function via PSW restart on pcpu and stop the current cpu. 313 */ 314 static void __pcpu_delegate(pcpu_delegate_fn *func, void *data) 315 { 316 func(data); /* should not return */ 317 } 318 319 static void pcpu_delegate(struct pcpu *pcpu, 320 pcpu_delegate_fn *func, 321 void *data, unsigned long stack) 322 { 323 struct lowcore *lc, *abs_lc; 324 unsigned int source_cpu; 325 326 lc = lowcore_ptr[pcpu - pcpu_devices]; 327 source_cpu = stap(); 328 329 if (pcpu->address == source_cpu) { 330 call_on_stack(2, stack, void, __pcpu_delegate, 331 pcpu_delegate_fn *, func, void *, data); 332 } 333 /* Stop target cpu (if func returns this stops the current cpu). */ 334 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 335 pcpu_sigp_retry(pcpu, SIGP_CPU_RESET, 0); 336 /* Restart func on the target cpu and stop the current cpu. */ 337 if (lc) { 338 lc->restart_stack = stack; 339 lc->restart_fn = (unsigned long)func; 340 lc->restart_data = (unsigned long)data; 341 lc->restart_source = source_cpu; 342 } else { 343 abs_lc = get_abs_lowcore(); 344 abs_lc->restart_stack = stack; 345 abs_lc->restart_fn = (unsigned long)func; 346 abs_lc->restart_data = (unsigned long)data; 347 abs_lc->restart_source = source_cpu; 348 put_abs_lowcore(abs_lc); 349 } 350 asm volatile( 351 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 352 " brc 2,0b # busy, try again\n" 353 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 354 " brc 2,1b # busy, try again\n" 355 : : "d" (pcpu->address), "d" (source_cpu), 356 "K" (SIGP_RESTART), "K" (SIGP_STOP) 357 : "0", "1", "cc"); 358 for (;;) ; 359 } 360 361 /* 362 * Enable additional logical cpus for multi-threading. 363 */ 364 static int pcpu_set_smt(unsigned int mtid) 365 { 366 int cc; 367 368 if (smp_cpu_mtid == mtid) 369 return 0; 370 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 371 if (cc == 0) { 372 smp_cpu_mtid = mtid; 373 smp_cpu_mt_shift = 0; 374 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 375 smp_cpu_mt_shift++; 376 pcpu_devices[0].address = stap(); 377 } 378 return cc; 379 } 380 381 /* 382 * Call function on an online CPU. 383 */ 384 void smp_call_online_cpu(void (*func)(void *), void *data) 385 { 386 struct pcpu *pcpu; 387 388 /* Use the current cpu if it is online. */ 389 pcpu = pcpu_find_address(cpu_online_mask, stap()); 390 if (!pcpu) 391 /* Use the first online cpu. */ 392 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 393 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 394 } 395 396 /* 397 * Call function on the ipl CPU. 398 */ 399 void smp_call_ipl_cpu(void (*func)(void *), void *data) 400 { 401 struct lowcore *lc = lowcore_ptr[0]; 402 403 if (pcpu_devices[0].address == stap()) 404 lc = &S390_lowcore; 405 406 pcpu_delegate(&pcpu_devices[0], func, data, 407 lc->nodat_stack); 408 } 409 410 int smp_find_processor_id(u16 address) 411 { 412 int cpu; 413 414 for_each_present_cpu(cpu) 415 if (pcpu_devices[cpu].address == address) 416 return cpu; 417 return -1; 418 } 419 420 void schedule_mcck_handler(void) 421 { 422 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending); 423 } 424 425 bool notrace arch_vcpu_is_preempted(int cpu) 426 { 427 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 428 return false; 429 if (pcpu_running(pcpu_devices + cpu)) 430 return false; 431 return true; 432 } 433 EXPORT_SYMBOL(arch_vcpu_is_preempted); 434 435 void notrace smp_yield_cpu(int cpu) 436 { 437 if (!MACHINE_HAS_DIAG9C) 438 return; 439 diag_stat_inc_norecursion(DIAG_STAT_X09C); 440 asm volatile("diag %0,0,0x9c" 441 : : "d" (pcpu_devices[cpu].address)); 442 } 443 EXPORT_SYMBOL_GPL(smp_yield_cpu); 444 445 /* 446 * Send cpus emergency shutdown signal. This gives the cpus the 447 * opportunity to complete outstanding interrupts. 448 */ 449 void notrace smp_emergency_stop(void) 450 { 451 static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED; 452 static cpumask_t cpumask; 453 u64 end; 454 int cpu; 455 456 arch_spin_lock(&lock); 457 cpumask_copy(&cpumask, cpu_online_mask); 458 cpumask_clear_cpu(smp_processor_id(), &cpumask); 459 460 end = get_tod_clock() + (1000000UL << 12); 461 for_each_cpu(cpu, &cpumask) { 462 struct pcpu *pcpu = pcpu_devices + cpu; 463 set_bit(ec_stop_cpu, &pcpu->ec_mask); 464 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 465 0, NULL) == SIGP_CC_BUSY && 466 get_tod_clock() < end) 467 cpu_relax(); 468 } 469 while (get_tod_clock() < end) { 470 for_each_cpu(cpu, &cpumask) 471 if (pcpu_stopped(pcpu_devices + cpu)) 472 cpumask_clear_cpu(cpu, &cpumask); 473 if (cpumask_empty(&cpumask)) 474 break; 475 cpu_relax(); 476 } 477 arch_spin_unlock(&lock); 478 } 479 NOKPROBE_SYMBOL(smp_emergency_stop); 480 481 /* 482 * Stop all cpus but the current one. 483 */ 484 void smp_send_stop(void) 485 { 486 int cpu; 487 488 /* Disable all interrupts/machine checks */ 489 __load_psw_mask(PSW_KERNEL_BITS); 490 trace_hardirqs_off(); 491 492 debug_set_critical(); 493 494 if (oops_in_progress) 495 smp_emergency_stop(); 496 497 /* stop all processors */ 498 for_each_online_cpu(cpu) { 499 if (cpu == smp_processor_id()) 500 continue; 501 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 502 while (!pcpu_stopped(pcpu_devices + cpu)) 503 cpu_relax(); 504 } 505 } 506 507 /* 508 * This is the main routine where commands issued by other 509 * cpus are handled. 510 */ 511 static void smp_handle_ext_call(void) 512 { 513 unsigned long bits; 514 515 /* handle bit signal external calls */ 516 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 517 if (test_bit(ec_stop_cpu, &bits)) 518 smp_stop_cpu(); 519 if (test_bit(ec_schedule, &bits)) 520 scheduler_ipi(); 521 if (test_bit(ec_call_function_single, &bits)) 522 generic_smp_call_function_single_interrupt(); 523 if (test_bit(ec_mcck_pending, &bits)) 524 s390_handle_mcck(); 525 if (test_bit(ec_irq_work, &bits)) 526 irq_work_run(); 527 } 528 529 static void do_ext_call_interrupt(struct ext_code ext_code, 530 unsigned int param32, unsigned long param64) 531 { 532 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 533 smp_handle_ext_call(); 534 } 535 536 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 537 { 538 int cpu; 539 540 for_each_cpu(cpu, mask) 541 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 542 } 543 544 void arch_send_call_function_single_ipi(int cpu) 545 { 546 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 547 } 548 549 /* 550 * this function sends a 'reschedule' IPI to another CPU. 551 * it goes straight through and wastes no time serializing 552 * anything. Worst case is that we lose a reschedule ... 553 */ 554 void arch_smp_send_reschedule(int cpu) 555 { 556 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 557 } 558 559 #ifdef CONFIG_IRQ_WORK 560 void arch_irq_work_raise(void) 561 { 562 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_irq_work); 563 } 564 #endif 565 566 /* 567 * parameter area for the set/clear control bit callbacks 568 */ 569 struct ec_creg_mask_parms { 570 unsigned long orval; 571 unsigned long andval; 572 int cr; 573 }; 574 575 /* 576 * callback for setting/clearing control bits 577 */ 578 static void smp_ctl_bit_callback(void *info) 579 { 580 struct ec_creg_mask_parms *pp = info; 581 unsigned long cregs[16]; 582 583 __ctl_store(cregs, 0, 15); 584 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 585 __ctl_load(cregs, 0, 15); 586 } 587 588 static DEFINE_SPINLOCK(ctl_lock); 589 590 void smp_ctl_set_clear_bit(int cr, int bit, bool set) 591 { 592 struct ec_creg_mask_parms parms = { .cr = cr, }; 593 struct lowcore *abs_lc; 594 u64 ctlreg; 595 596 if (set) { 597 parms.orval = 1UL << bit; 598 parms.andval = -1UL; 599 } else { 600 parms.orval = 0; 601 parms.andval = ~(1UL << bit); 602 } 603 spin_lock(&ctl_lock); 604 abs_lc = get_abs_lowcore(); 605 ctlreg = abs_lc->cregs_save_area[cr]; 606 ctlreg = (ctlreg & parms.andval) | parms.orval; 607 abs_lc->cregs_save_area[cr] = ctlreg; 608 put_abs_lowcore(abs_lc); 609 spin_unlock(&ctl_lock); 610 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 611 } 612 EXPORT_SYMBOL(smp_ctl_set_clear_bit); 613 614 #ifdef CONFIG_CRASH_DUMP 615 616 int smp_store_status(int cpu) 617 { 618 struct lowcore *lc; 619 struct pcpu *pcpu; 620 unsigned long pa; 621 622 pcpu = pcpu_devices + cpu; 623 lc = lowcore_ptr[cpu]; 624 pa = __pa(&lc->floating_pt_save_area); 625 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 626 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 627 return -EIO; 628 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 629 return 0; 630 pa = lc->mcesad & MCESA_ORIGIN_MASK; 631 if (MACHINE_HAS_GS) 632 pa |= lc->mcesad & MCESA_LC_MASK; 633 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 634 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 635 return -EIO; 636 return 0; 637 } 638 639 /* 640 * Collect CPU state of the previous, crashed system. 641 * There are four cases: 642 * 1) standard zfcp/nvme dump 643 * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true 644 * The state for all CPUs except the boot CPU needs to be collected 645 * with sigp stop-and-store-status. The boot CPU state is located in 646 * the absolute lowcore of the memory stored in the HSA. The zcore code 647 * will copy the boot CPU state from the HSA. 648 * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory) 649 * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true 650 * The state for all CPUs except the boot CPU needs to be collected 651 * with sigp stop-and-store-status. The firmware or the boot-loader 652 * stored the registers of the boot CPU in the absolute lowcore in the 653 * memory of the old system. 654 * 3) kdump and the old kernel did not store the CPU state, 655 * or stand-alone kdump for DASD 656 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 657 * The state for all CPUs except the boot CPU needs to be collected 658 * with sigp stop-and-store-status. The kexec code or the boot-loader 659 * stored the registers of the boot CPU in the memory of the old system. 660 * 4) kdump and the old kernel stored the CPU state 661 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 662 * This case does not exist for s390 anymore, setup_arch explicitly 663 * deactivates the elfcorehdr= kernel parameter 664 */ 665 static bool dump_available(void) 666 { 667 return oldmem_data.start || is_ipl_type_dump(); 668 } 669 670 void __init smp_save_dump_ipl_cpu(void) 671 { 672 struct save_area *sa; 673 void *regs; 674 675 if (!dump_available()) 676 return; 677 sa = save_area_alloc(true); 678 regs = memblock_alloc(512, 8); 679 if (!sa || !regs) 680 panic("could not allocate memory for boot CPU save area\n"); 681 copy_oldmem_kernel(regs, __LC_FPREGS_SAVE_AREA, 512); 682 save_area_add_regs(sa, regs); 683 memblock_free(regs, 512); 684 if (MACHINE_HAS_VX) 685 save_area_add_vxrs(sa, boot_cpu_vector_save_area); 686 } 687 688 void __init smp_save_dump_secondary_cpus(void) 689 { 690 int addr, boot_cpu_addr, max_cpu_addr; 691 struct save_area *sa; 692 void *page; 693 694 if (!dump_available()) 695 return; 696 /* Allocate a page as dumping area for the store status sigps */ 697 page = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE); 698 if (!page) 699 panic("ERROR: Failed to allocate %lx bytes below %lx\n", 700 PAGE_SIZE, 1UL << 31); 701 702 /* Set multi-threading state to the previous system. */ 703 pcpu_set_smt(sclp.mtid_prev); 704 boot_cpu_addr = stap(); 705 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 706 for (addr = 0; addr <= max_cpu_addr; addr++) { 707 if (addr == boot_cpu_addr) 708 continue; 709 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 710 SIGP_CC_NOT_OPERATIONAL) 711 continue; 712 sa = save_area_alloc(false); 713 if (!sa) 714 panic("could not allocate memory for save area\n"); 715 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, __pa(page)); 716 save_area_add_regs(sa, page); 717 if (MACHINE_HAS_VX) { 718 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, __pa(page)); 719 save_area_add_vxrs(sa, page); 720 } 721 } 722 memblock_free(page, PAGE_SIZE); 723 diag_amode31_ops.diag308_reset(); 724 pcpu_set_smt(0); 725 } 726 #endif /* CONFIG_CRASH_DUMP */ 727 728 void smp_cpu_set_polarization(int cpu, int val) 729 { 730 pcpu_devices[cpu].polarization = val; 731 } 732 733 int smp_cpu_get_polarization(int cpu) 734 { 735 return pcpu_devices[cpu].polarization; 736 } 737 738 int smp_cpu_get_cpu_address(int cpu) 739 { 740 return pcpu_devices[cpu].address; 741 } 742 743 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 744 { 745 static int use_sigp_detection; 746 int address; 747 748 if (use_sigp_detection || sclp_get_core_info(info, early)) { 749 use_sigp_detection = 1; 750 for (address = 0; 751 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 752 address += (1U << smp_cpu_mt_shift)) { 753 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 754 SIGP_CC_NOT_OPERATIONAL) 755 continue; 756 info->core[info->configured].core_id = 757 address >> smp_cpu_mt_shift; 758 info->configured++; 759 } 760 info->combined = info->configured; 761 } 762 } 763 764 static int smp_add_present_cpu(int cpu); 765 766 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail, 767 bool configured, bool early) 768 { 769 struct pcpu *pcpu; 770 int cpu, nr, i; 771 u16 address; 772 773 nr = 0; 774 if (sclp.has_core_type && core->type != boot_core_type) 775 return nr; 776 cpu = cpumask_first(avail); 777 address = core->core_id << smp_cpu_mt_shift; 778 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) { 779 if (pcpu_find_address(cpu_present_mask, address + i)) 780 continue; 781 pcpu = pcpu_devices + cpu; 782 pcpu->address = address + i; 783 if (configured) 784 pcpu->state = CPU_STATE_CONFIGURED; 785 else 786 pcpu->state = CPU_STATE_STANDBY; 787 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 788 set_cpu_present(cpu, true); 789 if (!early && smp_add_present_cpu(cpu) != 0) 790 set_cpu_present(cpu, false); 791 else 792 nr++; 793 cpumask_clear_cpu(cpu, avail); 794 cpu = cpumask_next(cpu, avail); 795 } 796 return nr; 797 } 798 799 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early) 800 { 801 struct sclp_core_entry *core; 802 static cpumask_t avail; 803 bool configured; 804 u16 core_id; 805 int nr, i; 806 807 cpus_read_lock(); 808 mutex_lock(&smp_cpu_state_mutex); 809 nr = 0; 810 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 811 /* 812 * Add IPL core first (which got logical CPU number 0) to make sure 813 * that all SMT threads get subsequent logical CPU numbers. 814 */ 815 if (early) { 816 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift; 817 for (i = 0; i < info->configured; i++) { 818 core = &info->core[i]; 819 if (core->core_id == core_id) { 820 nr += smp_add_core(core, &avail, true, early); 821 break; 822 } 823 } 824 } 825 for (i = 0; i < info->combined; i++) { 826 configured = i < info->configured; 827 nr += smp_add_core(&info->core[i], &avail, configured, early); 828 } 829 mutex_unlock(&smp_cpu_state_mutex); 830 cpus_read_unlock(); 831 return nr; 832 } 833 834 void __init smp_detect_cpus(void) 835 { 836 unsigned int cpu, mtid, c_cpus, s_cpus; 837 struct sclp_core_info *info; 838 u16 address; 839 840 /* Get CPU information */ 841 info = memblock_alloc(sizeof(*info), 8); 842 if (!info) 843 panic("%s: Failed to allocate %zu bytes align=0x%x\n", 844 __func__, sizeof(*info), 8); 845 smp_get_core_info(info, 1); 846 /* Find boot CPU type */ 847 if (sclp.has_core_type) { 848 address = stap(); 849 for (cpu = 0; cpu < info->combined; cpu++) 850 if (info->core[cpu].core_id == address) { 851 /* The boot cpu dictates the cpu type. */ 852 boot_core_type = info->core[cpu].type; 853 break; 854 } 855 if (cpu >= info->combined) 856 panic("Could not find boot CPU type"); 857 } 858 859 /* Set multi-threading state for the current system */ 860 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 861 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 862 pcpu_set_smt(mtid); 863 864 /* Print number of CPUs */ 865 c_cpus = s_cpus = 0; 866 for (cpu = 0; cpu < info->combined; cpu++) { 867 if (sclp.has_core_type && 868 info->core[cpu].type != boot_core_type) 869 continue; 870 if (cpu < info->configured) 871 c_cpus += smp_cpu_mtid + 1; 872 else 873 s_cpus += smp_cpu_mtid + 1; 874 } 875 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 876 877 /* Add CPUs present at boot */ 878 __smp_rescan_cpus(info, true); 879 memblock_free(info, sizeof(*info)); 880 } 881 882 /* 883 * Activate a secondary processor. 884 */ 885 static void smp_start_secondary(void *cpuvoid) 886 { 887 int cpu = raw_smp_processor_id(); 888 889 S390_lowcore.last_update_clock = get_tod_clock(); 890 S390_lowcore.restart_stack = (unsigned long)restart_stack; 891 S390_lowcore.restart_fn = (unsigned long)do_restart; 892 S390_lowcore.restart_data = 0; 893 S390_lowcore.restart_source = -1U; 894 S390_lowcore.restart_flags = 0; 895 restore_access_regs(S390_lowcore.access_regs_save_area); 896 cpu_init(); 897 rcu_cpu_starting(cpu); 898 init_cpu_timer(); 899 vtime_init(); 900 vdso_getcpu_init(); 901 pfault_init(); 902 cpumask_set_cpu(cpu, &cpu_setup_mask); 903 update_cpu_masks(); 904 notify_cpu_starting(cpu); 905 if (topology_cpu_dedicated(cpu)) 906 set_cpu_flag(CIF_DEDICATED_CPU); 907 else 908 clear_cpu_flag(CIF_DEDICATED_CPU); 909 set_cpu_online(cpu, true); 910 inc_irq_stat(CPU_RST); 911 local_irq_enable(); 912 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 913 } 914 915 /* Upping and downing of CPUs */ 916 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 917 { 918 struct pcpu *pcpu = pcpu_devices + cpu; 919 int rc; 920 921 if (pcpu->state != CPU_STATE_CONFIGURED) 922 return -EIO; 923 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) != 924 SIGP_CC_ORDER_CODE_ACCEPTED) 925 return -EIO; 926 927 rc = pcpu_alloc_lowcore(pcpu, cpu); 928 if (rc) 929 return rc; 930 pcpu_prepare_secondary(pcpu, cpu); 931 pcpu_attach_task(pcpu, tidle); 932 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 933 /* Wait until cpu puts itself in the online & active maps */ 934 while (!cpu_online(cpu)) 935 cpu_relax(); 936 return 0; 937 } 938 939 static unsigned int setup_possible_cpus __initdata; 940 941 static int __init _setup_possible_cpus(char *s) 942 { 943 get_option(&s, &setup_possible_cpus); 944 return 0; 945 } 946 early_param("possible_cpus", _setup_possible_cpus); 947 948 int __cpu_disable(void) 949 { 950 unsigned long cregs[16]; 951 int cpu; 952 953 /* Handle possible pending IPIs */ 954 smp_handle_ext_call(); 955 cpu = smp_processor_id(); 956 set_cpu_online(cpu, false); 957 cpumask_clear_cpu(cpu, &cpu_setup_mask); 958 update_cpu_masks(); 959 /* Disable pseudo page faults on this cpu. */ 960 pfault_fini(); 961 /* Disable interrupt sources via control register. */ 962 __ctl_store(cregs, 0, 15); 963 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 964 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 965 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 966 __ctl_load(cregs, 0, 15); 967 clear_cpu_flag(CIF_NOHZ_DELAY); 968 return 0; 969 } 970 971 void __cpu_die(unsigned int cpu) 972 { 973 struct pcpu *pcpu; 974 975 /* Wait until target cpu is down */ 976 pcpu = pcpu_devices + cpu; 977 while (!pcpu_stopped(pcpu)) 978 cpu_relax(); 979 pcpu_free_lowcore(pcpu); 980 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 981 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 982 } 983 984 void __noreturn cpu_die(void) 985 { 986 idle_task_exit(); 987 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 988 for (;;) ; 989 } 990 991 void __init smp_fill_possible_mask(void) 992 { 993 unsigned int possible, sclp_max, cpu; 994 995 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 996 sclp_max = min(smp_max_threads, sclp_max); 997 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 998 possible = setup_possible_cpus ?: nr_cpu_ids; 999 possible = min(possible, sclp_max); 1000 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 1001 set_cpu_possible(cpu, true); 1002 } 1003 1004 void __init smp_prepare_cpus(unsigned int max_cpus) 1005 { 1006 /* request the 0x1201 emergency signal external interrupt */ 1007 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 1008 panic("Couldn't request external interrupt 0x1201"); 1009 /* request the 0x1202 external call external interrupt */ 1010 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 1011 panic("Couldn't request external interrupt 0x1202"); 1012 } 1013 1014 void __init smp_prepare_boot_cpu(void) 1015 { 1016 struct pcpu *pcpu = pcpu_devices; 1017 1018 WARN_ON(!cpu_present(0) || !cpu_online(0)); 1019 pcpu->state = CPU_STATE_CONFIGURED; 1020 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 1021 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 1022 } 1023 1024 void __init smp_setup_processor_id(void) 1025 { 1026 pcpu_devices[0].address = stap(); 1027 S390_lowcore.cpu_nr = 0; 1028 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 1029 S390_lowcore.spinlock_index = 0; 1030 } 1031 1032 /* 1033 * the frequency of the profiling timer can be changed 1034 * by writing a multiplier value into /proc/profile. 1035 * 1036 * usually you want to run this on all CPUs ;) 1037 */ 1038 int setup_profiling_timer(unsigned int multiplier) 1039 { 1040 return 0; 1041 } 1042 1043 static ssize_t cpu_configure_show(struct device *dev, 1044 struct device_attribute *attr, char *buf) 1045 { 1046 ssize_t count; 1047 1048 mutex_lock(&smp_cpu_state_mutex); 1049 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 1050 mutex_unlock(&smp_cpu_state_mutex); 1051 return count; 1052 } 1053 1054 static ssize_t cpu_configure_store(struct device *dev, 1055 struct device_attribute *attr, 1056 const char *buf, size_t count) 1057 { 1058 struct pcpu *pcpu; 1059 int cpu, val, rc, i; 1060 char delim; 1061 1062 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1063 return -EINVAL; 1064 if (val != 0 && val != 1) 1065 return -EINVAL; 1066 cpus_read_lock(); 1067 mutex_lock(&smp_cpu_state_mutex); 1068 rc = -EBUSY; 1069 /* disallow configuration changes of online cpus and cpu 0 */ 1070 cpu = dev->id; 1071 cpu = smp_get_base_cpu(cpu); 1072 if (cpu == 0) 1073 goto out; 1074 for (i = 0; i <= smp_cpu_mtid; i++) 1075 if (cpu_online(cpu + i)) 1076 goto out; 1077 pcpu = pcpu_devices + cpu; 1078 rc = 0; 1079 switch (val) { 1080 case 0: 1081 if (pcpu->state != CPU_STATE_CONFIGURED) 1082 break; 1083 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1084 if (rc) 1085 break; 1086 for (i = 0; i <= smp_cpu_mtid; i++) { 1087 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1088 continue; 1089 pcpu[i].state = CPU_STATE_STANDBY; 1090 smp_cpu_set_polarization(cpu + i, 1091 POLARIZATION_UNKNOWN); 1092 } 1093 topology_expect_change(); 1094 break; 1095 case 1: 1096 if (pcpu->state != CPU_STATE_STANDBY) 1097 break; 1098 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1099 if (rc) 1100 break; 1101 for (i = 0; i <= smp_cpu_mtid; i++) { 1102 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1103 continue; 1104 pcpu[i].state = CPU_STATE_CONFIGURED; 1105 smp_cpu_set_polarization(cpu + i, 1106 POLARIZATION_UNKNOWN); 1107 } 1108 topology_expect_change(); 1109 break; 1110 default: 1111 break; 1112 } 1113 out: 1114 mutex_unlock(&smp_cpu_state_mutex); 1115 cpus_read_unlock(); 1116 return rc ? rc : count; 1117 } 1118 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1119 1120 static ssize_t show_cpu_address(struct device *dev, 1121 struct device_attribute *attr, char *buf) 1122 { 1123 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1124 } 1125 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1126 1127 static struct attribute *cpu_common_attrs[] = { 1128 &dev_attr_configure.attr, 1129 &dev_attr_address.attr, 1130 NULL, 1131 }; 1132 1133 static struct attribute_group cpu_common_attr_group = { 1134 .attrs = cpu_common_attrs, 1135 }; 1136 1137 static struct attribute *cpu_online_attrs[] = { 1138 &dev_attr_idle_count.attr, 1139 &dev_attr_idle_time_us.attr, 1140 NULL, 1141 }; 1142 1143 static struct attribute_group cpu_online_attr_group = { 1144 .attrs = cpu_online_attrs, 1145 }; 1146 1147 static int smp_cpu_online(unsigned int cpu) 1148 { 1149 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1150 1151 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1152 } 1153 1154 static int smp_cpu_pre_down(unsigned int cpu) 1155 { 1156 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1157 1158 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1159 return 0; 1160 } 1161 1162 static int smp_add_present_cpu(int cpu) 1163 { 1164 struct device *s; 1165 struct cpu *c; 1166 int rc; 1167 1168 c = kzalloc(sizeof(*c), GFP_KERNEL); 1169 if (!c) 1170 return -ENOMEM; 1171 per_cpu(cpu_device, cpu) = c; 1172 s = &c->dev; 1173 c->hotpluggable = 1; 1174 rc = register_cpu(c, cpu); 1175 if (rc) 1176 goto out; 1177 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1178 if (rc) 1179 goto out_cpu; 1180 rc = topology_cpu_init(c); 1181 if (rc) 1182 goto out_topology; 1183 return 0; 1184 1185 out_topology: 1186 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1187 out_cpu: 1188 unregister_cpu(c); 1189 out: 1190 return rc; 1191 } 1192 1193 int __ref smp_rescan_cpus(void) 1194 { 1195 struct sclp_core_info *info; 1196 int nr; 1197 1198 info = kzalloc(sizeof(*info), GFP_KERNEL); 1199 if (!info) 1200 return -ENOMEM; 1201 smp_get_core_info(info, 0); 1202 nr = __smp_rescan_cpus(info, false); 1203 kfree(info); 1204 if (nr) 1205 topology_schedule_update(); 1206 return 0; 1207 } 1208 1209 static ssize_t __ref rescan_store(struct device *dev, 1210 struct device_attribute *attr, 1211 const char *buf, 1212 size_t count) 1213 { 1214 int rc; 1215 1216 rc = lock_device_hotplug_sysfs(); 1217 if (rc) 1218 return rc; 1219 rc = smp_rescan_cpus(); 1220 unlock_device_hotplug(); 1221 return rc ? rc : count; 1222 } 1223 static DEVICE_ATTR_WO(rescan); 1224 1225 static int __init s390_smp_init(void) 1226 { 1227 struct device *dev_root; 1228 int cpu, rc = 0; 1229 1230 dev_root = bus_get_dev_root(&cpu_subsys); 1231 if (dev_root) { 1232 rc = device_create_file(dev_root, &dev_attr_rescan); 1233 put_device(dev_root); 1234 if (rc) 1235 return rc; 1236 } 1237 1238 for_each_present_cpu(cpu) { 1239 rc = smp_add_present_cpu(cpu); 1240 if (rc) 1241 goto out; 1242 } 1243 1244 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1245 smp_cpu_online, smp_cpu_pre_down); 1246 rc = rc <= 0 ? rc : 0; 1247 out: 1248 return rc; 1249 } 1250 subsys_initcall(s390_smp_init); 1251 1252 static __always_inline void set_new_lowcore(struct lowcore *lc) 1253 { 1254 union register_pair dst, src; 1255 u32 pfx; 1256 1257 src.even = (unsigned long) &S390_lowcore; 1258 src.odd = sizeof(S390_lowcore); 1259 dst.even = (unsigned long) lc; 1260 dst.odd = sizeof(*lc); 1261 pfx = __pa(lc); 1262 1263 asm volatile( 1264 " mvcl %[dst],%[src]\n" 1265 " spx %[pfx]\n" 1266 : [dst] "+&d" (dst.pair), [src] "+&d" (src.pair) 1267 : [pfx] "Q" (pfx) 1268 : "memory", "cc"); 1269 } 1270 1271 int __init smp_reinit_ipl_cpu(void) 1272 { 1273 unsigned long async_stack, nodat_stack, mcck_stack; 1274 struct lowcore *lc, *lc_ipl; 1275 unsigned long flags, cr0; 1276 u64 mcesad; 1277 1278 lc_ipl = lowcore_ptr[0]; 1279 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 1280 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 1281 async_stack = stack_alloc(); 1282 mcck_stack = stack_alloc(); 1283 if (!lc || !nodat_stack || !async_stack || !mcck_stack || nmi_alloc_mcesa(&mcesad)) 1284 panic("Couldn't allocate memory"); 1285 1286 local_irq_save(flags); 1287 local_mcck_disable(); 1288 set_new_lowcore(lc); 1289 S390_lowcore.nodat_stack = nodat_stack + STACK_INIT_OFFSET; 1290 S390_lowcore.async_stack = async_stack + STACK_INIT_OFFSET; 1291 S390_lowcore.mcck_stack = mcck_stack + STACK_INIT_OFFSET; 1292 __ctl_store(cr0, 0, 0); 1293 __ctl_clear_bit(0, 28); /* disable lowcore protection */ 1294 S390_lowcore.mcesad = mcesad; 1295 __ctl_load(cr0, 0, 0); 1296 if (abs_lowcore_map(0, lc, false)) 1297 panic("Couldn't remap absolute lowcore"); 1298 lowcore_ptr[0] = lc; 1299 local_mcck_enable(); 1300 local_irq_restore(flags); 1301 1302 memblock_free_late(__pa(lc_ipl->mcck_stack - STACK_INIT_OFFSET), THREAD_SIZE); 1303 memblock_free_late(__pa(lc_ipl->async_stack - STACK_INIT_OFFSET), THREAD_SIZE); 1304 memblock_free_late(__pa(lc_ipl->nodat_stack - STACK_INIT_OFFSET), THREAD_SIZE); 1305 memblock_free_late(__pa(lc_ipl), sizeof(*lc_ipl)); 1306 return 0; 1307 } 1308