1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SMP related functions 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Denis Joseph Barrow, 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 8 * Heiko Carstens <heiko.carstens@de.ibm.com>, 9 * 10 * based on other smp stuff by 11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net> 12 * (c) 1998 Ingo Molnar 13 * 14 * The code outside of smp.c uses logical cpu numbers, only smp.c does 15 * the translation of logical to physical cpu ids. All new code that 16 * operates on physical cpu numbers needs to go into smp.c. 17 */ 18 19 #define KMSG_COMPONENT "cpu" 20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 21 22 #include <linux/workqueue.h> 23 #include <linux/memblock.h> 24 #include <linux/export.h> 25 #include <linux/init.h> 26 #include <linux/mm.h> 27 #include <linux/err.h> 28 #include <linux/spinlock.h> 29 #include <linux/kernel_stat.h> 30 #include <linux/delay.h> 31 #include <linux/interrupt.h> 32 #include <linux/irqflags.h> 33 #include <linux/cpu.h> 34 #include <linux/slab.h> 35 #include <linux/sched/hotplug.h> 36 #include <linux/sched/task_stack.h> 37 #include <linux/crash_dump.h> 38 #include <linux/kprobes.h> 39 #include <asm/asm-offsets.h> 40 #include <asm/diag.h> 41 #include <asm/switch_to.h> 42 #include <asm/facility.h> 43 #include <asm/ipl.h> 44 #include <asm/setup.h> 45 #include <asm/irq.h> 46 #include <asm/tlbflush.h> 47 #include <asm/vtimer.h> 48 #include <asm/lowcore.h> 49 #include <asm/sclp.h> 50 #include <asm/vdso.h> 51 #include <asm/debug.h> 52 #include <asm/os_info.h> 53 #include <asm/sigp.h> 54 #include <asm/idle.h> 55 #include <asm/nmi.h> 56 #include <asm/stacktrace.h> 57 #include <asm/topology.h> 58 #include "entry.h" 59 60 enum { 61 ec_schedule = 0, 62 ec_call_function_single, 63 ec_stop_cpu, 64 }; 65 66 enum { 67 CPU_STATE_STANDBY, 68 CPU_STATE_CONFIGURED, 69 }; 70 71 static DEFINE_PER_CPU(struct cpu *, cpu_device); 72 73 struct pcpu { 74 struct lowcore *lowcore; /* lowcore page(s) for the cpu */ 75 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 76 unsigned long ec_clk; /* sigp timestamp for ec_xxx */ 77 signed char state; /* physical cpu state */ 78 signed char polarization; /* physical polarization */ 79 u16 address; /* physical cpu address */ 80 }; 81 82 static u8 boot_core_type; 83 static struct pcpu pcpu_devices[NR_CPUS]; 84 85 unsigned int smp_cpu_mt_shift; 86 EXPORT_SYMBOL(smp_cpu_mt_shift); 87 88 unsigned int smp_cpu_mtid; 89 EXPORT_SYMBOL(smp_cpu_mtid); 90 91 #ifdef CONFIG_CRASH_DUMP 92 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS]; 93 #endif 94 95 static unsigned int smp_max_threads __initdata = -1U; 96 97 static int __init early_nosmt(char *s) 98 { 99 smp_max_threads = 1; 100 return 0; 101 } 102 early_param("nosmt", early_nosmt); 103 104 static int __init early_smt(char *s) 105 { 106 get_option(&s, &smp_max_threads); 107 return 0; 108 } 109 early_param("smt", early_smt); 110 111 /* 112 * The smp_cpu_state_mutex must be held when changing the state or polarization 113 * member of a pcpu data structure within the pcpu_devices arreay. 114 */ 115 DEFINE_MUTEX(smp_cpu_state_mutex); 116 117 /* 118 * Signal processor helper functions. 119 */ 120 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm) 121 { 122 int cc; 123 124 while (1) { 125 cc = __pcpu_sigp(addr, order, parm, NULL); 126 if (cc != SIGP_CC_BUSY) 127 return cc; 128 cpu_relax(); 129 } 130 } 131 132 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm) 133 { 134 int cc, retry; 135 136 for (retry = 0; ; retry++) { 137 cc = __pcpu_sigp(pcpu->address, order, parm, NULL); 138 if (cc != SIGP_CC_BUSY) 139 break; 140 if (retry >= 3) 141 udelay(10); 142 } 143 return cc; 144 } 145 146 static inline int pcpu_stopped(struct pcpu *pcpu) 147 { 148 u32 uninitialized_var(status); 149 150 if (__pcpu_sigp(pcpu->address, SIGP_SENSE, 151 0, &status) != SIGP_CC_STATUS_STORED) 152 return 0; 153 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED)); 154 } 155 156 static inline int pcpu_running(struct pcpu *pcpu) 157 { 158 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING, 159 0, NULL) != SIGP_CC_STATUS_STORED) 160 return 1; 161 /* Status stored condition code is equivalent to cpu not running. */ 162 return 0; 163 } 164 165 /* 166 * Find struct pcpu by cpu address. 167 */ 168 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address) 169 { 170 int cpu; 171 172 for_each_cpu(cpu, mask) 173 if (pcpu_devices[cpu].address == address) 174 return pcpu_devices + cpu; 175 return NULL; 176 } 177 178 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit) 179 { 180 int order; 181 182 if (test_and_set_bit(ec_bit, &pcpu->ec_mask)) 183 return; 184 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL; 185 pcpu->ec_clk = get_tod_clock_fast(); 186 pcpu_sigp_retry(pcpu, order, 0); 187 } 188 189 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 190 { 191 unsigned long async_stack, nodat_stack; 192 struct lowcore *lc; 193 194 if (pcpu != &pcpu_devices[0]) { 195 pcpu->lowcore = (struct lowcore *) 196 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 197 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 198 if (!pcpu->lowcore || !nodat_stack) 199 goto out; 200 } else { 201 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 202 } 203 async_stack = stack_alloc(); 204 if (!async_stack) 205 goto out; 206 lc = pcpu->lowcore; 207 memcpy(lc, &S390_lowcore, 512); 208 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 209 lc->async_stack = async_stack + STACK_INIT_OFFSET; 210 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET; 211 lc->cpu_nr = cpu; 212 lc->spinlock_lockval = arch_spin_lockval(cpu); 213 lc->spinlock_index = 0; 214 lc->br_r1_trampoline = 0x07f1; /* br %r1 */ 215 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW); 216 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW); 217 if (nmi_alloc_per_cpu(lc)) 218 goto out_async; 219 if (vdso_alloc_per_cpu(lc)) 220 goto out_mcesa; 221 lowcore_ptr[cpu] = lc; 222 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc); 223 return 0; 224 225 out_mcesa: 226 nmi_free_per_cpu(lc); 227 out_async: 228 stack_free(async_stack); 229 out: 230 if (pcpu != &pcpu_devices[0]) { 231 free_pages(nodat_stack, THREAD_SIZE_ORDER); 232 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 233 } 234 return -ENOMEM; 235 } 236 237 static void pcpu_free_lowcore(struct pcpu *pcpu) 238 { 239 unsigned long async_stack, nodat_stack, lowcore; 240 241 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET; 242 async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET; 243 lowcore = (unsigned long) pcpu->lowcore; 244 245 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0); 246 lowcore_ptr[pcpu - pcpu_devices] = NULL; 247 vdso_free_per_cpu(pcpu->lowcore); 248 nmi_free_per_cpu(pcpu->lowcore); 249 stack_free(async_stack); 250 if (pcpu == &pcpu_devices[0]) 251 return; 252 free_pages(nodat_stack, THREAD_SIZE_ORDER); 253 free_pages(lowcore, LC_ORDER); 254 } 255 256 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu) 257 { 258 struct lowcore *lc = pcpu->lowcore; 259 260 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask); 261 cpumask_set_cpu(cpu, mm_cpumask(&init_mm)); 262 lc->cpu_nr = cpu; 263 lc->spinlock_lockval = arch_spin_lockval(cpu); 264 lc->spinlock_index = 0; 265 lc->percpu_offset = __per_cpu_offset[cpu]; 266 lc->kernel_asce = S390_lowcore.kernel_asce; 267 lc->user_asce = S390_lowcore.kernel_asce; 268 lc->machine_flags = S390_lowcore.machine_flags; 269 lc->user_timer = lc->system_timer = 270 lc->steal_timer = lc->avg_steal_timer = 0; 271 __ctl_store(lc->cregs_save_area, 0, 15); 272 lc->cregs_save_area[1] = lc->kernel_asce; 273 lc->cregs_save_area[7] = lc->vdso_asce; 274 save_access_regs((unsigned int *) lc->access_regs_save_area); 275 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list, 276 sizeof(lc->stfle_fac_list)); 277 memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list, 278 sizeof(lc->alt_stfle_fac_list)); 279 arch_spin_lock_setup(cpu); 280 } 281 282 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk) 283 { 284 struct lowcore *lc = pcpu->lowcore; 285 286 lc->kernel_stack = (unsigned long) task_stack_page(tsk) 287 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 288 lc->current_task = (unsigned long) tsk; 289 lc->lpp = LPP_MAGIC; 290 lc->current_pid = tsk->pid; 291 lc->user_timer = tsk->thread.user_timer; 292 lc->guest_timer = tsk->thread.guest_timer; 293 lc->system_timer = tsk->thread.system_timer; 294 lc->hardirq_timer = tsk->thread.hardirq_timer; 295 lc->softirq_timer = tsk->thread.softirq_timer; 296 lc->steal_timer = 0; 297 } 298 299 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data) 300 { 301 struct lowcore *lc = pcpu->lowcore; 302 303 lc->restart_stack = lc->nodat_stack; 304 lc->restart_fn = (unsigned long) func; 305 lc->restart_data = (unsigned long) data; 306 lc->restart_source = -1UL; 307 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0); 308 } 309 310 /* 311 * Call function via PSW restart on pcpu and stop the current cpu. 312 */ 313 static void __pcpu_delegate(void (*func)(void*), void *data) 314 { 315 func(data); /* should not return */ 316 } 317 318 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu, 319 void (*func)(void *), 320 void *data, unsigned long stack) 321 { 322 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices]; 323 unsigned long source_cpu = stap(); 324 325 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 326 if (pcpu->address == source_cpu) 327 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data); 328 /* Stop target cpu (if func returns this stops the current cpu). */ 329 pcpu_sigp_retry(pcpu, SIGP_STOP, 0); 330 /* Restart func on the target cpu and stop the current cpu. */ 331 mem_assign_absolute(lc->restart_stack, stack); 332 mem_assign_absolute(lc->restart_fn, (unsigned long) func); 333 mem_assign_absolute(lc->restart_data, (unsigned long) data); 334 mem_assign_absolute(lc->restart_source, source_cpu); 335 __bpon(); 336 asm volatile( 337 "0: sigp 0,%0,%2 # sigp restart to target cpu\n" 338 " brc 2,0b # busy, try again\n" 339 "1: sigp 0,%1,%3 # sigp stop to current cpu\n" 340 " brc 2,1b # busy, try again\n" 341 : : "d" (pcpu->address), "d" (source_cpu), 342 "K" (SIGP_RESTART), "K" (SIGP_STOP) 343 : "0", "1", "cc"); 344 for (;;) ; 345 } 346 347 /* 348 * Enable additional logical cpus for multi-threading. 349 */ 350 static int pcpu_set_smt(unsigned int mtid) 351 { 352 int cc; 353 354 if (smp_cpu_mtid == mtid) 355 return 0; 356 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL); 357 if (cc == 0) { 358 smp_cpu_mtid = mtid; 359 smp_cpu_mt_shift = 0; 360 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift)) 361 smp_cpu_mt_shift++; 362 pcpu_devices[0].address = stap(); 363 } 364 return cc; 365 } 366 367 /* 368 * Call function on an online CPU. 369 */ 370 void smp_call_online_cpu(void (*func)(void *), void *data) 371 { 372 struct pcpu *pcpu; 373 374 /* Use the current cpu if it is online. */ 375 pcpu = pcpu_find_address(cpu_online_mask, stap()); 376 if (!pcpu) 377 /* Use the first online cpu. */ 378 pcpu = pcpu_devices + cpumask_first(cpu_online_mask); 379 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack); 380 } 381 382 /* 383 * Call function on the ipl CPU. 384 */ 385 void smp_call_ipl_cpu(void (*func)(void *), void *data) 386 { 387 struct lowcore *lc = pcpu_devices->lowcore; 388 389 if (pcpu_devices[0].address == stap()) 390 lc = &S390_lowcore; 391 392 pcpu_delegate(&pcpu_devices[0], func, data, 393 lc->nodat_stack); 394 } 395 396 int smp_find_processor_id(u16 address) 397 { 398 int cpu; 399 400 for_each_present_cpu(cpu) 401 if (pcpu_devices[cpu].address == address) 402 return cpu; 403 return -1; 404 } 405 406 bool arch_vcpu_is_preempted(int cpu) 407 { 408 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) 409 return false; 410 if (pcpu_running(pcpu_devices + cpu)) 411 return false; 412 return true; 413 } 414 EXPORT_SYMBOL(arch_vcpu_is_preempted); 415 416 void smp_yield_cpu(int cpu) 417 { 418 if (!MACHINE_HAS_DIAG9C) 419 return; 420 diag_stat_inc_norecursion(DIAG_STAT_X09C); 421 asm volatile("diag %0,0,0x9c" 422 : : "d" (pcpu_devices[cpu].address)); 423 } 424 425 /* 426 * Send cpus emergency shutdown signal. This gives the cpus the 427 * opportunity to complete outstanding interrupts. 428 */ 429 void notrace smp_emergency_stop(void) 430 { 431 cpumask_t cpumask; 432 u64 end; 433 int cpu; 434 435 cpumask_copy(&cpumask, cpu_online_mask); 436 cpumask_clear_cpu(smp_processor_id(), &cpumask); 437 438 end = get_tod_clock() + (1000000UL << 12); 439 for_each_cpu(cpu, &cpumask) { 440 struct pcpu *pcpu = pcpu_devices + cpu; 441 set_bit(ec_stop_cpu, &pcpu->ec_mask); 442 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL, 443 0, NULL) == SIGP_CC_BUSY && 444 get_tod_clock() < end) 445 cpu_relax(); 446 } 447 while (get_tod_clock() < end) { 448 for_each_cpu(cpu, &cpumask) 449 if (pcpu_stopped(pcpu_devices + cpu)) 450 cpumask_clear_cpu(cpu, &cpumask); 451 if (cpumask_empty(&cpumask)) 452 break; 453 cpu_relax(); 454 } 455 } 456 NOKPROBE_SYMBOL(smp_emergency_stop); 457 458 /* 459 * Stop all cpus but the current one. 460 */ 461 void smp_send_stop(void) 462 { 463 int cpu; 464 465 /* Disable all interrupts/machine checks */ 466 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 467 trace_hardirqs_off(); 468 469 debug_set_critical(); 470 471 if (oops_in_progress) 472 smp_emergency_stop(); 473 474 /* stop all processors */ 475 for_each_online_cpu(cpu) { 476 if (cpu == smp_processor_id()) 477 continue; 478 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0); 479 while (!pcpu_stopped(pcpu_devices + cpu)) 480 cpu_relax(); 481 } 482 } 483 484 /* 485 * This is the main routine where commands issued by other 486 * cpus are handled. 487 */ 488 static void smp_handle_ext_call(void) 489 { 490 unsigned long bits; 491 492 /* handle bit signal external calls */ 493 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0); 494 if (test_bit(ec_stop_cpu, &bits)) 495 smp_stop_cpu(); 496 if (test_bit(ec_schedule, &bits)) 497 scheduler_ipi(); 498 if (test_bit(ec_call_function_single, &bits)) 499 generic_smp_call_function_single_interrupt(); 500 } 501 502 static void do_ext_call_interrupt(struct ext_code ext_code, 503 unsigned int param32, unsigned long param64) 504 { 505 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS); 506 smp_handle_ext_call(); 507 } 508 509 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 510 { 511 int cpu; 512 513 for_each_cpu(cpu, mask) 514 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 515 } 516 517 void arch_send_call_function_single_ipi(int cpu) 518 { 519 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single); 520 } 521 522 /* 523 * this function sends a 'reschedule' IPI to another CPU. 524 * it goes straight through and wastes no time serializing 525 * anything. Worst case is that we lose a reschedule ... 526 */ 527 void smp_send_reschedule(int cpu) 528 { 529 pcpu_ec_call(pcpu_devices + cpu, ec_schedule); 530 } 531 532 /* 533 * parameter area for the set/clear control bit callbacks 534 */ 535 struct ec_creg_mask_parms { 536 unsigned long orval; 537 unsigned long andval; 538 int cr; 539 }; 540 541 /* 542 * callback for setting/clearing control bits 543 */ 544 static void smp_ctl_bit_callback(void *info) 545 { 546 struct ec_creg_mask_parms *pp = info; 547 unsigned long cregs[16]; 548 549 __ctl_store(cregs, 0, 15); 550 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval; 551 __ctl_load(cregs, 0, 15); 552 } 553 554 /* 555 * Set a bit in a control register of all cpus 556 */ 557 void smp_ctl_set_bit(int cr, int bit) 558 { 559 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr }; 560 561 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 562 } 563 EXPORT_SYMBOL(smp_ctl_set_bit); 564 565 /* 566 * Clear a bit in a control register of all cpus 567 */ 568 void smp_ctl_clear_bit(int cr, int bit) 569 { 570 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr }; 571 572 on_each_cpu(smp_ctl_bit_callback, &parms, 1); 573 } 574 EXPORT_SYMBOL(smp_ctl_clear_bit); 575 576 #ifdef CONFIG_CRASH_DUMP 577 578 int smp_store_status(int cpu) 579 { 580 struct pcpu *pcpu = pcpu_devices + cpu; 581 unsigned long pa; 582 583 pa = __pa(&pcpu->lowcore->floating_pt_save_area); 584 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS, 585 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 586 return -EIO; 587 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS) 588 return 0; 589 pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK); 590 if (MACHINE_HAS_GS) 591 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK; 592 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS, 593 pa) != SIGP_CC_ORDER_CODE_ACCEPTED) 594 return -EIO; 595 return 0; 596 } 597 598 /* 599 * Collect CPU state of the previous, crashed system. 600 * There are four cases: 601 * 1) standard zfcp dump 602 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 603 * The state for all CPUs except the boot CPU needs to be collected 604 * with sigp stop-and-store-status. The boot CPU state is located in 605 * the absolute lowcore of the memory stored in the HSA. The zcore code 606 * will copy the boot CPU state from the HSA. 607 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory) 608 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP 609 * The state for all CPUs except the boot CPU needs to be collected 610 * with sigp stop-and-store-status. The firmware or the boot-loader 611 * stored the registers of the boot CPU in the absolute lowcore in the 612 * memory of the old system. 613 * 3) kdump and the old kernel did not store the CPU state, 614 * or stand-alone kdump for DASD 615 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel() 616 * The state for all CPUs except the boot CPU needs to be collected 617 * with sigp stop-and-store-status. The kexec code or the boot-loader 618 * stored the registers of the boot CPU in the memory of the old system. 619 * 4) kdump and the old kernel stored the CPU state 620 * condition: OLDMEM_BASE != NULL && is_kdump_kernel() 621 * This case does not exist for s390 anymore, setup_arch explicitly 622 * deactivates the elfcorehdr= kernel parameter 623 */ 624 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr, 625 bool is_boot_cpu, unsigned long page) 626 { 627 __vector128 *vxrs = (__vector128 *) page; 628 629 if (is_boot_cpu) 630 vxrs = boot_cpu_vector_save_area; 631 else 632 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page); 633 save_area_add_vxrs(sa, vxrs); 634 } 635 636 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr, 637 bool is_boot_cpu, unsigned long page) 638 { 639 void *regs = (void *) page; 640 641 if (is_boot_cpu) 642 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512); 643 else 644 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page); 645 save_area_add_regs(sa, regs); 646 } 647 648 void __init smp_save_dump_cpus(void) 649 { 650 int addr, boot_cpu_addr, max_cpu_addr; 651 struct save_area *sa; 652 unsigned long page; 653 bool is_boot_cpu; 654 655 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP)) 656 /* No previous system present, normal boot. */ 657 return; 658 /* Allocate a page as dumping area for the store status sigps */ 659 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31); 660 if (!page) 661 panic("ERROR: Failed to allocate %lx bytes below %lx\n", 662 PAGE_SIZE, 1UL << 31); 663 664 /* Set multi-threading state to the previous system. */ 665 pcpu_set_smt(sclp.mtid_prev); 666 boot_cpu_addr = stap(); 667 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev; 668 for (addr = 0; addr <= max_cpu_addr; addr++) { 669 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) == 670 SIGP_CC_NOT_OPERATIONAL) 671 continue; 672 is_boot_cpu = (addr == boot_cpu_addr); 673 /* Allocate save area */ 674 sa = save_area_alloc(is_boot_cpu); 675 if (!sa) 676 panic("could not allocate memory for save area\n"); 677 if (MACHINE_HAS_VX) 678 /* Get the vector registers */ 679 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page); 680 /* 681 * For a zfcp dump OLDMEM_BASE == NULL and the registers 682 * of the boot CPU are stored in the HSA. To retrieve 683 * these registers an SCLP request is required which is 684 * done by drivers/s390/char/zcore.c:init_cpu_info() 685 */ 686 if (!is_boot_cpu || OLDMEM_BASE) 687 /* Get the CPU registers */ 688 smp_save_cpu_regs(sa, addr, is_boot_cpu, page); 689 } 690 memblock_free(page, PAGE_SIZE); 691 diag_dma_ops.diag308_reset(); 692 pcpu_set_smt(0); 693 } 694 #endif /* CONFIG_CRASH_DUMP */ 695 696 void smp_cpu_set_polarization(int cpu, int val) 697 { 698 pcpu_devices[cpu].polarization = val; 699 } 700 701 int smp_cpu_get_polarization(int cpu) 702 { 703 return pcpu_devices[cpu].polarization; 704 } 705 706 int smp_cpu_get_cpu_address(int cpu) 707 { 708 return pcpu_devices[cpu].address; 709 } 710 711 static void __ref smp_get_core_info(struct sclp_core_info *info, int early) 712 { 713 static int use_sigp_detection; 714 int address; 715 716 if (use_sigp_detection || sclp_get_core_info(info, early)) { 717 use_sigp_detection = 1; 718 for (address = 0; 719 address < (SCLP_MAX_CORES << smp_cpu_mt_shift); 720 address += (1U << smp_cpu_mt_shift)) { 721 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) == 722 SIGP_CC_NOT_OPERATIONAL) 723 continue; 724 info->core[info->configured].core_id = 725 address >> smp_cpu_mt_shift; 726 info->configured++; 727 } 728 info->combined = info->configured; 729 } 730 } 731 732 static int smp_add_present_cpu(int cpu); 733 734 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail, 735 bool configured, bool early) 736 { 737 struct pcpu *pcpu; 738 int cpu, nr, i; 739 u16 address; 740 741 nr = 0; 742 if (sclp.has_core_type && core->type != boot_core_type) 743 return nr; 744 cpu = cpumask_first(avail); 745 address = core->core_id << smp_cpu_mt_shift; 746 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) { 747 if (pcpu_find_address(cpu_present_mask, address + i)) 748 continue; 749 pcpu = pcpu_devices + cpu; 750 pcpu->address = address + i; 751 if (configured) 752 pcpu->state = CPU_STATE_CONFIGURED; 753 else 754 pcpu->state = CPU_STATE_STANDBY; 755 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); 756 set_cpu_present(cpu, true); 757 if (!early && smp_add_present_cpu(cpu) != 0) 758 set_cpu_present(cpu, false); 759 else 760 nr++; 761 cpumask_clear_cpu(cpu, avail); 762 cpu = cpumask_next(cpu, avail); 763 } 764 return nr; 765 } 766 767 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early) 768 { 769 struct sclp_core_entry *core; 770 cpumask_t avail; 771 bool configured; 772 u16 core_id; 773 int nr, i; 774 775 nr = 0; 776 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask); 777 /* 778 * Add IPL core first (which got logical CPU number 0) to make sure 779 * that all SMT threads get subsequent logical CPU numbers. 780 */ 781 if (early) { 782 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift; 783 for (i = 0; i < info->configured; i++) { 784 core = &info->core[i]; 785 if (core->core_id == core_id) { 786 nr += smp_add_core(core, &avail, true, early); 787 break; 788 } 789 } 790 } 791 for (i = 0; i < info->combined; i++) { 792 configured = i < info->configured; 793 nr += smp_add_core(&info->core[i], &avail, configured, early); 794 } 795 return nr; 796 } 797 798 void __init smp_detect_cpus(void) 799 { 800 unsigned int cpu, mtid, c_cpus, s_cpus; 801 struct sclp_core_info *info; 802 u16 address; 803 804 /* Get CPU information */ 805 info = memblock_alloc(sizeof(*info), 8); 806 if (!info) 807 panic("%s: Failed to allocate %zu bytes align=0x%x\n", 808 __func__, sizeof(*info), 8); 809 smp_get_core_info(info, 1); 810 /* Find boot CPU type */ 811 if (sclp.has_core_type) { 812 address = stap(); 813 for (cpu = 0; cpu < info->combined; cpu++) 814 if (info->core[cpu].core_id == address) { 815 /* The boot cpu dictates the cpu type. */ 816 boot_core_type = info->core[cpu].type; 817 break; 818 } 819 if (cpu >= info->combined) 820 panic("Could not find boot CPU type"); 821 } 822 823 /* Set multi-threading state for the current system */ 824 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp; 825 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1; 826 pcpu_set_smt(mtid); 827 828 /* Print number of CPUs */ 829 c_cpus = s_cpus = 0; 830 for (cpu = 0; cpu < info->combined; cpu++) { 831 if (sclp.has_core_type && 832 info->core[cpu].type != boot_core_type) 833 continue; 834 if (cpu < info->configured) 835 c_cpus += smp_cpu_mtid + 1; 836 else 837 s_cpus += smp_cpu_mtid + 1; 838 } 839 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus); 840 841 /* Add CPUs present at boot */ 842 get_online_cpus(); 843 __smp_rescan_cpus(info, true); 844 put_online_cpus(); 845 memblock_free_early((unsigned long)info, sizeof(*info)); 846 } 847 848 static void smp_init_secondary(void) 849 { 850 int cpu = smp_processor_id(); 851 852 S390_lowcore.last_update_clock = get_tod_clock(); 853 restore_access_regs(S390_lowcore.access_regs_save_area); 854 set_cpu_flag(CIF_ASCE_PRIMARY); 855 set_cpu_flag(CIF_ASCE_SECONDARY); 856 cpu_init(); 857 preempt_disable(); 858 init_cpu_timer(); 859 vtime_init(); 860 pfault_init(); 861 notify_cpu_starting(cpu); 862 if (topology_cpu_dedicated(cpu)) 863 set_cpu_flag(CIF_DEDICATED_CPU); 864 else 865 clear_cpu_flag(CIF_DEDICATED_CPU); 866 set_cpu_online(cpu, true); 867 update_cpu_masks(); 868 inc_irq_stat(CPU_RST); 869 local_irq_enable(); 870 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 871 } 872 873 /* 874 * Activate a secondary processor. 875 */ 876 static void __no_sanitize_address smp_start_secondary(void *cpuvoid) 877 { 878 S390_lowcore.restart_stack = (unsigned long) restart_stack; 879 S390_lowcore.restart_fn = (unsigned long) do_restart; 880 S390_lowcore.restart_data = 0; 881 S390_lowcore.restart_source = -1UL; 882 __ctl_load(S390_lowcore.cregs_save_area, 0, 15); 883 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT); 884 CALL_ON_STACK_NORETURN(smp_init_secondary, S390_lowcore.kernel_stack); 885 } 886 887 /* Upping and downing of CPUs */ 888 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 889 { 890 struct pcpu *pcpu; 891 int base, i, rc; 892 893 pcpu = pcpu_devices + cpu; 894 if (pcpu->state != CPU_STATE_CONFIGURED) 895 return -EIO; 896 base = smp_get_base_cpu(cpu); 897 for (i = 0; i <= smp_cpu_mtid; i++) { 898 if (base + i < nr_cpu_ids) 899 if (cpu_online(base + i)) 900 break; 901 } 902 /* 903 * If this is the first CPU of the core to get online 904 * do an initial CPU reset. 905 */ 906 if (i > smp_cpu_mtid && 907 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) != 908 SIGP_CC_ORDER_CODE_ACCEPTED) 909 return -EIO; 910 911 rc = pcpu_alloc_lowcore(pcpu, cpu); 912 if (rc) 913 return rc; 914 pcpu_prepare_secondary(pcpu, cpu); 915 pcpu_attach_task(pcpu, tidle); 916 pcpu_start_fn(pcpu, smp_start_secondary, NULL); 917 /* Wait until cpu puts itself in the online & active maps */ 918 while (!cpu_online(cpu)) 919 cpu_relax(); 920 return 0; 921 } 922 923 static unsigned int setup_possible_cpus __initdata; 924 925 static int __init _setup_possible_cpus(char *s) 926 { 927 get_option(&s, &setup_possible_cpus); 928 return 0; 929 } 930 early_param("possible_cpus", _setup_possible_cpus); 931 932 int __cpu_disable(void) 933 { 934 unsigned long cregs[16]; 935 936 /* Handle possible pending IPIs */ 937 smp_handle_ext_call(); 938 set_cpu_online(smp_processor_id(), false); 939 update_cpu_masks(); 940 /* Disable pseudo page faults on this cpu. */ 941 pfault_fini(); 942 /* Disable interrupt sources via control register. */ 943 __ctl_store(cregs, 0, 15); 944 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */ 945 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */ 946 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */ 947 __ctl_load(cregs, 0, 15); 948 clear_cpu_flag(CIF_NOHZ_DELAY); 949 return 0; 950 } 951 952 void __cpu_die(unsigned int cpu) 953 { 954 struct pcpu *pcpu; 955 956 /* Wait until target cpu is down */ 957 pcpu = pcpu_devices + cpu; 958 while (!pcpu_stopped(pcpu)) 959 cpu_relax(); 960 pcpu_free_lowcore(pcpu); 961 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm)); 962 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask); 963 } 964 965 void __noreturn cpu_die(void) 966 { 967 idle_task_exit(); 968 __bpon(); 969 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0); 970 for (;;) ; 971 } 972 973 void __init smp_fill_possible_mask(void) 974 { 975 unsigned int possible, sclp_max, cpu; 976 977 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1; 978 sclp_max = min(smp_max_threads, sclp_max); 979 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids; 980 possible = setup_possible_cpus ?: nr_cpu_ids; 981 possible = min(possible, sclp_max); 982 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++) 983 set_cpu_possible(cpu, true); 984 } 985 986 void __init smp_prepare_cpus(unsigned int max_cpus) 987 { 988 /* request the 0x1201 emergency signal external interrupt */ 989 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt)) 990 panic("Couldn't request external interrupt 0x1201"); 991 /* request the 0x1202 external call external interrupt */ 992 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt)) 993 panic("Couldn't request external interrupt 0x1202"); 994 } 995 996 void __init smp_prepare_boot_cpu(void) 997 { 998 struct pcpu *pcpu = pcpu_devices; 999 1000 WARN_ON(!cpu_present(0) || !cpu_online(0)); 1001 pcpu->state = CPU_STATE_CONFIGURED; 1002 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix(); 1003 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 1004 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 1005 } 1006 1007 void __init smp_cpus_done(unsigned int max_cpus) 1008 { 1009 } 1010 1011 void __init smp_setup_processor_id(void) 1012 { 1013 pcpu_devices[0].address = stap(); 1014 S390_lowcore.cpu_nr = 0; 1015 S390_lowcore.spinlock_lockval = arch_spin_lockval(0); 1016 S390_lowcore.spinlock_index = 0; 1017 } 1018 1019 /* 1020 * the frequency of the profiling timer can be changed 1021 * by writing a multiplier value into /proc/profile. 1022 * 1023 * usually you want to run this on all CPUs ;) 1024 */ 1025 int setup_profiling_timer(unsigned int multiplier) 1026 { 1027 return 0; 1028 } 1029 1030 static ssize_t cpu_configure_show(struct device *dev, 1031 struct device_attribute *attr, char *buf) 1032 { 1033 ssize_t count; 1034 1035 mutex_lock(&smp_cpu_state_mutex); 1036 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state); 1037 mutex_unlock(&smp_cpu_state_mutex); 1038 return count; 1039 } 1040 1041 static ssize_t cpu_configure_store(struct device *dev, 1042 struct device_attribute *attr, 1043 const char *buf, size_t count) 1044 { 1045 struct pcpu *pcpu; 1046 int cpu, val, rc, i; 1047 char delim; 1048 1049 if (sscanf(buf, "%d %c", &val, &delim) != 1) 1050 return -EINVAL; 1051 if (val != 0 && val != 1) 1052 return -EINVAL; 1053 get_online_cpus(); 1054 mutex_lock(&smp_cpu_state_mutex); 1055 rc = -EBUSY; 1056 /* disallow configuration changes of online cpus and cpu 0 */ 1057 cpu = dev->id; 1058 cpu = smp_get_base_cpu(cpu); 1059 if (cpu == 0) 1060 goto out; 1061 for (i = 0; i <= smp_cpu_mtid; i++) 1062 if (cpu_online(cpu + i)) 1063 goto out; 1064 pcpu = pcpu_devices + cpu; 1065 rc = 0; 1066 switch (val) { 1067 case 0: 1068 if (pcpu->state != CPU_STATE_CONFIGURED) 1069 break; 1070 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift); 1071 if (rc) 1072 break; 1073 for (i = 0; i <= smp_cpu_mtid; i++) { 1074 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1075 continue; 1076 pcpu[i].state = CPU_STATE_STANDBY; 1077 smp_cpu_set_polarization(cpu + i, 1078 POLARIZATION_UNKNOWN); 1079 } 1080 topology_expect_change(); 1081 break; 1082 case 1: 1083 if (pcpu->state != CPU_STATE_STANDBY) 1084 break; 1085 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift); 1086 if (rc) 1087 break; 1088 for (i = 0; i <= smp_cpu_mtid; i++) { 1089 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i)) 1090 continue; 1091 pcpu[i].state = CPU_STATE_CONFIGURED; 1092 smp_cpu_set_polarization(cpu + i, 1093 POLARIZATION_UNKNOWN); 1094 } 1095 topology_expect_change(); 1096 break; 1097 default: 1098 break; 1099 } 1100 out: 1101 mutex_unlock(&smp_cpu_state_mutex); 1102 put_online_cpus(); 1103 return rc ? rc : count; 1104 } 1105 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); 1106 1107 static ssize_t show_cpu_address(struct device *dev, 1108 struct device_attribute *attr, char *buf) 1109 { 1110 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address); 1111 } 1112 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL); 1113 1114 static struct attribute *cpu_common_attrs[] = { 1115 &dev_attr_configure.attr, 1116 &dev_attr_address.attr, 1117 NULL, 1118 }; 1119 1120 static struct attribute_group cpu_common_attr_group = { 1121 .attrs = cpu_common_attrs, 1122 }; 1123 1124 static struct attribute *cpu_online_attrs[] = { 1125 &dev_attr_idle_count.attr, 1126 &dev_attr_idle_time_us.attr, 1127 NULL, 1128 }; 1129 1130 static struct attribute_group cpu_online_attr_group = { 1131 .attrs = cpu_online_attrs, 1132 }; 1133 1134 static int smp_cpu_online(unsigned int cpu) 1135 { 1136 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1137 1138 return sysfs_create_group(&s->kobj, &cpu_online_attr_group); 1139 } 1140 static int smp_cpu_pre_down(unsigned int cpu) 1141 { 1142 struct device *s = &per_cpu(cpu_device, cpu)->dev; 1143 1144 sysfs_remove_group(&s->kobj, &cpu_online_attr_group); 1145 return 0; 1146 } 1147 1148 static int smp_add_present_cpu(int cpu) 1149 { 1150 struct device *s; 1151 struct cpu *c; 1152 int rc; 1153 1154 c = kzalloc(sizeof(*c), GFP_KERNEL); 1155 if (!c) 1156 return -ENOMEM; 1157 per_cpu(cpu_device, cpu) = c; 1158 s = &c->dev; 1159 c->hotpluggable = 1; 1160 rc = register_cpu(c, cpu); 1161 if (rc) 1162 goto out; 1163 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group); 1164 if (rc) 1165 goto out_cpu; 1166 rc = topology_cpu_init(c); 1167 if (rc) 1168 goto out_topology; 1169 return 0; 1170 1171 out_topology: 1172 sysfs_remove_group(&s->kobj, &cpu_common_attr_group); 1173 out_cpu: 1174 unregister_cpu(c); 1175 out: 1176 return rc; 1177 } 1178 1179 int __ref smp_rescan_cpus(void) 1180 { 1181 struct sclp_core_info *info; 1182 int nr; 1183 1184 info = kzalloc(sizeof(*info), GFP_KERNEL); 1185 if (!info) 1186 return -ENOMEM; 1187 smp_get_core_info(info, 0); 1188 get_online_cpus(); 1189 mutex_lock(&smp_cpu_state_mutex); 1190 nr = __smp_rescan_cpus(info, false); 1191 mutex_unlock(&smp_cpu_state_mutex); 1192 put_online_cpus(); 1193 kfree(info); 1194 if (nr) 1195 topology_schedule_update(); 1196 return 0; 1197 } 1198 1199 static ssize_t __ref rescan_store(struct device *dev, 1200 struct device_attribute *attr, 1201 const char *buf, 1202 size_t count) 1203 { 1204 int rc; 1205 1206 rc = lock_device_hotplug_sysfs(); 1207 if (rc) 1208 return rc; 1209 rc = smp_rescan_cpus(); 1210 unlock_device_hotplug(); 1211 return rc ? rc : count; 1212 } 1213 static DEVICE_ATTR_WO(rescan); 1214 1215 static int __init s390_smp_init(void) 1216 { 1217 int cpu, rc = 0; 1218 1219 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan); 1220 if (rc) 1221 return rc; 1222 for_each_present_cpu(cpu) { 1223 rc = smp_add_present_cpu(cpu); 1224 if (rc) 1225 goto out; 1226 } 1227 1228 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online", 1229 smp_cpu_online, smp_cpu_pre_down); 1230 rc = rc <= 0 ? rc : 0; 1231 out: 1232 return rc; 1233 } 1234 subsys_initcall(s390_smp_init); 1235